JPH0578187B2 - - Google Patents

Info

Publication number
JPH0578187B2
JPH0578187B2 JP58206958A JP20695883A JPH0578187B2 JP H0578187 B2 JPH0578187 B2 JP H0578187B2 JP 58206958 A JP58206958 A JP 58206958A JP 20695883 A JP20695883 A JP 20695883A JP H0578187 B2 JPH0578187 B2 JP H0578187B2
Authority
JP
Japan
Prior art keywords
fuse
memory cell
insulating film
bit line
fetq
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP58206958A
Other languages
English (en)
Japanese (ja)
Other versions
JPS6098665A (ja
Inventor
Hiroshi Myamoto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP58206958A priority Critical patent/JPS6098665A/ja
Publication of JPS6098665A publication Critical patent/JPS6098665A/ja
Publication of JPH0578187B2 publication Critical patent/JPH0578187B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/525Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body with adaptable interconnections
    • H01L23/5256Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body with adaptable interconnections comprising fuses, i.e. connections having their state changed from conductive to non-conductive
    • H01L23/5258Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body with adaptable interconnections comprising fuses, i.e. connections having their state changed from conductive to non-conductive the change of state resulting from the use of an external beam, e.g. laser beam or ion beam
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • For Increasing The Reliability Of Semiconductor Memories (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
  • Semiconductor Memories (AREA)
JP58206958A 1983-11-02 1983-11-02 半導体メモリ装置 Granted JPS6098665A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58206958A JPS6098665A (ja) 1983-11-02 1983-11-02 半導体メモリ装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58206958A JPS6098665A (ja) 1983-11-02 1983-11-02 半導体メモリ装置

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP1186651A Division JPH02146767A (ja) 1989-07-19 1989-07-19 半導体メモリ装置

Publications (2)

Publication Number Publication Date
JPS6098665A JPS6098665A (ja) 1985-06-01
JPH0578187B2 true JPH0578187B2 (enrdf_load_stackoverflow) 1993-10-28

Family

ID=16531825

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58206958A Granted JPS6098665A (ja) 1983-11-02 1983-11-02 半導体メモリ装置

Country Status (1)

Country Link
JP (1) JPS6098665A (enrdf_load_stackoverflow)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60261154A (ja) * 1984-06-08 1985-12-24 Hitachi Micro Comput Eng Ltd 半導体集積回路装置の製造方法
JPH01169943A (ja) * 1987-12-24 1989-07-05 Fujitsu Ltd 半導体記憶装置
JPH07130861A (ja) * 1994-01-31 1995-05-19 Hitachi Ltd 半導体集積回路装置の製造方法
JP2719751B2 (ja) * 1994-01-31 1998-02-25 株式会社日立製作所 半導体集積回路装置の製造方法
JPH09102193A (ja) * 1995-10-04 1997-04-15 Mitsubishi Electric Corp 半導体記憶装置
JPH1187646A (ja) * 1997-09-02 1999-03-30 Mitsubishi Electric Corp 半導体集積回路およびその製造方法
JP4738605B2 (ja) * 2001-01-29 2011-08-03 大和製衡株式会社 洗浄指示機能を具えた計量器

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6044829B2 (ja) * 1982-03-18 1985-10-05 富士通株式会社 半導体装置の製造方法

Also Published As

Publication number Publication date
JPS6098665A (ja) 1985-06-01

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