JPH057359B2 - - Google Patents

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Publication number
JPH057359B2
JPH057359B2 JP11692488A JP11692488A JPH057359B2 JP H057359 B2 JPH057359 B2 JP H057359B2 JP 11692488 A JP11692488 A JP 11692488A JP 11692488 A JP11692488 A JP 11692488A JP H057359 B2 JPH057359 B2 JP H057359B2
Authority
JP
Japan
Prior art keywords
substrate
grown
single crystal
film
temperature
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP11692488A
Other languages
Japanese (ja)
Other versions
JPH01290595A (en
Inventor
Tetsuo Nakamura
Makoto Ishida
Akira Namiki
Hideto Kanba
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toyoko Kagaku Co Ltd
Original Assignee
Toyoko Kagaku Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toyoko Kagaku Co Ltd filed Critical Toyoko Kagaku Co Ltd
Priority to JP11692488A priority Critical patent/JPH01290595A/en
Publication of JPH01290595A publication Critical patent/JPH01290595A/en
Publication of JPH057359B2 publication Critical patent/JPH057359B2/ja
Granted legal-status Critical Current

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  • Physical Deposition Of Substances That Are Components Of Semiconductor Devices (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)

Description

【発明の詳細な説明】 「産業上の利用分野」 この発明は、集積回路、トランジスタ等の半導
体製造工業に於いて用いられるSi/Al2O3/Si多
層構造の形成法に関するものである。
DETAILED DESCRIPTION OF THE INVENTION "Field of Industrial Application" The present invention relates to a method for forming a Si/Al 2 O 3 /Si multilayer structure used in the semiconductor manufacturing industry for integrated circuits, transistors, etc.

「従来技術及びその問題点」 Si基板上への単結晶絶縁膜は、3次元集積回路
やSOI(Si on Insulator)素子実現のために必要
な要素の1つである。
"Prior art and its problems" A single crystal insulating film on a Si substrate is one of the elements necessary for realizing three-dimensional integrated circuits and SOI (Si on Insulator) elements.

そのためこれまで種々の絶縁膜が検討されてき
ているが、実用上種々の問題点が残されており、
未だ充分満足すべきものではない。
For this reason, various insulating films have been studied, but various practical problems remain.
It is still not completely satisfactory.

しかして、Si基板上にAl2O3膜をエピタキシヤ
成長させ、更にその上にSi膜をエピタキシヤル成
長させた三層の多層構造が可能となれば、種々の
有意義な効果が生ずる。まず、基板がSiであるた
め、SOS(Si on Sapphire)と比較して価格が格
段に下がるため、大口径のSOI(Si on Insulater)
基板を製作することが可能となり、しかもエピタ
キシヤルSi/γ−Al2O3/基板Siというサンドイ
ツチ構造をとるため、圧縮応力が軽減される利点
が得られる。更に、以下に述べるような優れた利
点も有している。
Therefore, if a three-layer multilayer structure in which an Al 2 O 3 film is epitaxially grown on a Si substrate and a Si film is epitaxially grown thereon becomes possible, various significant effects will be produced. First, since the substrate is Si, the price is significantly lower than SOS (Si on Sapphire), so large-diameter SOI (Si on Insulator)
It becomes possible to manufacture a substrate, and since it has a sandwich structure of epitaxial Si/γ-Al 2 O 3 /substrate Si, it has the advantage of reducing compressive stress. Furthermore, it also has excellent advantages as described below.

(1) Siとγ−Al2O3間の格子不整合は、2.4%と
SOSよりも小さくなる。
(1) The lattice mismatch between Si and γ-Al 2 O 3 is 2.4%.
It will be smaller than SOS.

(2) γ−Al2O3/Siの界面準位は、1×1011eV-1
cm-1と低い。
(2) The interface level of γ-Al 2 O 3 /Si is 1×10 11 eV -1
As low as cm -1 .

(3) Naや他の不純物のバリアーとして効果的に
働く。
(3) Works effectively as a barrier against Na and other impurities.

(4) 耐放射線損傷効果が大きい。(4) Great radiation damage resistance effect.

(5) 高い比誘電率(εr=8〜9)を有している。(5) It has a high dielectric constant (ε r =8 to 9).

(6) γ−Al2O3は、1100℃の高温下でも安定であ
る。
(6) γ-Al 2 O 3 is stable even at high temperatures of 1100°C.

このような特徴を有するγ−Al2O3を、減圧気
相成長法でSi基板上に成長させるには、従来は
1000℃近い基板温度が必要であつたが、このよう
な高温度では、多層構造を形成し3次元集積回路
とするには、温度が高すぎる問題があつた。即
ち、Siに半導体デバイスを組み込んでその上に
γAl2O3絶縁膜を形成するのに、1000℃近い温度
であると、半導体デバイス中の不純物濃度が異な
つてくるからである。
In order to grow γ-Al 2 O 3 with these characteristics on a Si substrate by low-pressure vapor phase epitaxy, conventional methods
A substrate temperature of nearly 1000°C was required, but at such a high temperature, there was a problem that the temperature was too high to form a multilayer structure and create a three-dimensional integrated circuit. That is, when a semiconductor device is assembled in Si and a γAl 2 O 3 insulating film is formed thereon, if the temperature is close to 1000° C., the impurity concentration in the semiconductor device will differ.

本発明は、このような欠点を解消し、低い成長
温度でγ−Al2O3絶縁膜を成長させるSi/
Al2O3/Si多層構造の形成法を提供することを目
的とする。
The present invention overcomes these drawbacks and develops a Si/Al 2 O 3 insulating film that can be grown at a low growth temperature.
The purpose of this invention is to provide a method for forming an Al 2 O 3 /Si multilayer structure.

「問題点を解決するための手段」 本発明者等は、上記目的を達成するため鋭意研
究の結果、トリメチルアルミニウムとN2Oガス
とを5×10-5トル以下の分圧よりも低い分圧下で
分子線とし、基板温度720〜800℃の反応条件でSi
基板上にエピタキシヤル成長させることによつ
て、基板上に極めて良質のγ−Al2O3単結晶膜が
形成し得ることを見い出し、本発明に到達した。
"Means for Solving the Problems" In order to achieve the above object, the inventors of the present invention have conducted extensive research and found that trimethylaluminum and N 2 O gas have a partial pressure lower than 5×10 -5 torr. It is made into a molecular beam under pressure, and Si
The inventors have discovered that a γ-Al 2 O 3 single crystal film of extremely high quality can be formed on a substrate by epitaxial growth on the substrate, and have arrived at the present invention.

即ち本発明は、トリメチルアルミニウムと
N2Oガスとをガスソースとし、5×10-5トル以下
の低い分圧下、720〜800℃の低温度で、分子線エ
ピタキシヤル法により、Si基板上にγ−Al2O3
結晶を成長させ、ついで該γ−Al2O3単結晶膜上
にSiの単結晶膜を成長させることを特徴とする。
That is, the present invention provides trimethylaluminum and
A γ-Al 2 O 3 single crystal was grown on a Si substrate by molecular beam epitaxial method using N 2 O gas as a gas source and at a low partial pressure of 5 × 10 -5 Torr or less and a low temperature of 720 to 800 °C. The method is characterized in that a Si single crystal film is grown on the γ-Al 2 O 3 single crystal film.

「実施例」 次に、本発明の実施例を挙げ、本発明を更に説
明する。
"Example" Next, the present invention will be further explained by giving examples of the present invention.

本発明の方法を概略的に説明すれば、まず第1
図に示すように、Siウエハー上にγ−Al2O3単結
晶膜を成長させ、ついでその上にSi2H6により、
Siエピ層を形成させるものである。
To roughly explain the method of the present invention, first,
As shown in the figure, a γ-Al 2 O 3 single crystal film is grown on a Si wafer, and then Si 2 H 6 is deposited on top of it.
This is to form a Si epi layer.

基板として2インチのSi(100)ウエハーを用い
て、分子線エピタキシヤル成長装置内で、基板温
度720〜800℃に加熱し、反応ガスとしてN2ガス
でバブリングしたトリメチルアルミニウムの分圧
3×10-6トルとN2Oガス分圧5×10-5トルとを用
い、γ−Al2O3結晶膜のエピタキシヤル成長を行
なつた。
Using a 2-inch Si (100) wafer as a substrate, the substrate temperature was heated to 720-800°C in a molecular beam epitaxial growth apparatus, and a partial pressure of trimethylaluminum of 3 × 10 was bubbled with N2 gas as a reaction gas. A γ-Al 2 O 3 crystal film was epitaxially grown using -6 torr and N 2 O gas partial pressure of 5×10 −5 torr.

本発明に於いては、反応温度は720℃〜800℃で
ある必要があるが、720℃より低い温度であつて
は、γ−Al2O3が単結晶化しないし、また800℃
を越えた温度であつては、前記したように多層構
造とする場合に半導体デバイス中の不純物濃度が
異なつたり、γ−Al2O3単結晶の表面凹凸が激し
くなるからである。
In the present invention, the reaction temperature needs to be between 720°C and 800°C, but if the temperature is lower than 720°C, γ-Al 2 O 3 will not become a single crystal, and if the temperature is lower than 720°C,
This is because, if the temperature exceeds 100, the impurity concentration in the semiconductor device will vary when a multilayer structure is used as described above, and the surface unevenness of the γ-Al 2 O 3 single crystal will become severe.

基板のSiの方位は、(100)、(111)などに関係
なく、エピタキシヤル成長が可能であつた。
Epitaxial growth was possible regardless of the Si orientation of the substrate (100), (111), etc.

面方位の関係は、第2図及び第3図の反射電子
線回折パターンから、下記のようになつているこ
とが判明した。
From the reflected electron beam diffraction patterns shown in FIGS. 2 and 3, it was found that the relationship between the plane orientations is as follows.

γ−Al2O3(100)/Si(100) γ−Al2O3/(111)/Si(111) 上記のように成長した膜の組成は、Alと0か
らできていることが、オージエ電子分光法により
分析して確認されている。
γ-Al 2 O 3 (100)/Si (100) γ-Al 2 O 3 / (111)/Si (111) The composition of the film grown as above is composed of Al and 0. Confirmed by analysis using Augier electron spectroscopy.

ついで、このようにして形成したγ−Al2O3
(100)/Si(100)上に、Si2H6ガスを用いて、Si
のエピタキシヤル成長を行ない、成長した膜がSi
(100)/γ−Al2O3(100)/Si(100)の構造にな
つていることが、第4図の反射電子線回折の結果
から明らかになつた。この第3層目のSiの成長
は、分子線エピタキシヤル成長であれば、約700
℃で成長可能であり、気相成長法では通常のSOS
成長と同様の条件で成長することが実験により確
認されてる。
Then, the γ-Al 2 O 3 formed in this way
(100)/Si (100) using Si 2 H 6 gas
epitaxial growth is performed, and the grown film is Si.
(100)/γ-Al 2 O 3 (100)/Si(100) was clarified from the reflection electron diffraction results shown in FIG. If this third layer of Si is grown by molecular beam epitaxial growth, the growth rate is approximately 700.
It can be grown at
It has been confirmed through experiments that it grows under the same conditions.

「発明の効果」 以上述べた如く本発明によるときは、著しく顕
著な電気的特性を示し且つ高温熱処理時の安定性
に優れた絶縁膜をSi基板上に容易に形成させるこ
とができるので、3次元集積回路やSOI素子実現
に貢献するところ極めて大きい。
"Effects of the Invention" As described above, according to the present invention, it is possible to easily form an insulating film on a Si substrate that exhibits remarkable electrical characteristics and has excellent stability during high-temperature heat treatment. It will greatly contribute to the realization of dimensional integrated circuits and SOI devices.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は、本発明のSi/Al2O3/Si多層構造を
示す説明図、第2図1は、デポジシヨン前Si
(100)基板のRHEED像(結晶構造)を示す電子
顕微鏡写真、第2図2は、デポジシヨン前の反射
電子線回折パターン、第2図3は、デポジシヨン
後のγ−Al2O3(100)/Si(100)のRHEED像
(結晶構造)を示す電子顕微鏡写真、第2図4は、
デポジシヨン後のγ−Al2O3(100)/Si(100)の
反射電子回折パターン、第3図1は、デポジシヨ
ン前Si(111)基板のRHEED像(結晶構造)を示
す電子顕微鏡写真、第3図2は、デポジシヨン前
の反射電子線回折パターン、第3図3は、デポジ
シヨン後のγ−Al2O3(111)/Si(111)の
RHEED像(結晶構造)を示す電子顕微鏡写真、
第3図4は、デポジシヨン後のγ−Al2O3
(111)/Si(111)の反射電子回折パターン、第4
図1は、γ−Al2O3(100)/Si(100)基板上にエ
ピタキシヤル成長させたSi(100)膜からの
RHEED像(結晶構造)を示す電子顕微鏡写真、
第4図2は、Si(100)/γ−Al2O3(100)/Si
(100)表面の反射電子線回折パターンである。
FIG. 1 is an explanatory diagram showing the Si/Al 2 O 3 /Si multilayer structure of the present invention, and FIG.
(100) Electron micrograph showing the RHEED image (crystal structure) of the substrate, Figure 2.2 is the reflected electron beam diffraction pattern before deposition, and Figure 2.3 is the γ-Al 2 O 3 (100) after deposition. Figure 2, an electron micrograph showing the RHEED image (crystal structure) of /Si(100), is
Figure 3 shows the backscattered electron diffraction pattern of γ-Al 2 O 3 (100)/Si (100) after deposition. 3. Figure 2 shows the backscattered electron diffraction pattern before deposition, and Figure 3.3 shows the reflection electron diffraction pattern of γ-Al 2 O 3 (111)/Si (111) after deposition.
Electron micrograph showing RHEED image (crystal structure),
Figure 3 4 shows γ-Al 2 O 3 after deposition.
(111)/Si(111) backscattered electron diffraction pattern, 4th
Figure 1 shows the results of a Si(100) film grown epitaxially on a γ-Al 2 O 3 (100)/Si(100) substrate.
Electron micrograph showing RHEED image (crystal structure),
Figure 4 2 shows Si (100)/γ-Al 2 O 3 (100)/Si
This is the reflected electron diffraction pattern of the (100) surface.

Claims (1)

【特許請求の範囲】[Claims] 1 トリメチルアルミニウムとN2Oガスとをガ
スソースとし、5×10-5トル以下の低い分圧下、
720℃〜800℃の低温度で、分子線エピタキシヤル
法により、Si基板上にγ−Al2O3単結晶膜を成長
させ、ついで該γ−Al2O3単結晶膜上にSiの単結
晶膜を成長させることを特徴とするエピタキシヤ
ル法によるSi/Al2O3/Si多層構造の形成法。
1 Using trimethylaluminum and N 2 O gas as gas sources, under a low partial pressure of 5 × 10 -5 Torr or less,
A γ-Al 2 O 3 single crystal film is grown on a Si substrate at a low temperature of 720°C to 800°C by molecular beam epitaxial method, and then a Si single crystal film is grown on the γ-Al 2 O 3 single crystal film. A method for forming a Si/Al 2 O 3 /Si multilayer structure using an epitaxial method characterized by growing a crystalline film.
JP11692488A 1988-05-16 1988-05-16 Formation of si/al2o3/si multilayered structure Granted JPH01290595A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11692488A JPH01290595A (en) 1988-05-16 1988-05-16 Formation of si/al2o3/si multilayered structure

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11692488A JPH01290595A (en) 1988-05-16 1988-05-16 Formation of si/al2o3/si multilayered structure

Publications (2)

Publication Number Publication Date
JPH01290595A JPH01290595A (en) 1989-11-22
JPH057359B2 true JPH057359B2 (en) 1993-01-28

Family

ID=14699049

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11692488A Granted JPH01290595A (en) 1988-05-16 1988-05-16 Formation of si/al2o3/si multilayered structure

Country Status (1)

Country Link
JP (1) JPH01290595A (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH07187892A (en) * 1991-06-28 1995-07-25 Internatl Business Mach Corp <Ibm> Silicon and its formation

Also Published As

Publication number Publication date
JPH01290595A (en) 1989-11-22

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