JPH0568665B2 - - Google Patents

Info

Publication number
JPH0568665B2
JPH0568665B2 JP58004880A JP488083A JPH0568665B2 JP H0568665 B2 JPH0568665 B2 JP H0568665B2 JP 58004880 A JP58004880 A JP 58004880A JP 488083 A JP488083 A JP 488083A JP H0568665 B2 JPH0568665 B2 JP H0568665B2
Authority
JP
Japan
Prior art keywords
logic circuit
line
memory
circuit section
diagnosing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP58004880A
Other languages
English (en)
Japanese (ja)
Other versions
JPS59131181A (ja
Inventor
Kazuhisa Genma
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP58004880A priority Critical patent/JPS59131181A/ja
Publication of JPS59131181A publication Critical patent/JPS59131181A/ja
Publication of JPH0568665B2 publication Critical patent/JPH0568665B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/3181—Functional testing
    • G01R31/3185—Reconfiguring for testing, e.g. LSSD, partitioning
    • G01R31/318533—Reconfiguring for testing, e.g. LSSD, partitioning using scanning techniques, e.g. LSSD, Boundary Scan, JTAG
    • G01R31/318572—Input/Output interfaces

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Tests Of Electronic Circuits (AREA)
JP58004880A 1983-01-14 1983-01-14 論理回路部の診断方法 Granted JPS59131181A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58004880A JPS59131181A (ja) 1983-01-14 1983-01-14 論理回路部の診断方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58004880A JPS59131181A (ja) 1983-01-14 1983-01-14 論理回路部の診断方法

Publications (2)

Publication Number Publication Date
JPS59131181A JPS59131181A (ja) 1984-07-27
JPH0568665B2 true JPH0568665B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) 1993-09-29

Family

ID=11595985

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58004880A Granted JPS59131181A (ja) 1983-01-14 1983-01-14 論理回路部の診断方法

Country Status (1)

Country Link
JP (1) JPS59131181A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)

Also Published As

Publication number Publication date
JPS59131181A (ja) 1984-07-27

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