JPH0561719B2 - - Google Patents
Info
- Publication number
- JPH0561719B2 JPH0561719B2 JP58242021A JP24202183A JPH0561719B2 JP H0561719 B2 JPH0561719 B2 JP H0561719B2 JP 58242021 A JP58242021 A JP 58242021A JP 24202183 A JP24202183 A JP 24202183A JP H0561719 B2 JPH0561719 B2 JP H0561719B2
- Authority
- JP
- Japan
- Prior art keywords
- transfer gate
- gate
- control signal
- charge
- data line
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
- G11C11/565—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using capacitive charge storage elements
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
- G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
- G06F11/1008—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
- G06F11/1072—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices in multilevel memories
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/06—Sense amplifiers; Associated circuits, e.g. timing or triggering circuits
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
Priority Applications (5)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP58242021A JPS60136088A (ja) | 1983-12-23 | 1983-12-23 | 半導体多値記憶装置 |
| DE8484116060T DE3485595D1 (de) | 1983-12-23 | 1984-12-21 | Halbleiterspeicher mit einer speicherstruktur mit vielfachen pegeln. |
| EP84116060A EP0148488B1 (en) | 1983-12-23 | 1984-12-21 | Semiconductor memory having multiple level storage structure |
| KR1019840008298A KR920011043B1 (ko) | 1983-12-23 | 1984-12-24 | 반도체 기억장치 |
| US06/686,018 US4661929A (en) | 1983-12-23 | 1984-12-24 | Semiconductor memory having multiple level storage structure |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP58242021A JPS60136088A (ja) | 1983-12-23 | 1983-12-23 | 半導体多値記憶装置 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS60136088A JPS60136088A (ja) | 1985-07-19 |
| JPH0561719B2 true JPH0561719B2 (enrdf_load_stackoverflow) | 1993-09-06 |
Family
ID=17083085
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP58242021A Granted JPS60136088A (ja) | 1983-12-23 | 1983-12-23 | 半導体多値記憶装置 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS60136088A (enrdf_load_stackoverflow) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP5033479B2 (ja) * | 2007-05-25 | 2012-09-26 | 日本電信電話株式会社 | 読み出し装置 |
Family Cites Families (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS599118B2 (ja) * | 1978-12-01 | 1984-02-29 | 三菱電機株式会社 | 電荷移送型半導体装置の電荷レベル検出方法 |
| JPS55142486A (en) * | 1979-04-25 | 1980-11-07 | Hitachi Ltd | Ccd memory |
| US4300210A (en) * | 1979-12-27 | 1981-11-10 | International Business Machines Corp. | Calibrated sensing system |
| JPS58137181A (ja) * | 1982-02-05 | 1983-08-15 | Toshiba Corp | 半導体メモリ |
-
1983
- 1983-12-23 JP JP58242021A patent/JPS60136088A/ja active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS60136088A (ja) | 1985-07-19 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US6016268A (en) | Three transistor multi-state dynamic memory cell for embedded CMOS logic applications | |
| US4661929A (en) | Semiconductor memory having multiple level storage structure | |
| EP0130614B1 (en) | Semiconductor memory using multiple level storage structure | |
| US5023841A (en) | Double stage sense amplifier for random access memories | |
| US4070590A (en) | Sensing circuit for memory cells | |
| US4239993A (en) | High performance dynamic sense amplifier with active loads | |
| JPH0583998B2 (enrdf_load_stackoverflow) | ||
| JPS63276781A (ja) | 2進データを格納する半導体メモリ | |
| JP2007141399A (ja) | 半導体装置 | |
| JP2719237B2 (ja) | ダイナミック型半導体記憶装置 | |
| JPS5922316B2 (ja) | ダイナミツクメモリ装置 | |
| CN101393771A (zh) | 半导体器件和dram控制器 | |
| KR20030078620A (ko) | 리프레쉬 동작이 불필요한 메모리 셀을 구비하는 반도체기억 장치 | |
| US6292418B1 (en) | Semiconductor memory device | |
| US4288706A (en) | Noise immunity in input buffer circuit for semiconductor memory | |
| JP3794326B2 (ja) | 負電圧生成回路及びこれを備えた強誘電体メモリ回路並びに集積回路装置 | |
| US4280070A (en) | Balanced input buffer circuit for semiconductor memory | |
| JPS6011393B2 (ja) | 感知増幅器 | |
| US6925017B2 (en) | Semiconductor device | |
| US4484312A (en) | Dynamic random access memory device | |
| KR100674105B1 (ko) | 다치 디램 | |
| JPH0561719B2 (enrdf_load_stackoverflow) | ||
| JP3823550B2 (ja) | メモリーセルの読出・書込回路 | |
| US4794569A (en) | Semiconductor memory having a barrier transistor between a bit line and a sensing amplifier | |
| JP2622179B2 (ja) | ダイナミック型半導体記憶装置 |