JPH0555414A - Coating method for fine part - Google Patents

Coating method for fine part

Info

Publication number
JPH0555414A
JPH0555414A JP21778791A JP21778791A JPH0555414A JP H0555414 A JPH0555414 A JP H0555414A JP 21778791 A JP21778791 A JP 21778791A JP 21778791 A JP21778791 A JP 21778791A JP H0555414 A JPH0555414 A JP H0555414A
Authority
JP
Japan
Prior art keywords
substrate
resin
coating
chip
masking agent
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP21778791A
Other languages
Japanese (ja)
Inventor
Keisuke Tanaka
計輔 田中
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu General Ltd
Original Assignee
Fujitsu General Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu General Ltd filed Critical Fujitsu General Ltd
Priority to JP21778791A priority Critical patent/JPH0555414A/en
Publication of JPH0555414A publication Critical patent/JPH0555414A/en
Pending legal-status Critical Current

Links

Landscapes

  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Non-Metallic Protective Coatings For Printed Circuits (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)

Abstract

PURPOSE:To coat bare chip components mounted on a small ceramic substrate with protective resin without any protrusion from the substrate. CONSTITUTION:Spile substrate 3 are alternately provided in the vertical and lateral directions of a small ceramic substrate 2 and a masking agent 8 is printed through a screen mask on the part except for the region where bare chip components 6 are resin-coated.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】計測器のセンサー等に使用される
狭小なセラミック基板等に実装されたベアチップ部品に
保護コーティングを部分的に施す技術に関するものであ
る。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a technique for partially applying a protective coating to bare chip parts mounted on a narrow ceramic substrate used for sensors of measuring instruments.

【0002】[0002]

【従来の技術】従来、計測器のセンサー等に使用される
セラミック基板は狭小な短冊型で両面に印刷回路が施さ
れており、基板にチップ部品を実装したり保護コーティ
ング等を施す作業をするためには、狭小な基板を単品で
取扱うことは自動機の面からも能率的にも不利であるこ
とから集合基板として取扱えるようにしていた。また、
表裏の回路を接続するスルーホールを狭小な基板内に設
けると割れ易いため、図2に示す如く単品基板2の連設
でなく交互に捨て基板部3を設けて、その分割ライン4
上にスルーホール5を設けた集合基板1とし、ベアチッ
プ部品6をダイボンドしワイヤーボンディングした後チ
ップ部品9を搭載し、保護樹脂7を自動定量吐出機にて
コーティングした後、捨て基板部3を分割治具で挟持し
分割して単品基板2の完成品としていた。
2. Description of the Related Art Conventionally, a ceramic substrate used for a sensor or the like of a measuring instrument is a narrow strip type and printed circuits are provided on both sides, and a chip component is mounted on the substrate or a protective coating is applied. For this reason, handling a small substrate as a single item is disadvantageous both in terms of an automatic machine and in efficiency, so that it is handled as a collective substrate. Also,
Since through holes for connecting the front and back circuits are provided in a narrow board, the through holes are easily broken. Therefore, as shown in FIG.
The aggregate substrate 1 having the through holes 5 formed thereon is formed, the bare chip component 6 is die-bonded and wire-bonded, then the chip component 9 is mounted, the protective resin 7 is coated with an automatic constant-volume dispenser, and the discarded substrate portion 3 is divided. It was sandwiched by a jig and divided to obtain a finished single substrate 2.

【0003】[0003]

【発明が解決しようとする課題】前述のように、狭小な
短冊型のセラミックの両面基板に表裏の回路を接続する
スルーホールを設けると割れ易くなるため、単品基板の
連設でなく交互に捨て基板部を設けた集合基板とし、そ
の分割ライン上にスルーホールを設けてチップ部品を実
装し保護樹脂をコーティングした場合、基板が狭小で、
またワイヤーポンディングした微細部分に樹脂を浸透さ
せるため粘性を低くする必要があり、そのためコーティ
ング樹脂が分割ラインの外側にはみ出し固化してしまう
ため、集合基板を分割して単品基板としたとき、はみ出
したコーティング樹脂がバリとなり所定のケースに収納
できなくなるため、バリ削りをする必要があった。
As described above, when a narrow rectangular ceramic double-sided board is provided with through-holes for connecting the front and back circuits, cracks easily occur. If the board is a collective board, through holes are provided on the dividing lines, chip components are mounted, and protective resin is coated, the boards are narrow,
In addition, it is necessary to lower the viscosity in order to penetrate the resin into the fine parts that are wire-bonded, and as a result the coating resin sticks out of the dividing line and solidifies. Since the coating resin becomes burrs and cannot be stored in a predetermined case, it is necessary to remove burrs.

【0004】[0004]

【課題を解決するための手段】上記課題を解決するため
に、印刷回路が施されチップ部品を実装し部分的に樹脂
コーティングをして分割するようにした狭小な集合基板
において、チップ部品を実装し樹脂コーティングをする
部分を除きコーティング樹脂と親和しない剥離型マスキ
ング剤を予め印刷することを特徴とする微細部分コーテ
ィング法を提供する。
In order to solve the above-mentioned problems, chip components are mounted on a narrow collective substrate on which printed circuits are mounted and chip components are partially coated with resin to divide the chip substrate. Provided is a fine partial coating method, which comprises pre-printing a release-type masking agent that is incompatible with the coating resin except for the portion to be coated with the resin.

【0005】[0005]

【作用】前述のように、印刷回路が施されチップ部品を
実装し部分的に樹脂コーティングをして分割するように
した狭小な集合基板において、チップ部品を実装し樹脂
コーティングをする部分を除きコーティング樹脂と親和
しないマスキング剤を予め印刷し、しかる後ベアチップ
部品を搭載しワイヤーボンディングをして吐出機による
樹脂コーティングを行い、コーティング樹脂の固化後マ
スキング剤を剥離し他のチップ部品を実装する。
As described above, in a narrow collective substrate on which the printed circuit is provided and the chip parts are mounted and the resin is partially coated to divide the chip, the chip parts are mounted and the coating is performed except for the resin coating. A masking agent that is not compatible with the resin is printed in advance, then bare chip parts are mounted, wire bonding is performed, resin coating is performed by a discharge machine, and after the coating resin is solidified, the masking agent is peeled off and other chip parts are mounted.

【0006】[0006]

【実施例】以下、この発明の実施例を図面を参照しなが
ら詳細に説明する。図1は本発明による微細部分コーテ
ィング法を示した一実施例の部分平面図である。
Embodiments of the present invention will be described in detail below with reference to the drawings. FIG. 1 is a partial plan view of an embodiment showing a fine partial coating method according to the present invention.

【0007】図において、1は縦横に連設された集合基
板であって、両面に印刷回路が施されている単品基板2
の縦と横には交互に捨て基板部3が設けられている。単
品基板2と捨て基板部3との分割ライン4の上には複数
のスルーホール5が設けられており表裏の回路をそれぞ
れ接続している。6はベアチップ部品であって、ダイボ
ンディングした後ワイヤーボンディングされ、保護のた
め樹脂コーティング7が施される。従ってこの樹脂コー
ティング7部分以外は後付部品やメッキ端子等など半田
付け不要部分の保護処理剤として使用される剥離型のマ
スキング剤8、例えばシリコン系若しくはフッソ系マス
キング剤が一般のチップ部品9の接続ランドの上にもス
クリーンマスクにて印刷される。
In the figure, reference numeral 1 is a collective substrate which is vertically and horizontally arranged, and is a single substrate 2 having printed circuits on both sides.
The discarding substrate portions 3 are alternately provided in the vertical and horizontal directions. A plurality of through holes 5 are provided on the dividing line 4 between the single-piece substrate 2 and the discarded substrate portion 3 to connect the front and back circuits, respectively. A bare chip component 6 is die-bonded and then wire-bonded, and a resin coating 7 is applied for protection. Therefore, except for the resin coating 7 part, a peeling-type masking agent 8 used as a protective treatment agent for parts not to be soldered such as post-applied parts, plated terminals, etc. A screen mask is also printed on the connection land.

【0008】以上のように構成された集合基板1に樹脂
コーティング7を施す部分以外にマスキング剤8をスク
リーンマスクで印刷塗布した後、ベアチップ部品をダイ
ボンドすると共にワイヤーボンディングし、樹脂を吐出
機にてコーティングして固化し、マスキング剤8を剥離
した後一般のチップ部品を実装してリフローし、捨て基
板部3を分割治具に挟持させて分割し単品基板2を完成
させる。
After the masking agent 8 is applied by printing with a screen mask on a portion other than the portion where the resin coating 7 is applied to the collective substrate 1 configured as described above, the bare chip parts are die-bonded and wire-bonded, and the resin is discharged by an ejector. After coating and solidification, the masking agent 8 is peeled off, a general chip component is mounted and reflowed, and the discarded substrate portion 3 is held by a dividing jig and divided to complete the single substrate 2.

【0009】[0009]

【発明の効果】前述のように、印刷回路が施されチップ
部品を実装し部分的に樹脂コーティングをして分割する
ようにした狭小な集合基板において、チップ部品を実装
し樹脂コーティングをする部分を除きコーティング樹脂
と親和しないマスキング剤を予め印刷することにより、
チップ部品を搭載しワイヤーボンディングをした後、吐
出機による樹脂コーティングを行っても表面張力の作用
でマスキング剤の塗布されている範囲内に樹脂コーティ
ングできることは、マスキング工程の追加のみで通常の
作業工程がとれ、バリ削りが不要で均一なコーティング
形状の基板が得られコスト低減に寄与すること顕著であ
る。
As described above, in a narrow collective substrate on which a printed circuit is mounted and chip parts are mounted, and a resin coating is partially performed for division, a portion where the chip parts are mounted and the resin coating is performed is performed. Except for printing a masking agent that is not compatible with the coating resin beforehand,
Even after the chip parts are mounted and wire bonding is performed, the resin coating can be performed within the range where the masking agent is applied by the effect of the surface tension even if the resin coating is performed by the dispenser. It is remarkable that the substrate having a uniform coating shape can be obtained without the need for burring, which contributes to cost reduction.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の微細部分コーティング法を示した一実
施例の部分平面図である。
FIG. 1 is a partial plan view of an embodiment showing a fine partial coating method of the present invention.

【図2】従来の微細部分コーティング法を示した一実施
例の平面図である。
FIG. 2 is a plan view of an embodiment showing a conventional fine partial coating method.

【符号の説明】[Explanation of symbols]

1 集合基板 2 単品基板 3 捨て基板部 4 分割ライン 5 スルーホール 6 ベアチップ部品 7 樹脂コーティング 8 マスキング剤 9 チップ部品 1 Assembly board 2 Single board 3 Discarded board part 4 Dividing line 5 Through hole 6 Bare chip part 7 Resin coating 8 Masking agent 9 Chip part

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】印刷回路が施されチップ部品を実装し部分
的に樹脂コーティングをして分割するようにした狭小な
集合基板において、チップ部品を実装し樹脂コーティン
グをする部分を除きコーティング樹脂と親和しない剥離
型マスキング剤を予め印刷することを特徴とする微細部
分コーティング法。
1. A narrow aggregate substrate on which a printed circuit is mounted, chip components are mounted, and a resin coating is partially performed to divide the chip substrate. A fine partial coating method characterized by pre-printing a peelable masking agent.
JP21778791A 1991-08-29 1991-08-29 Coating method for fine part Pending JPH0555414A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP21778791A JPH0555414A (en) 1991-08-29 1991-08-29 Coating method for fine part

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP21778791A JPH0555414A (en) 1991-08-29 1991-08-29 Coating method for fine part

Publications (1)

Publication Number Publication Date
JPH0555414A true JPH0555414A (en) 1993-03-05

Family

ID=16709721

Family Applications (1)

Application Number Title Priority Date Filing Date
JP21778791A Pending JPH0555414A (en) 1991-08-29 1991-08-29 Coating method for fine part

Country Status (1)

Country Link
JP (1) JPH0555414A (en)

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