JP2543869Y2 - Partial coating structure - Google Patents

Description

[Detailed description of the invention]

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a technique for partially applying a protective coating to a bare chip component mounted on a multi-cavity ceramic substrate of a hybrid IC sealed with a sensor of a small measuring instrument.

[0002]

2. Description of the Related Art Conventionally, a ceramic substrate of a hybrid IC sealed to a sensor of a narrow measuring instrument or the like has a narrow rectangular shape (approximately 3 mm × 20 mm) on which printed circuits are formed on both sides, and a chip component is provided on the substrate. In order to work on mounting a small board or applying a protective coating, it was not efficient to operate a narrow board as a single item in both automatic machine operation and manual work, so it was handled as a multiple board board .
However, as shown in FIG. 2, the size of the chip component 7 to be mounted and the board width are close to each other. Therefore, if the main body board 2 is connected continuously, there is no place to be sandwiched at the time of division due to the narrow board. When applied, the adjacent resins are fused and fixed to each other and cannot be divided. Therefore, instead of connecting the main body substrates 2, the disposal substrates 3 are alternately provided to facilitate handling, and the solder paste for mounting the chip components 7 is used. After printing and coating, the chip component 7 is placed thereon, reflowed and mounted, the substrate is washed, and the bare chip component (unwired semiconductor element) 8 is die-bonded and wire-bonded.
After the protective resin 9 is coated on the bare chip component 8 by a discharger and solidified, the discarded substrate 3 is sandwiched and divided by a dividing jig to complete the main substrate 2.

[0003]

As described above, in order to make it easier to handle narrow and narrow ceramic substrates, instead of connecting a single product substrate, a multi-surface substrate having alternately disposed substrate portions is used. When a bare chip component is mounted and partially coated with a protective resin, it is necessary to reduce the viscosity of the resin in order to allow the resin to penetrate the wire-bonded fine parts of the bare chip component. It is easy to protrude outside beyond the dividing line with no discarded substrate, and if it is individualized, it will become burrs when dividing the multi-sided substrate, so if the resin is removed before curing and corrected, but burrs occur In such a case, since it cannot be stored in a predetermined case, it is necessary to perform burr cutting and adjust to a predetermined size.

[0004]

In order to solve the above-mentioned problems, a printed circuit board is mounted, and a chip substrate is mounted and a resin substrate is partially coated. In this multi-sided board, linear conductor lands are provided on both side edges of the main board along the division line with the discarded board, solder paste is printed and applied to the linear conductor lands, and resin flows out simultaneously with reflow of chip component welding. A partial coating structure characterized by forming a solder dam for prevention.

[0005]

As described above, linear conductor lands are provided on both side edges of a main substrate on which a printed circuit is mounted and chip components are mounted and partially resin-coated, and a solder paste is printed and applied to the linear conductor lands. However, by forming a solder dam to prevent resin outflow at the same time as reflow of chip component welding, even if resin with reduced viscosity is coated, it can be blocked by the solder dam, and it is possible to remove and correct the resin before curing Burrs do not occur on the divided end faces, and they are not scraped off.

[0006]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Embodiments of the present invention will be described below in detail with reference to the drawings. FIG. 1A is a partial plan view of an embodiment of a partial coating structure according to the present invention, and FIG. 1B is a cross-sectional view showing the state.

In FIG. 1, reference numeral 1 denotes a main substrate 2 and a discard substrate 3.
Is a multi-faced board provided vertically and horizontally and alternately via division lines 4, and is a linear conductor for forming solder dams 6 with printed circuits at both ends along the division lines 4 of the main body substrate 2. The land 5 is provided independently of the circuit, the solder paste is applied together with the chip component 7, and after the chip component 7 is placed, the solder dam 6 is formed by reflow. Even if the linear conductor lands 5 provided on both side ends of the main body substrate 2 are provided on both side ends of the discarded substrate 3, the same effect can be obtained because the groove of the dividing line 4 is so fine that neither width nor depth can be seen. Can be

The chip component 7 is mounted on the multi-faced substrate 1 constructed as described above, washed, the bare chip component 8 is die-bonded and wire-bonded, and the resin 9 for protecting the bare chip component 8 is dispensed in a fixed quantity dispenser. After the resin 9 is solidified, the discarded substrate 3 is clamped by a dividing jig and divided to complete the main substrate 2.

[0009]

As described above, linear conductor lands are provided on both ends of a main board on which a printed circuit is mounted and chip components are mounted and partially resin-coated, and solder paste is applied to the linear conductor lands. By forming a solder dam to prevent resin outflow at the same time by printing application and reflow of chip component welding, even if resin with reduced viscosity is coated, it can be blocked by the solder dam and removed and corrected before curing Since no burr occurs on the divided end face,
It is remarkable that the productivity is improved together with the quality improvement, which contributes to cost reduction.

[Brief description of the drawings]

FIG. 1 is a partial plan view of an embodiment of a partial coating structure according to the present invention, and FIG.

FIG. 2 is a plan view showing a state of an embodiment of a conventional partial coating structure.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Multi-sided board 2 Main board 3 Discard board 4 Split line 5 Linear conductor land 6 Solder dam 7 Chip component 8 Bare chip component 9 Resin

──────────────────────────────────────────────────続 き Continued on the front page (51) Int.Cl. ⁶ Identification code Agency reference number FI Technical display location H05K 3/28 H05K 3/28 G

Claims (2)

(57) [Scope of request for utility model registration] 1. A multi-faced board on which a printed circuit is mounted and chip parts are mounted and a resin substrate is partially coated with a resin substrate, and the substrate is alternately divided. Along the both sides of the main board, linear conductor lands are provided, and solder paste is printed and applied to the linear conductor lands to form a solder dam for preventing resin outflow simultaneously with reflow of chip component welding. Partial coating structure. 2. The partial coating structure according to claim 1, wherein the linear conductor lands are provided on both ends of the discarded substrate along a dividing line with the main substrate in the multi-faced substrate.