JPH04368196A - Printed substrate - Google Patents
Printed substrateInfo
- Publication number
- JPH04368196A JPH04368196A JP14456491A JP14456491A JPH04368196A JP H04368196 A JPH04368196 A JP H04368196A JP 14456491 A JP14456491 A JP 14456491A JP 14456491 A JP14456491 A JP 14456491A JP H04368196 A JPH04368196 A JP H04368196A
- Authority
- JP
- Japan
- Prior art keywords
- printed substrate
- connection land
- printed circuit
- semiconductor element
- circuit board
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000000758 substrate Substances 0.000 title abstract 9
- 239000004065 semiconductor Substances 0.000 claims abstract description 28
- 229910000679 solder Inorganic materials 0.000 claims abstract description 20
- 230000008646 thermal stress Effects 0.000 abstract description 4
- 238000010438 heat treatment Methods 0.000 abstract description 3
- 230000008642 heat stress Effects 0.000 abstract 1
- WABPQHHGFIMREM-UHFFFAOYSA-N lead(0) Chemical compound [Pb] WABPQHHGFIMREM-UHFFFAOYSA-N 0.000 description 12
- 238000000034 method Methods 0.000 description 2
- 239000000919 ceramic Substances 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 239000000155 melt Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/341—Surface mounted components
- H05K3/3421—Leaded components
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/42—Plated through-holes or plated via connections
Landscapes
- Electric Connection Of Electric Components To Printed Circuits (AREA)
Abstract
Description
【０００１】0001
【産業上の利用分野】この発明はプリント基板に関し、
特に実装される表面実装用半導体素子との固着の改良に
関するものである。[Industrial Application Field] This invention relates to printed circuit boards.
In particular, the present invention relates to an improvement in adhesion to a surface-mounted semiconductor element to be mounted.
【０００２】0002
【従来の技術】図２は表面実装用半導体素子を実装した
従来のプリント基板接続ランドを示す断面図である。図
において、１はモールドされた半導体素子１ａとそのリ
ード線１ｂでなる表面実装用半導体素子、２はプリント
基板の接続ランド、３はプリント基板の接続ランド２に
リード線１ｂを固着させる半田である。2. Description of the Related Art FIG. 2 is a sectional view showing a conventional printed circuit board connection land on which a surface-mounted semiconductor element is mounted. In the figure, 1 is a surface mounting semiconductor element consisting of a molded semiconductor element 1a and its lead wire 1b, 2 is a connection land of a printed circuit board, and 3 is a solder for fixing the lead wire 1b to the connection land 2 of the printed circuit board. .
【０００３】次にこのプリント基板に表面実装用半導体
素子１が表面実装される過程について説明する。まず、
プリント基板の接続ランド２の部分に印刷機（図示せず
）などを使用して半田ペーストを所定量印刷する。次に
表面実装用半導体素子１をプリント基板上の所定位置、
即ちプリント基板の接続ランド２上に部品搭載機（図示
せず）などを使用してリード線１ｂの固着面を正確に位
置決めして搭載する。最後にプリント基板全体をリフロ
ーなどの熱加熱処理をすることにより半田ペーストが溶
融しプリント基板の接続ランドと表面実装用半導体素子
１のリード線１ｂは半田により固着される。Next, the process of surface mounting the surface mounting semiconductor element 1 on this printed circuit board will be explained. first,
A predetermined amount of solder paste is printed on the connection land 2 portion of the printed circuit board using a printing machine (not shown) or the like. Next, the surface mounting semiconductor element 1 is placed at a predetermined position on the printed circuit board.
That is, the lead wire 1b is mounted on the connection land 2 of the printed circuit board by using a component mounting machine (not shown) or the like to accurately position the fixed surface of the lead wire 1b. Finally, the solder paste is melted by subjecting the entire printed circuit board to a heat treatment such as reflow, and the connection lands of the printed circuit board and the lead wires 1b of the surface mounting semiconductor element 1 are fixed by solder.
【０００４】0004
【発明が解決しようとする課題】従来のプリント基板を
使用した表面実装用半導体素子の実装は以上のように行
っていた。最近、表面実装用半導体素子リード線のピッ
チが段々と極微少ピッチ（例０．５ｍｍ）となると共に
巾も狭く（例０．２５ｍｍ）なるので、プリント基板の
接続ランドと接続されている表面実装用半導体素子リー
ド線の間が熱ストレスなどにより破断するという問題点
があった。[Problems to be Solved by the Invention] Conventionally, surface mounting semiconductor elements are mounted using printed circuit boards as described above. Recently, the pitch of semiconductor element lead wires for surface mounting has become increasingly finer (e.g. 0.5 mm) and the width has become narrower (e.g. 0.25 mm). There has been a problem in that the gaps between the semiconductor element lead wires may break due to thermal stress or the like.
【０００５】この発明は上記のように問題点を解消する
ためになされたもので、プリント基板の接続ランドと表
面実装用半導体素子リード線の間が熱ストレスなどによ
り破断しないプリント基板を得ることを目的とする。The present invention has been made to solve the above-mentioned problems, and aims to provide a printed circuit board in which the connection land of the printed circuit board and the surface mounting semiconductor element lead wire do not break due to thermal stress or the like. purpose.
【０００６】[0006]
【課題を解決するための手段】この発明に係るプリント
基板は、表面実装用半導体素子が固着される各接続ラン
ドの直下部分に半田が入り込む少なくとも１個の貫通穴
を設けたものである。[Means for Solving the Problems] A printed circuit board according to the present invention is provided with at least one through hole into which solder enters directly below each connection land to which a surface mounting semiconductor element is fixed.
【０００７】[0007]
【作用】この発明のプリント基板は、接続ランド直下の
貫通穴が半田付着面積を拡大し固着力を増大させる。[Function] In the printed circuit board of the present invention, the through hole directly below the connection land expands the solder adhesion area and increases the adhesion force.
【０００８】[0008]
実施例１．以下、この発明の実施例１を図について説明
する。図１はこの発明の実施例１で表面実装用半導体素
子を実装したプリント基板接続ランドを示す断面図であ
る。図において、１はモールドされた半導体素子１ａと
そのリード線１ｂでなる表面実装用半導体素子、４はプ
リント基板の接続ランド、４ａはプリント基板の各接続
ランド４直下部分に少なくとも１個この場合２個設けら
れた貫通穴、５はリード線１ｂとプリント基板接続ラン
ド４間および貫通穴４ａ部に溶融固着した半田で５ａは
貫通穴４ａ部に固着した部分を示している。Example 1. Embodiment 1 of the present invention will be described below with reference to the drawings. FIG. 1 is a sectional view showing a printed circuit board connection land on which a surface-mounted semiconductor element is mounted according to a first embodiment of the present invention. In the figure, 1 is a surface mounting semiconductor element consisting of a molded semiconductor element 1a and its lead wire 1b, 4 is a connection land of a printed circuit board, and 4a is at least one connection land directly below each connection land 4 of the printed circuit board. The solder 5 is melted and fixed to the through hole 4a between the lead wire 1b and the printed circuit board connection land 4, and 5a is the solder fixed to the through hole 4a.
【０００９】次にこのプリント基板に表面実装用半導体
素子１が表面実装される過程について説明する。まず、
プリント基板の接続ランド４の部分に印刷機（図示せず
）などを使用して半田ペーストを所定量印刷する。次に
表面実装用半導体素子１をプリント基板上の所定位置、
即ちプリント基板の接続ランド２上に部品搭載機（図示
せず）などを使用してリード線１ｂの固着面を正確に位
置決めして搭載する。最後にプリント基板全体をリフロ
ーなどの熱加熱処理をすることにより半田ペーストが溶
融して貫通穴４ａ部にも入り込み、プリント基板の接続
ランド４側の半田付着面積が拡大された状態でリード線
１ｂがプリント基板に確実に固着されている。Next, the process of surface mounting the surface mounting semiconductor element 1 on this printed circuit board will be explained. first,
A predetermined amount of solder paste is printed on the connection land 4 portion of the printed circuit board using a printing machine (not shown) or the like. Next, the surface mounting semiconductor element 1 is placed at a predetermined position on the printed circuit board.
That is, the lead wire 1b is mounted on the connection land 2 of the printed circuit board by using a component mounting machine (not shown) or the like to accurately position the fixed surface of the lead wire 1b. Finally, by subjecting the entire printed circuit board to a heat treatment such as reflow, the solder paste melts and enters the through hole 4a, expanding the solder adhesion area on the connection land 4 side of the printed circuit board and leaving the lead wire 1b. is firmly fixed to the printed circuit board.
【００１０】実施例２．なお、上記実施例１ではプリン
ト基板を用いた場合を示すが、これらの材料はこれに限
定されるものではなく、例えばセラミック基板であって
も同様の効果を奏する。Example 2. In addition, although the case where a printed circuit board is used is shown in the said Example 1, these materials are not limited to this, For example, even if it is a ceramic board, a similar effect will be produced.
【００１１】[0011]
【発明の効果】以上のように、この発明によれば表面実
装用半導体素子が固着されるプリント基板の各接続ラン
ドの直下部分に半田が入り込む少なくとも１個の貫通穴
を設けるので、半田付着面積が拡大し固着力を増大する
ことができ、プリント基板の接続ランドと表面実装用半
導体素子リード線の間が熱ストレスなどにより破断しな
いプリント基板が得られる効果がある。As described above, according to the present invention, at least one through hole into which solder enters is provided directly under each connection land of a printed circuit board to which a surface mounting semiconductor element is fixed, so that the solder adhesion area can be reduced. This has the effect of providing a printed circuit board that does not break due to thermal stress or the like between the connection land of the printed circuit board and the surface mounting semiconductor element lead wire.
【図１】この発明の実施例１で表面実装用半導体素子を
実装したプリント基板接続ランドを示す断面図である。FIG. 1 is a sectional view showing a printed circuit board connection land on which a surface mounting semiconductor element is mounted in Example 1 of the present invention.
【図２】従来のプリント基板接続ランドを示す断面図で
ある。FIG. 2 is a sectional view showing a conventional printed circuit board connection land.
１ 表面実装用半導体素子 １ｂ リード線 ４ プリント基板接続ランド ４ａ 貫通穴 ５ 半田 ５ａ 貫通穴部の半田 1 Semiconductor element for surface mounting 1b Lead wire 4 Printed circuit board connection land 4a Through hole 5 Solder 5a Solder in the through hole
Claims (2)
固着し実装するプリント基板において、上記表面実装用
半導体素子が固着される各接続ランドの直下部分に上記
半田が入り込む少なくとも１個の貫通穴を設けたことを
特徴とするプリント基板。1. In a printed circuit board to which a surface mount semiconductor element is fixed and mounted via solder, at least one through hole into which the solder enters a portion immediately below each connection land to which the surface mount semiconductor element is fixed. A printed circuit board characterized by being provided with.
表面実装用半導体素子を実装して所定の回路形成をした
半導体回路装置モジュール。Claim 2: Using the printed circuit board according to claim 1,
A semiconductor circuit device module in which surface-mount semiconductor elements are mounted to form a predetermined circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP14456491A JPH04368196A (en) | 1991-06-17 | 1991-06-17 | Printed substrate |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP14456491A JPH04368196A (en) | 1991-06-17 | 1991-06-17 | Printed substrate |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH04368196A true JPH04368196A (en) | 1992-12-21 |
Family
ID=15365176
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP14456491A Pending JPH04368196A (en) | 1991-06-17 | 1991-06-17 | Printed substrate |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH04368196A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| FR2723501A1 (en) * | 1994-08-05 | 1996-02-09 | Info Realite | Reflow soldering method for electronic surface mounted component cards |
| EP1565047A1 (en) * | 2004-02-10 | 2005-08-17 | Delphi Technologies, Inc. | Circuit board surface mount package |
-
1991
- 1991-06-17 JP JP14456491A patent/JPH04368196A/en active Pending
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| FR2723501A1 (en) * | 1994-08-05 | 1996-02-09 | Info Realite | Reflow soldering method for electronic surface mounted component cards |
| EP1565047A1 (en) * | 2004-02-10 | 2005-08-17 | Delphi Technologies, Inc. | Circuit board surface mount package |
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