JPH03194994A - Solder-connecting method for surface mounting ic package - Google Patents

Solder-connecting method for surface mounting ic package

Info

Publication number
JPH03194994A
JPH03194994A JP33353089A JP33353089A JPH03194994A JP H03194994 A JPH03194994 A JP H03194994A JP 33353089 A JP33353089 A JP 33353089A JP 33353089 A JP33353089 A JP 33353089A JP H03194994 A JPH03194994 A JP H03194994A
Authority
JP
Japan
Prior art keywords
solder
package
pads
waviness
terminal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP33353089A
Other languages
Japanese (ja)
Inventor
Akihiro Sasaki
佐々木 晶裕
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP33353089A priority Critical patent/JPH03194994A/en
Publication of JPH03194994A publication Critical patent/JPH03194994A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/341Surface mounted components
    • H05K3/3431Leadless components
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/3457Solder materials or compositions; Methods of application thereof

Abstract

PURPOSE:To perform stable soldering with less solder unconnection and less solder bridge by supplying solder of an optimum amount to the connecting terminals of IC packages if a plurality of multipin IC packages each having large warpage or waviness is placed on a board having a large area, warpage, waviness. CONSTITUTION:A metal screen 6 having an opening area 7 corresponding to a connecting terminal 2 of an IC package l is formed, aligned at the terminal l of the package 1, and solder creams 3 are printed by using the screen 6. Then, the package 1 is so aligned that the creams 3 correspond to pads 4 on a substrate 5, heated to be melted, and the terminal 2 is connected to the pads 4 with a large quantity of solder 8 at a part hawing a wide interval between the terminal 2 and the pads 4 and with a small quantity of solder 8 at a part having a narrow interval in response to the warpage and waviness of the package 1.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は表面装着用ICパッケージの多層配線用基板へ
の半田接続方法に係り、特に半田供給量の過不足に起因
する半田未接続、半田ブリッジの発生が少ない半田付方
法に間する。
[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a method for soldering a surface-mounted IC package to a multilayer wiring board, and particularly relates to a method for soldering a surface-mounted IC package to a multilayer wiring board, and particularly relates to a method for soldering a surface-mounted IC package to a multi-layer wiring board, and in particular, for soldering and soldering caused by excessive or insufficient solder supply. Use a soldering method that reduces the occurrence of bridging.

〔従来の技術〕[Conventional technology]

従来、この種の表面装置用ICパッケージ(以下単にI
Cパッケージという)の多層配線基板上への半田接続は
、多層配線基板のパッド上にスクリーン印刷により半田
クリームを供給し、これに表面実装用ICパッケージを
位置合せして搭載し、その後、溶融加熱により半田クリ
ームをリフローさせて半田付を行なう方法が一般に用い
られている。以下第2図を用いて説明する。
Conventionally, this type of surface device IC package (hereinafter simply referred to as I
To solder connect a C package to a multilayer wiring board, solder cream is supplied onto the pads of the multilayer wiring board by screen printing, the surface mount IC package is aligned and mounted on this, and then melted and heated. A commonly used method is to perform soldering by reflowing solder cream. This will be explained below using FIG. 2.

まず第2図(a)の様に、基板5上のパッド4には実装
されるべきICパッケージ1の反りゃうねりの程度に係
らず、常に一定量の半田クリーム3が供給される。従っ
て、接続端子2とパッド4との間隔が広い部分は第2図
(b)のように、半田8の未接続が、またせまい部分は
第1図(c)の様に半田8によるブリッジが発生し易い
First, as shown in FIG. 2(a), a fixed amount of solder cream 3 is always supplied to pads 4 on substrate 5, regardless of the degree of warpage or waviness of IC package 1 to be mounted. Therefore, in the part where the distance between the connection terminal 2 and the pad 4 is wide, as shown in FIG. 2(b), the solder 8 is not connected, and in the narrow part, as shown in FIG. 1(c), there is a bridge by the solder 8. Easy to occur.

またスクリーン印刷の半田供給量の均一性の点でも、外
形寸法の大きな基板よりも外形寸法の小さいICパッケ
ージに印刷する方が反りやうねりの絶対量が小さいため
安定している。
Also, in terms of the uniformity of the amount of solder supplied in screen printing, it is more stable to print on an IC package with a small outer dimension than on a board with a large outer dimension because the absolute amount of warpage and waviness is smaller.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

しかしながら、上述した従来の基板に半田クリームをス
クリーン印刷供給する方法は下記の欠点があった。
However, the above-described conventional method of applying solder cream to a substrate by screen printing has the following drawbacks.

第一に、ICパッケージの接続端子面に反りやうねるが
ある場合、ICパッケージを基板に搭載した状態では、
基板のパッドとICパッケージの接続端子との間隔が一
様とならない。そのため、従来の様に基板の各パッドに
一定量の半田クリームを供給する方法では、上記間隔の
大きい個所では半田量が不足して半田未接続、また、間
隔の小さい個所では半田過多による半田ブリッジが発生
ずるという欠点があった。
First, if the connection terminal surface of the IC package is warped or undulating, the IC package mounted on the board may
The spacing between the pads on the board and the connection terminals on the IC package is not uniform. Therefore, with the conventional method of supplying a fixed amount of solder cream to each pad of the board, there is not enough solder in areas with large gaps, resulting in unconnected solder, and in areas with small gaps, solder bridges due to too much solder occur. It had the disadvantage that it would occur.

第二に、基板に半田クリームをスクリーン印刷する場合
、基板はICパッケージに比べて、外形寸法が大きいの
で反りやうねりの影響を受は易く、部分的に半田が供給
されなかったり、あるいは供給量が大きくばらつくとい
う問題のため、安定したICパッケージの半田接続がで
きないという欠点があった。
Second, when screen printing solder cream on a board, the board has a larger external dimension than an IC package, so it is more susceptible to warping and waviness, and solder may not be supplied in some areas, or the amount Because of the problem of large variations in the amount of solder, there was a drawback that stable solder connections of IC packages could not be made.

〔課題を解決するための手段〕[Means to solve the problem]

本発明の表面装着用ICパッケージの半田付方法は、実
装されるべき表面装着用ICパッケージの接続端子に対
応した半田クリーム供給用オープニングエリアを有する
メタルスクリーンを形成する第1の工程と、前記表面装
着用ICパッケージの前記接続端子と前記メタルスクリ
ーンの前記オープニングエリアとの位置合わせを行い、
前記接続端子上に半田クリームを印刷供給する第2の工
程と、前記表面装着用ICパッケージを搭載する基板の
パッドに、前記接続端子を位置合せして前記表面装着用
ICパッケージを複数個搭載する第3の工程と、加熱溶
融により前記接続端子と前記パッドの半田接続を行う第
4の工程とを含んで構成される。
The method for soldering a surface mount IC package of the present invention includes a first step of forming a metal screen having an opening area for supplying solder cream corresponding to the connection terminal of a surface mount IC package to be mounted; Aligning the connection terminal of the mounting IC package with the opening area of the metal screen,
A second step of printing and supplying solder cream onto the connection terminals, and aligning the connection terminals to pads of the board on which the surface-mount IC packages are mounted, and mounting a plurality of the surface-mount IC packages. The method includes a third step and a fourth step of performing solder connection between the connection terminal and the pad by heating and melting.

〔実施例〕〔Example〕

次に、本発明を図面を参照しながら詳細に説明する。 Next, the present invention will be explained in detail with reference to the drawings.

第1図(a)〜(d)は本発明の一実施例を説明するた
めの工程順に示したICバ・ソケージの断面図である。
FIGS. 1(a) to 1(d) are sectional views of an IC bar cage shown in the order of steps for explaining one embodiment of the present invention.

まず第1図(a)に示すように、ICバ・7ケージ1の
接続端子2に対応するオープニングエリア7を有するメ
タルスクリーン6を形成して、ICパッケージ1の接続
端子2に位置合せする。この時にICパッケージ1の反
りまたはうねりのため、接続端子面とメタルスクリーン
6とのギヤ・ツブがICパッケージ1の凹凸に対応して
大きくなったり小さくなったりしている。
First, as shown in FIG. 1(a), a metal screen 6 having an opening area 7 corresponding to the connection terminal 2 of the IC package 1 is formed and aligned with the connection terminal 2 of the IC package 1. At this time, due to the warping or waviness of the IC package 1, the gears and protrusions between the connection terminal surface and the metal screen 6 become larger or smaller in accordance with the unevenness of the IC package 1.

次に第1図(b)に示すように、このメタルスクリーン
6を使用して半田クリーム3を印刷する0通常スクリー
ン印刷では、ギヤ・ツブが大きし)はとクリーム供給量
は増加するので、接続端子2に供給される半田量は第1
図(b)に示したように、ギャップが小さい個所は少な
く、またギャップが大きい個所は多くなる。
Next, as shown in FIG. 1(b), the metal screen 6 is used to print the solder cream 3 (in normal screen printing, the gears and knobs are large), and the amount of cream supplied increases. The amount of solder supplied to connection terminal 2 is the first
As shown in Figure (b), there are few places where the gap is small, and there are many places where the gap is large.

次に第1図(c)に示すように、このICパッケージト
を基板5のパッド4に半田クリーム3が対応するように
位置合せをし、このまま加熱溶融すると第1図(d)の
用に、ICパッケージ1の反りとうねりに応じて、接続
端子2とパッド4との間隔が広い部分は多量の半田8で
、またせまい部分は、少量の半田8で半田付が行なわれ
る。
Next, as shown in FIG. 1(c), align this IC package so that the solder cream 3 corresponds to the pad 4 of the board 5, and heat and melt the IC package as shown in FIG. 1(d). Depending on the warpage and waviness of the IC package 1, soldering is performed with a large amount of solder 8 in areas where the distance between the connecting terminals 2 and pads 4 is wide, and with a small amount of solder 8 in the narrow areas.

〔発明の効果〕〔Effect of the invention〕

以上説明した様に、本発明の表面装着用■パッケージの
半田付方法を適用することにより、大面積の反りやうね
りの大きな基板に、反りやうねりの大きい多ビンICパ
ッケージを複数個搭載する場合、各々のICパッケージ
の接続端子に最適量の半田を供給することができるため
、半田未接続並びに半田ブリッジの発生の少ない安定し
た半田付を実現することができる。
As explained above, by applying the surface mounting package soldering method of the present invention, multiple multi-bin IC packages with large warps and waviness can be mounted on a large-area board with large warps and waviness. Since the optimal amount of solder can be supplied to the connection terminals of each IC package, stable soldering can be achieved with less occurrence of unsoldered connections and solder bridges.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の一実施例を説明するためのICパッケ
ージの断面図、第2図は従来例を説明するためのICパ
ッケージの断面図である。 1・・・ICパッケージ、2・・・接続端子、3・・・
半田クリーム、4・・・パッド、5・・・基板、6・・
・メタルスクリーン、7・・・オープニングエリア、8
・・・半田。
FIG. 1 is a sectional view of an IC package for explaining an embodiment of the present invention, and FIG. 2 is a sectional view of an IC package for explaining a conventional example. 1...IC package, 2...connection terminal, 3...
Solder cream, 4...pad, 5...board, 6...
・Metal screen, 7...Opening area, 8
···solder.

Claims (1)

【特許請求の範囲】[Claims]  実装されるべき表面装着用ICパッケージの接続端子
に対応した半田クリーム供給用オープニングエリアを有
するメタルスクリーンを形成する第1の工程と、前記表
面装着用ICパッケージの前記接続端子と前記メタルス
クリーンの前記オープニングエリアとの位置合わせを行
い、前記接続端子上に半田クリームを印刷供給する第2
の工程と、前記表面装着用ICパッケージを搭載する基
板のパッドに、前記接続端子を位置合せして前記表面装
着用ICパッケージを複数個搭載する第3の工程と、加
熱溶融により前記接続端子と前記パッドの半田接続を行
う第4の工程とを含むことを特徴とする表面実装用IC
パッケージの半田接続方法。
a first step of forming a metal screen having an opening area for supplying solder cream corresponding to the connection terminal of the surface mount IC package to be mounted; A second step aligns with the opening area and prints and supplies solder cream onto the connection terminal.
a third step of aligning the connection terminals to the pads of the board on which the surface-mount IC packages are mounted and mounting a plurality of the surface-mount IC packages; and a fourth step of soldering the pads.
Package solder connection method.
JP33353089A 1989-12-22 1989-12-22 Solder-connecting method for surface mounting ic package Pending JPH03194994A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP33353089A JPH03194994A (en) 1989-12-22 1989-12-22 Solder-connecting method for surface mounting ic package

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP33353089A JPH03194994A (en) 1989-12-22 1989-12-22 Solder-connecting method for surface mounting ic package

Publications (1)

Publication Number Publication Date
JPH03194994A true JPH03194994A (en) 1991-08-26

Family

ID=18267074

Family Applications (1)

Application Number Title Priority Date Filing Date
JP33353089A Pending JPH03194994A (en) 1989-12-22 1989-12-22 Solder-connecting method for surface mounting ic package

Country Status (1)

Country Link
JP (1) JPH03194994A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2845520A1 (en) * 2002-10-04 2004-04-09 Wavecom Reconditioning of an assembly of conducting elements distributed on the lower surface of an electronic modules, notably to repair flatness, by the addition of material to the free ends of the conducting elements
US6719185B2 (en) 2001-06-27 2004-04-13 Ngk Spark Plug Co., Ltd. Substrate with top-flattened solder bumps and method for manufacturing the same

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6719185B2 (en) 2001-06-27 2004-04-13 Ngk Spark Plug Co., Ltd. Substrate with top-flattened solder bumps and method for manufacturing the same
FR2845520A1 (en) * 2002-10-04 2004-04-09 Wavecom Reconditioning of an assembly of conducting elements distributed on the lower surface of an electronic modules, notably to repair flatness, by the addition of material to the free ends of the conducting elements

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