JPS5832488A - Printed circuit board device - Google Patents

Printed circuit board device

Info

Publication number
JPS5832488A
JPS5832488A JP13112481A JP13112481A JPS5832488A JP S5832488 A JPS5832488 A JP S5832488A JP 13112481 A JP13112481 A JP 13112481A JP 13112481 A JP13112481 A JP 13112481A JP S5832488 A JPS5832488 A JP S5832488A
Authority
JP
Japan
Prior art keywords
land
solder
wiring board
printed wiring
lands
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP13112481A
Other languages
Japanese (ja)
Other versions
JPS6339117B2 (en
Inventor
健二 大谷
裕隆 遠藤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP13112481A priority Critical patent/JPS5832488A/en
Publication of JPS5832488A publication Critical patent/JPS5832488A/en
Publication of JPS6339117B2 publication Critical patent/JPS6339117B2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Electric Connection Of Electric Components To Printed Circuits (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【発明の詳細な説明】 本発明はチップ状抵抗やフラット状の集積回路体等の電
子部品の電極を印刷配線基板の導箔からなるランドに載
置して半田付けを行なう形式の印刷配線基板装置に関し
、予め接続用ランドに附着する半田の量を均一化し、隣
接ランド間の短絡を防止するようにしたものである。
Detailed Description of the Invention The present invention relates to a printed wiring board in which electrodes of electronic components such as chip resistors and flat integrated circuits are placed on lands made of conductive foil of the printed wiring board and soldered. Regarding the device, the amount of solder attached to the connecting lands is made uniform in advance to prevent short circuits between adjacent lands.

チップ状抵抗やフラットパンク状の集積回路体等の電子
部品を印刷配線基板上に載置し、その電子部品の電極を
接続用ランドに接合させて半田付けを行なうようにした
面実装形態の印刷配線基板装置においては、従来第1図
に示すように印刷配線基板1の接続用ランド2に予めデ
ツプ法によって半田を附着し、この半田耐着状態で電子
部品3を載置し、この電子部品3の電極4を第2図に示
すようにヒータブロック5により加圧することによって
半田6を溶融させて電極4をランド2に半田付けするよ
うにしている。
Surface-mount printing in which electronic components such as chip resistors and flat-punk integrated circuits are mounted on a printed wiring board, and the electrodes of the electronic components are bonded to connection lands and soldered. Conventionally, in a wiring board device, as shown in FIG. 1, solder is applied to the connecting land 2 of a printed wiring board 1 in advance by the depth method, and an electronic component 3 is mounted in this solder-resistant state. As shown in FIG. 2, the electrode 4 of No. 3 is pressurized by a heater block 5 to melt the solder 6 and solder the electrode 4 to the land 2.

従来、上記の印刷配線基板1のランド2に予め半田6を
附着するには、第3図に示すようなデツプ法が用いられ
ている。すなわち印刷配線基板1の導箔面側を半田槽の
半田噴上げ部7側にして矢印方向に移動させることによ
りランド2に半田6を附着するようにしているが、この
場合、複数個のランド2が近接配置されていると、第3
図の(、)に示すように印刷配線基板1を矢印方向に移
動させて行った場合1.半田噴上げ部7に突入する各ラ
ンド2には同図(b) 、 (C)に示すような現象が
生ずる。
Conventionally, a dip method as shown in FIG. 3 has been used to apply solder 6 to the lands 2 of the printed wiring board 1 in advance. That is, the solder 6 is attached to the lands 2 by moving the printed wiring board 1 in the direction of the arrow with the foil-conducting side of the printed wiring board 1 facing the solder spouting part 7 of the solder tank. 2 are placed close together, the 3rd
When the printed wiring board 1 is moved in the direction of the arrow as shown in (,) in the figure, 1. A phenomenon as shown in FIGS. 3(b) and 3(c) occurs on each land 2 that enters the solder spouting portion 7.

すなわち、印刷配線基板1の移動で半田噴上げ部7に突
入して行く各ランド2a、2b、2c・・・・・におい
て、先行するランドに続いて半田噴上げ部7に突入して
行くランド2b、2c・・・・・・はその先行ランドに
より半田が薄く濡れた状態になるため、半田噴上げ部7
から離脱された状態ではそれらのランド2b、2C・・
・・・・には半田eb。
That is, in each land 2a, 2b, 2c, etc. that rushes into the solder spouting portion 7 due to the movement of the printed wiring board 1, the land that rushes into the solder spouting portion 7 following the preceding land. 2b, 2c..., the solder is in a thin wet state due to the preceding lands, so the solder spouting part 7
Those lands 2b, 2C...
... is Handa eb.

6C・・・・・・が薄くかつ均一に耐着するが、先行す
るランドがないランド2aにあっては噴上げ半田を薄く
引いて行くものがないなめ、このランド2aには非常に
厚く半田6aが耐着される。
6C... adheres thinly and uniformly, but on land 2a, where there is no preceding land, there is nothing to pull the spouted solder thinly, so the solder is applied very thickly to land 2a. 6a is adhered.

このようにランド2aに厚く半田6aが耐着されるとヒ
ータブロック6で電子部品43の電極4を半田付けする
時、溶融した半田がランド2b方向に流れ出てランド2
aと2bが短絡を起すという不都合が生ずる。
If the solder 6a is thickly adhered to the land 2a in this way, when the electrode 4 of the electronic component 43 is soldered using the heater block 6, the molten solder flows out toward the land 2b and the land 2a
A disadvantage arises in that a and 2b are short-circuited.

本発明はこのような従来の欠点を解消するようにした印
刷配線基板装置を提供するもので、以下その一実施例に
ついて第4図、第6図を用いて説明する。
The present invention provides a printed wiring board device which eliminates such conventional drawbacks, and one embodiment thereof will be described below with reference to FIGS. 4 and 6.

これらの第4図、第6図において、第1図〜第3図の従
来の印刷配線基板と同一構成部分には同一−番号が附し
てあり、本発明は印刷配線基板1に複数個隣接して形成
された電子部品の接続用のランド2a、2b、2c・・
・・・・のほかに、そのランド2aの外側に半田噴上げ
部7に最初に突入する模擬ランド8を形成したものであ
る。゛ 上記模擬ランド8はランド2aよりも先行して半田噴上
げ部7に突入するもので、電子部品3の接。
4 and 6, the same components as those of the conventional printed wiring board shown in FIGS. Lands 2a, 2b, 2c for connecting electronic components formed by
In addition to . . . , a dummy land 8 that first enters the solder spouting portion 7 is formed on the outside of the land 2a.゛The above-mentioned simulated land 8 enters the solder spouting portion 7 before the land 2a, and contacts the electronic component 3.

続には関係のないものである。It is unrelated to the sequel.

このように模擬ランド8を設けることにより、第6図に
示すように印刷配線基板1を矢印方向に移動させて行っ
た場合、模擬ランド8には半田9が厚く耐着するが、ラ
ンド2aからは薄く耐着し、したがって電子部品の電極
を接続するために半田6a 、eb 、6c・・・・・
・を溶融させた場合、半田のはみ出しがなくなり、ラン
ド間の短絡が防止されるものである。
By providing the simulated land 8 in this way, when the printed wiring board 1 is moved in the direction of the arrow as shown in FIG. The solders 6a, eb, 6c...
・When melted, solder does not protrude and short circuits between lands are prevented.

なお、前記模擬ランド8に耐着された・半田9は電子部
品の接続には関係ないため、溶融はされない。
Note that the solder 9 adhered to the simulated land 8 is not melted because it is not related to the connection of electronic components.

前記模擬ランド8は独立に設けても例えばランド2aと
一体の導箔部でソルダーレジストにより半田付けに関し
て分割されたものであってもよい。
The dummy land 8 may be provided independently or may be divided into parts for soldering by a solder resist, for example, in a foil-conducting portion that is integrated with the land 2a.

6ペーニ・ また電子部品の接続用のランドは1つであってもよい。6 peni・ Further, the number of lands for connecting electronic components may be one.

本発明は以上のように印刷配線基板に電子部品の接続用
の導箔からなるランドを設け、かつ前記であり、これに
よればランドに半田を耐着させる時模擬ランドによって
電子部品の接続用ランドに耐着される半田は均一にかつ
適量に耐着され、したがって電子部品を接続する時、ラ
ンドの半田を溶融させても大きくはみ出してランド間を
短絡するようなことがなくなり、品質が良好で安定な印
刷配線基板装置が得られるもので、その効果は大である
As described above, the present invention provides a printed wiring board with a land made of conductive foil for connecting electronic components, and according to this, when making solder adhere to the land, a simulated land is used for connecting electronic components. The solder adheres to the lands evenly and in an appropriate amount, so when connecting electronic components, even if the solder on the lands melts, it will not protrude too much and cause a short circuit between the lands, resulting in good quality. A stable printed wiring board device can be obtained with this method, and the effect is great.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来の印刷配線基板への電子部品の取付は前の
状態を示す斜視図、第2図は同電子部品の電極の接続状
態を示す概略図、第3図体) 、 (b) 。 (C)は従来の印刷配線基板のランドへの半田耐着工程
を示す図、第4図は本発明の一実施例の印刷配線基板の
上面図、第6図は同ランドへの半田耐着状態を示す図で
ある。 1・・・・・・印刷配線基板、2.2a、、2b、2c
・・・・・・ランド、3・・・・・・電子部品:4・・
・・・・電極、6 、6 a 、 6 b 、 6 c
 、 9−−−−−−半田、? ・−−−−−半田噴上
げ部、8・・・・・・模擬ランド。
Fig. 1 is a perspective view showing a state before mounting an electronic component on a conventional printed wiring board, Fig. 2 is a schematic diagram showing a state of connection of electrodes of the electronic part, and Fig. 3 (b). (C) is a diagram illustrating the solder adhesion process to the land of a conventional printed wiring board, FIG. 4 is a top view of the printed wiring board according to an embodiment of the present invention, and FIG. 6 is a diagram showing the solder adhesion process to the land of the conventional printed wiring board. It is a figure showing a state. 1...Printed wiring board, 2.2a, 2b, 2c
...Land, 3...Electronic parts: 4...
... Electrode, 6, 6 a, 6 b, 6 c
, 9-------- solder, ?・---Solder spouting part, 8...Mock land.

Claims (1)

【特許請求の範囲】[Claims] 印刷配線基板に電子部品の接続用の導箔からなるランド
を設け、かつ前記ランドの近くにそのランドよりも先行
して半田噴上げ部に突入させるだめの模擬ランドを設け
たことを特徴きする印刷配線基板装置。
A land made of conductive foil for connecting electronic components is provided on the printed wiring board, and a dummy land is provided near the land to cause the solder to flow into the solder spouting portion in advance of the land. Printed wiring board equipment.
JP13112481A 1981-08-20 1981-08-20 Printed circuit board device Granted JPS5832488A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13112481A JPS5832488A (en) 1981-08-20 1981-08-20 Printed circuit board device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13112481A JPS5832488A (en) 1981-08-20 1981-08-20 Printed circuit board device

Publications (2)

Publication Number Publication Date
JPS5832488A true JPS5832488A (en) 1983-02-25
JPS6339117B2 JPS6339117B2 (en) 1988-08-03

Family

ID=15050542

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13112481A Granted JPS5832488A (en) 1981-08-20 1981-08-20 Printed circuit board device

Country Status (1)

Country Link
JP (1) JPS5832488A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60130672U (en) * 1984-02-10 1985-09-02 松下電器産業株式会社 printed wiring board
JPS61173176U (en) * 1985-04-15 1986-10-28
JPS6223478U (en) * 1985-07-25 1987-02-13

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS54124174U (en) * 1978-02-20 1979-08-30

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS54124174U (en) * 1978-02-20 1979-08-30

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60130672U (en) * 1984-02-10 1985-09-02 松下電器産業株式会社 printed wiring board
JPS61173176U (en) * 1985-04-15 1986-10-28
JPS6223478U (en) * 1985-07-25 1987-02-13

Also Published As

Publication number Publication date
JPS6339117B2 (en) 1988-08-03

Similar Documents

Publication Publication Date Title
JPS5832488A (en) Printed circuit board device
JP2646688B2 (en) Electronic component soldering method
JPH06164120A (en) Printed wiring board
JPH05129753A (en) Discrete component and printed board mounting method thereof
JPS5832486A (en) Printed circuit board device
JPH0645743A (en) Circuit board and soldering thereof
JPS635260Y2 (en)
JPS5832487A (en) Printed circuit board device
JPS63155689A (en) Method of solder-coating of printed board
JPS599996A (en) Method of temporarily fixing electronic part
JPS6352795B2 (en)
JPH067275U (en) Printed board
JPS61172395A (en) Mounting of electronic components
JPS63133695A (en) Printed wiring board
JPS5882596A (en) Printed circuit board
JP3051132B2 (en) Electronic component mounting method
JPH04269894A (en) Soldering method for surface mount component on printed circuit board
JPH08252687A (en) Cream solder and method for supplying solder
JPS6226891A (en) Packaging of circuit board
JPS6231838B2 (en)
JPH04146688A (en) Method of bonding electronic component
JPH03233995A (en) Chip parts mounting method
JPH0464275A (en) Surface mounting printed wiring board and mounting method for component thereof
JPH067274U (en) Printed board
JPH066092A (en) Part installation method