JPS6231838B2 - - Google Patents
Info
- Publication number
- JPS6231838B2 JPS6231838B2 JP56027337A JP2733781A JPS6231838B2 JP S6231838 B2 JPS6231838 B2 JP S6231838B2 JP 56027337 A JP56027337 A JP 56027337A JP 2733781 A JP2733781 A JP 2733781A JP S6231838 B2 JPS6231838 B2 JP S6231838B2
- Authority
- JP
- Japan
- Prior art keywords
- solder
- conductive patterns
- printed circuit
- circuit board
- conductive pattern
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 229910000679 solder Inorganic materials 0.000 claims description 35
- 239000006071 cream Substances 0.000 claims description 11
- 238000010521 absorption reaction Methods 0.000 claims description 5
- 238000005476 soldering Methods 0.000 claims description 4
- 238000007639 printing Methods 0.000 description 2
- 239000000969 carrier Substances 0.000 description 1
- 230000005496 eutectics Effects 0.000 description 1
- 230000004907 flux Effects 0.000 description 1
- 239000000843 powder Substances 0.000 description 1
- 230000002265 prevention Effects 0.000 description 1
- 238000007650 screen-printing Methods 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
Description
【発明の詳細な説明】
この発明は電気部品、特にフイルムキヤリア
ICなどのリード線が密に並んだ電気部品をリフ
ローでハンダ付けする際用いられるプリント基板
にかんする。[Detailed Description of the Invention] This invention relates to electrical components, particularly film carriers.
Concerns printed circuit boards used when reflow soldering electrical components such as ICs with closely arranged lead wires.
プリント基板上にフイルムキヤリアIC等の電
気部品のリードピツチに合わせて製作した導電パ
ターンの一部にクリームハンダ（共晶点ハンダを
無酸化の微少粉末にし、フラツクスの粘度を利用
してクリーム状にしたもの）を印刷し、その上に
電気部品を載せリフロー炉を通してハンダ付けす
る際、クリームハンダの印刷厚みが適当でないと
電気部品のリード間がハンダで接続されることが
あつた。この不具合を解消するにはクリームハン
ダの印刷厚さを薄くすれば良いのであるが、スク
リーン印刷状態の管理が難しくなるという欠点が
あつた。 Apply cream solder (eutectic point solder is made into a non-oxidized fine powder and made into a creamy state using the viscosity of flux When printing an electrical component, placing an electrical component on top of it, and soldering it through a reflow oven, if the printed thickness of the cream solder was not appropriate, the leads of the electrical component could be connected by solder. This problem could be solved by reducing the printing thickness of the cream solder, but this had the disadvantage that it became difficult to manage the screen printing condition.
この発明はプリント基板の導電パターン上に印
刷するクリームハンダの厚みが多少大きくなつて
も電気部品のハンダ付けを良好に行ない得るプリ
ント基板を提供することを目的とする。 SUMMARY OF THE INVENTION An object of the present invention is to provide a printed circuit board that allows electrical parts to be soldered well even if the thickness of the cream solder printed on the conductive pattern of the printed circuit board becomes somewhat large.
以下この発明の一実施例を図面にもとづいて説
明する。 An embodiment of the present invention will be described below based on the drawings.
第１図はこの発明によるプリント基板１を示す
平面図、第２図は第１図のプリント基板１にフイ
ルムキヤリアIC9を載置した状態を示す斜視図、
第３図は第２図に示すプリント基板１をリフロー
炉に通しフイルムキヤリアIC9がプリント基板１
にはんだ接続された状態を示す斜視図である。 FIG. 1 is a plan view showing a printed circuit board 1 according to the present invention, and FIG. 2 is a perspective view showing a state in which a film carrier IC 9 is placed on the printed circuit board 1 of FIG. 1.
Figure 3 shows that the printed circuit board 1 shown in Figure 2 is passed through a reflow oven and the film carrier IC 9 is attached to the printed circuit board 1.
FIG. 3 is a perspective view showing a soldered connection state.
プリント基板１の基板表面には一対の導電パタ
ーン２，３が一定距離を隔てて対向するように複
数個並べてに形成されている。そして、上記導電
パターン２，３の各端部が電気部品、この例では
フイルムキヤリアIC9のリード１０，１１を接続
するためのリード接続部４，５となつており、こ
の各リード接続部４，５から0.2〜１mm程度離れ
た箇所にハンダ吸取用導電パターン６，７が形成
されている。さらに、上記各導電パターン２，３
のリード接続部４，５と各ハンダ吸取用導電パタ
ーン６，７とを含む領域にはそれぞれクリームハ
ンダ８がスクリーン印刷されている。上述したプ
リント基板１に各リード１０，１１が導電パター
ン２，３にそれぞれ重なるようにフイルムキヤリ
アIC9を載せ、リフロー炉を通すと第３図に示す
ようにクリームハンダ８が溶融してフイルムキヤ
リアIC9がハンダ付けされる。その際、導電パタ
ーン２，３のリード接続部４，５とハンダ吸取用
導電パターン６，７以外の場所に印刷されたハン
ダは、表面張力によつて各パターン上に集まつて
くる。そして、上記リード接続部４，５の面積に
比較して、ハンダ吸取用導電パターン６，７の面
積が大きいため大部分のハンダ８は上記ハンダ吸
取用導電パターン６，７の方向へ移動して余分な
ハンダ８はハンダ吸取用導電パターン６，７に集
まる。 A plurality of pairs of conductive patterns 2 and 3 are formed on the surface of the printed circuit board 1 so as to face each other at a certain distance. Each end of the conductive patterns 2 and 3 serves as a lead connection portion 4 and 5 for connecting leads 10 and 11 of an electrical component, in this example, a film carrier IC 9 . , 5 are formed with conductive patterns 6 and 7 for solder absorption at locations approximately 0.2 to 1 mm apart. Furthermore, each of the conductive patterns 2, 3
Cream solder 8 is screen printed on the areas including the lead connection parts 4 and 5 and the solder absorbing conductive patterns 6 and 7, respectively. A film carrier IC 9 is placed on the above-mentioned printed circuit board 1 so that the leads 10 and 11 overlap the conductive patterns 2 and 3, respectively. When the film carrier IC 9 is passed through a reflow oven, the cream solder 8 is melted and the film carrier is formed as shown in FIG. IC 9 is soldered. At this time, the solder printed on the conductive patterns 2, 3 at locations other than the lead connection portions 4, 5 and the solder absorbing conductive patterns 6, 7 gathers on each pattern due to surface tension. Since the area of the solder wicking conductive patterns 6 and 7 is larger than the area of the lead connection parts 4 and 5, most of the solder 8 moves in the direction of the solder wicking conductive patterns 6 and 7. Excess solder 8 collects on conductive patterns 6 and 7 for solder absorption.
したがつて、クリームハンダ８の印刷が厚目に
行なわれても、フイルムキヤリアIC9のリード１
０，１１にハンダ８が溜つて上記リード１０，１
０あるいは１１，１１間をハンダ８で接続してし
まう恐れはない。 Therefore, even if the cream solder 8 is printed thickly, the lead 1 of the film carrier IC 9
Solder 8 accumulates on leads 0 and 11 and leads 10 and 1.
There is no risk of connecting between 0 or 11 and 11 with solder 8.
なお、上述実施例では導電パターン２，３およ
びハンダ吸取用導電パターン６，７を基板表面に
形成したが、基板裏面に上記各導電パターンを形
成し、基板表面側からプリント基板に設けたリー
ド挿入孔を通して電気部品のリードを基板裏面側
に引き出し、導電パターンのリード接続部にハン
ダ付けするようにしても何ら差支えない。また、
上述実施例ではプリント基板に装着される電気部
品としてフイルムキヤリアIC9を用いたが、他の
半導体素子やDIPタイプのスイツチやリレーでも
何ら差支えない。 In the above embodiment, the conductive patterns 2 and 3 and the solder absorbing conductive patterns 6 and 7 were formed on the surface of the board, but each of the conductive patterns described above was formed on the back of the board, and the leads were inserted into the printed circuit board from the front side of the board. There is no problem even if the lead of the electrical component is pulled out to the back side of the board through the hole and soldered to the lead connection part of the conductive pattern. Also,
In the above embodiment, a film carrier IC 9 was used as the electrical component mounted on the printed circuit board, but other semiconductor devices or DIP type switches or relays may be used.
この発明は、基板面に電気部品のリードをハン
ダ接続するための一対の導電パターンを一定距離
を隔てて対向するように複数個並べて形成すると
ともに、この一対の導電パターンの間にハンダ吸
取用導電パターンを形成し、上記導電パターンの
リード接続部とハンダ吸取用導電パターンとを含
む領域にクリームハンダを印刷したことを特徴と
する。 In this invention, a plurality of pairs of conductive patterns for soldering the leads of electrical components are formed on a board surface so as to face each other with a certain distance between them, and a conductive pattern for solder blotting is formed between the pair of conductive patterns. The present invention is characterized in that a pattern is formed and cream solder is printed on a region of the conductive pattern including the lead connection portion and the solder absorbing conductive pattern.
このため、この発明によればクリームハンダの
厚みが増しても広いハンダ吸取用導電パターンに
吸収されて電気部品のリード間がハンダで短絡さ
れるのを確実に防止することができる。しかもこ
のハンダ吸取用導電パターンは対向する一対の導
電パターンの間に形成してあるので、導電パター
ンに余つたハンダは隣接する導電パターンの方向
へ逃げることがなく、より一層短絡防止効果が向
上する。 Therefore, according to the present invention, even if the cream solder increases in thickness, it can be reliably prevented from being absorbed by the wide conductive pattern for sucking the solder and causing a short circuit between the leads of the electrical component due to the solder. Moreover, since this conductive pattern for solder blotting is formed between a pair of opposing conductive patterns, excess solder on the conductive pattern does not escape toward the adjacent conductive pattern, further improving the short-circuit prevention effect. .
さらに、導電パターン間に不要なダミーパター
ン等を形成する必要がないので、高精度、高密度
のプリント基板が提供できる。 Furthermore, since there is no need to form unnecessary dummy patterns or the like between conductive patterns, a printed circuit board with high accuracy and high density can be provided.
第１図はこの発明のプリント基板の一実施例を
示す平面図、第２図は第１図のプリント基板にフ
イルムキヤリアICを載置した状態を示す斜視
図、第３図はプリント基板にフイルムキヤリア
ICがはんだ接続された状態を示す斜視図であ
る。
１…プリント基板、２，３…導電パターン、
４，５…リード接続部、６，７…ハンダ吸取用導
電パターン、８…クリームハンダ、９…フイルム
キヤリアIC、１０，１１…リード。
FIG. 1 is a plan view showing an embodiment of the printed circuit board of the present invention, FIG. 2 is a perspective view showing a state in which a film carrier IC is mounted on the printed circuit board of FIG. 1, and FIG. carrier
FIG. 2 is a perspective view showing a state where ICs are connected by solder. 1... Printed circuit board, 2, 3... Conductive pattern,
4, 5... Lead connection portion, 6, 7... Conductive pattern for solder absorption, 8... Cream solder, 9... Film carrier IC, 10, 11... Lead.
Claims (1)
ための一対の導電パターンを一定距離を隔てて対
向するように複数個並べて形成するとともに、こ
の一対の導電パターンの間にハンダ吸取用導電パ
ターンを形成し、上記導電パターンのリード接続
部とハンダ吸取用導電パターンとを含む領域にク
リームハンダを印刷したことを特徴とするプリン
ト基板。1 A plurality of pairs of conductive patterns for soldering the leads of electrical components are formed on the board surface so as to face each other at a certain distance, and a conductive pattern for solder absorption is formed between the pair of conductive patterns. A printed circuit board characterized in that cream solder is printed on an area including the lead connection portion of the conductive pattern and the conductive pattern for solder absorption.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2733781A JPS57141992A (en) | 1981-02-25 | 1981-02-25 | Printed board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2733781A JPS57141992A (en) | 1981-02-25 | 1981-02-25 | Printed board |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS57141992A JPS57141992A (en) | 1982-09-02 |
| JPS6231838B2 true JPS6231838B2 (en) | 1987-07-10 |
Family
ID=12218242
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2733781A Granted JPS57141992A (en) | 1981-02-25 | 1981-02-25 | Printed board |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS57141992A (en) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5999475U (en) * | 1982-12-23 | 1984-07-05 | パイオニア株式会社 | Soldering structure of electronic components |
| JPS60130672U (en) * | 1984-02-10 | 1985-09-02 | 松下電器産業株式会社 | printed wiring board |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5748295A (en) * | 1980-09-05 | 1982-03-19 | Hitachi Ltd | Soldering structure |
-
1981
- 1981-02-25 JP JP2733781A patent/JPS57141992A/en active Granted
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5748295A (en) * | 1980-09-05 | 1982-03-19 | Hitachi Ltd | Soldering structure |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS57141992A (en) | 1982-09-02 |
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