JPH0552979B2 - - Google Patents

Info

Publication number
JPH0552979B2
JPH0552979B2 JP62019299A JP1929987A JPH0552979B2 JP H0552979 B2 JPH0552979 B2 JP H0552979B2 JP 62019299 A JP62019299 A JP 62019299A JP 1929987 A JP1929987 A JP 1929987A JP H0552979 B2 JPH0552979 B2 JP H0552979B2
Authority
JP
Japan
Prior art keywords
port
output
signal
data
input
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP62019299A
Other languages
English (en)
Japanese (ja)
Other versions
JPS63186362A (ja
Inventor
Tamio Shimizu
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Electric Co Ltd filed Critical Nippon Electric Co Ltd
Priority to JP62019299A priority Critical patent/JPS63186362A/ja
Publication of JPS63186362A publication Critical patent/JPS63186362A/ja
Publication of JPH0552979B2 publication Critical patent/JPH0552979B2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Multi Processors (AREA)
  • Information Transfer Systems (AREA)
  • Static Random-Access Memory (AREA)
JP62019299A 1987-01-28 1987-01-28 半導体メモリ装置 Granted JPS63186362A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62019299A JPS63186362A (ja) 1987-01-28 1987-01-28 半導体メモリ装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62019299A JPS63186362A (ja) 1987-01-28 1987-01-28 半導体メモリ装置

Publications (2)

Publication Number Publication Date
JPS63186362A JPS63186362A (ja) 1988-08-01
JPH0552979B2 true JPH0552979B2 (enrdf_load_stackoverflow) 1993-08-06

Family

ID=11995544

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62019299A Granted JPS63186362A (ja) 1987-01-28 1987-01-28 半導体メモリ装置

Country Status (1)

Country Link
JP (1) JPS63186362A (enrdf_load_stackoverflow)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8370557B2 (en) * 2008-12-19 2013-02-05 Intel Corporation Pseudo dual-port SRAM and a shared memory switch using multiple memory banks and a sideband memory

Also Published As

Publication number Publication date
JPS63186362A (ja) 1988-08-01

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Legal Events

Date Code Title Description
LAPS Cancellation because of no payment of annual fees