JPH053027B2 - - Google Patents
Info
- Publication number
- JPH053027B2 JPH053027B2 JP13469387A JP13469387A JPH053027B2 JP H053027 B2 JPH053027 B2 JP H053027B2 JP 13469387 A JP13469387 A JP 13469387A JP 13469387 A JP13469387 A JP 13469387A JP H053027 B2 JPH053027 B2 JP H053027B2
- Authority
- JP
- Japan
- Prior art keywords
- data
- processor
- control circuit
- transmission
- data memory
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Landscapes
- Multi Processors (AREA)
- Information Transfer Systems (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP13469387A JPS63298471A (ja) | 1987-05-28 | 1987-05-28 | プロセッサ間デ−タ転送装置 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP13469387A JPS63298471A (ja) | 1987-05-28 | 1987-05-28 | プロセッサ間デ−タ転送装置 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS63298471A JPS63298471A (ja) | 1988-12-06 |
| JPH053027B2 true JPH053027B2 (cs) | 1993-01-13 |
Family
ID=15134382
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP13469387A Granted JPS63298471A (ja) | 1987-05-28 | 1987-05-28 | プロセッサ間デ−タ転送装置 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS63298471A (cs) |
-
1987
- 1987-05-28 JP JP13469387A patent/JPS63298471A/ja active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS63298471A (ja) | 1988-12-06 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US4419728A (en) | Channel interface circuit providing virtual channel number translation and direct memory access | |
| US4481572A (en) | Multiconfigural computers utilizing a time-shared bus | |
| US4485438A (en) | High transfer rate between multi-processor units | |
| JPH02310664A (ja) | 共有メモリを用いた通信方式 | |
| KR920008448B1 (ko) | 데이터 프로세서 | |
| JP2618223B2 (ja) | シングルチツプマイクロコンピユータ | |
| JPH053027B2 (cs) | ||
| JPH0227696B2 (ja) | Johoshorisochi | |
| JPS592058B2 (ja) | 記憶装置 | |
| JPH0522939B2 (cs) | ||
| JP2522412B2 (ja) | プログラマブルコントロ―ラと入出力装置の間の通信方法 | |
| JPH056333A (ja) | マルチプロセサシステム | |
| JP2705955B2 (ja) | 並列情報処理装置 | |
| KR950008838B1 (ko) | 멀티미디어 지식처리를 위한 병렬처리 컴퓨터의 노드 컴퓨터 구조 | |
| JPS5921051B2 (ja) | 通信制御装置 | |
| JPS5897758A (ja) | 共有メモリの制御方式 | |
| JPS6130300B2 (cs) | ||
| JPS6143369A (ja) | マルチプロセツサシステム | |
| JPH0535507A (ja) | 中央処理装置 | |
| JPS63155254A (ja) | 情報処理装置 | |
| JPH03160544A (ja) | 直接メモリアクセス制御方式 | |
| JPH05265932A (ja) | バス制御方式 | |
| JPS6037055A (ja) | 情報処理装置 | |
| JPH0375959A (ja) | マルチプロセッサのデータ転送装置 | |
| JPS62114043A (ja) | 情報処理システム |