JPH0526273B2 - - Google Patents
Info
- Publication number
- JPH0526273B2 JPH0526273B2 JP55128598A JP12859880A JPH0526273B2 JP H0526273 B2 JPH0526273 B2 JP H0526273B2 JP 55128598 A JP55128598 A JP 55128598A JP 12859880 A JP12859880 A JP 12859880A JP H0526273 B2 JPH0526273 B2 JP H0526273B2
- Authority
- JP
- Japan
- Prior art keywords
- clock
- intermittent
- output
- circuit
- continuous
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 230000001360 synchronised effect Effects 0.000 claims description 8
- 230000010355 oscillation Effects 0.000 claims description 3
- 238000010586 diagram Methods 0.000 description 4
- 230000000630 rising effect Effects 0.000 description 4
- 230000003111 delayed effect Effects 0.000 description 3
- 238000000034 method Methods 0.000 description 3
- 230000002411 adverse Effects 0.000 description 1
- 230000005540 biological transmission Effects 0.000 description 1
- 230000004069 differentiation Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
- G11B20/00—Signal processing not specific to the method of recording or reproducing; Circuits therefor
- G11B20/10—Digital recording or reproducing
- G11B20/14—Digital recording or reproducing using self-clocking codes
- G11B20/1403—Digital recording or reproducing using self-clocking codes characterised by the use of two levels
Landscapes
- Engineering & Computer Science (AREA)
- Signal Processing (AREA)
- Signal Processing For Digital Recording And Reproducing (AREA)
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
- Synchronisation In Digital Transmission Systems (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP55128598A JPS5753811A (en) | 1980-09-18 | 1980-09-18 | Clock demodulating circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP55128598A JPS5753811A (en) | 1980-09-18 | 1980-09-18 | Clock demodulating circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5753811A JPS5753811A (en) | 1982-03-31 |
| JPH0526273B2 true JPH0526273B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) | 1993-04-15 |
Family
ID=14988725
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP55128598A Granted JPS5753811A (en) | 1980-09-18 | 1980-09-18 | Clock demodulating circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5753811A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) |
-
1980
- 1980-09-18 JP JP55128598A patent/JPS5753811A/ja active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS5753811A (en) | 1982-03-31 |