JPH05136202A - 半導体パツケージ及びその製造方法 - Google Patents

半導体パツケージ及びその製造方法

Info

Publication number
JPH05136202A
JPH05136202A JP4114939A JP11493992A JPH05136202A JP H05136202 A JPH05136202 A JP H05136202A JP 4114939 A JP4114939 A JP 4114939A JP 11493992 A JP11493992 A JP 11493992A JP H05136202 A JPH05136202 A JP H05136202A
Authority
JP
Japan
Prior art keywords
solder
semiconductor package
semiconductor chip
pad
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP4114939A
Other languages
English (en)
Japanese (ja)
Inventor
Gi Bon Cha
基 本 車
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
SK Hynix Inc
Original Assignee
Goldstar Electron Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Goldstar Electron Co Ltd filed Critical Goldstar Electron Co Ltd
Publication of JPH05136202A publication Critical patent/JPH05136202A/ja
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/02—Containers; Seals
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49503—Lead-frames or other flat leads characterised by the die pad
    • H01L23/4951—Chip-on-leads or leads-on-chip techniques, i.e. inner lead fingers being used as die pad
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49541—Geometry of the lead-frame
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
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    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
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    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
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    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/4826—Connecting between the body and an opposite side of the item with respect to the body
    • H—ELECTRICITY
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    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484—Connecting portions
    • H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
    • H01L2224/48465—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4912—Layout
    • H01L2224/49171—Fan-out arrangements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73201—Location after the connecting process on the same surface
    • H01L2224/73215—Layer and wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H—ELECTRICITY
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    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H—ELECTRICITY
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    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
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    • H01L2924/01033—Arsenic [As]
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    • H01L2924/013—Alloys
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    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits
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    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Wire Bonding (AREA)
  • Lead Frames For Integrated Circuits (AREA)
JP4114939A 1991-05-11 1992-05-07 半導体パツケージ及びその製造方法 Pending JPH05136202A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
KR1019910007631A KR940006164B1 (ko) 1991-05-11 1991-05-11 반도체 패키지 및 그 제조방법
KR1991P7631 1991-05-11

Publications (1)

Publication Number Publication Date
JPH05136202A true JPH05136202A (ja) 1993-06-01

Family

ID=19314319

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4114939A Pending JPH05136202A (ja) 1991-05-11 1992-05-07 半導体パツケージ及びその製造方法

Country Status (5)

Country Link
US (1) US5334873A (OSRAM)
JP (1) JPH05136202A (OSRAM)
KR (1) KR940006164B1 (OSRAM)
DE (1) DE4215471C2 (OSRAM)
TW (1) TW221522B (OSRAM)

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5331200A (en) * 1992-09-30 1994-07-19 Texas Instruments Incorporated Lead-on-chip inner lead bonding lead frame method and apparatus
KR960005042B1 (ko) * 1992-11-07 1996-04-18 금성일렉트론주식회사 반도체 펙케지
JPH09107048A (ja) * 1995-03-30 1997-04-22 Mitsubishi Electric Corp 半導体パッケージ
US5811875A (en) * 1995-06-29 1998-09-22 Samsung Electronics Co., Ltd. Lead frames including extended tie-bars, and semiconductor chip packages using same
KR100242994B1 (ko) * 1996-12-28 2000-02-01 김영환 버텀리드프레임 및 그를 이용한 버텀리드 반도체 패키지
US6271582B1 (en) 1997-04-07 2001-08-07 Micron Technology, Inc. Interdigitated leads-over-chip lead frame, device, and method for supporting an integrated circuit die
US6008996A (en) * 1997-04-07 1999-12-28 Micron Technology, Inc. Interdigitated leads-over-chip lead frame, device, and method for supporting an integrated circuit die
KR100311035B1 (ko) * 1997-11-21 2002-02-28 윤종용 효율적으로 배치된 패드들을 갖는 반도체 메모리 장치
KR100726762B1 (ko) * 2000-12-21 2007-06-11 삼성테크윈 주식회사 반도체 리드프레임과 이를 채용한 반도체 패키지
JP2006173437A (ja) * 2004-12-17 2006-06-29 Toshiba Corp 半導体装置
US8174099B2 (en) * 2008-08-13 2012-05-08 Atmel Corporation Leadless package with internally extended package leads
JP6456451B1 (ja) 2017-09-25 2019-01-23 エヌ・ティ・ティ・コミュニケーションズ株式会社 通信装置、通信方法、及びプログラム

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61241959A (ja) * 1985-04-18 1986-10-28 インタ−ナショナル　ビジネス　マシ−ンズ　コ−ポレ−ション 半導体モジユ−ル
JPH01286448A (ja) * 1988-05-13 1989-11-17 Hitachi Ltd 半導体装置の製造方法
JPH0212863A (ja) * 1988-06-30 1990-01-17 Matsushita Electron Corp 樹脂封止型半導体装置
JPH0282625A (ja) * 1988-08-22 1990-03-23 Internatl Business Mach Corp <Ibm> 金属層リフト・オフ処理方法
JPH02246125A (ja) * 1989-03-20 1990-10-01 Hitachi Ltd 半導体装置及びその製造方法
JPH02310956A (ja) * 1989-05-26 1990-12-26 Hitachi Ltd 高密度実装半導体パツケージ
JPH04278548A (ja) * 1991-03-07 1992-10-05 Nec Corp 樹脂封止型半導体装置

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3947867A (en) * 1970-12-21 1976-03-30 Signetics Corporation Two part package for a semiconductor die
US4604644A (en) * 1985-01-28 1986-08-05 International Business Machines Corporation Solder interconnection structure for joining semiconductor devices to substrates that have improved fatigue life, and process for making
US5014112A (en) * 1985-11-12 1991-05-07 Texas Instruments Incorporated Semiconductor integrated circuit device having mirror image circuit bars bonded on opposite sides of a lead frame
US4796078A (en) * 1987-06-15 1989-01-03 International Business Machines Corporation Peripheral/area wire bonding technique
US4967261A (en) * 1987-07-30 1990-10-30 Mitsubishi Denki Kabushiki Kaisha Tape carrier for assembling an IC chip on a substrate
US5068712A (en) * 1988-09-20 1991-11-26 Hitachi, Ltd. Semiconductor device
US4862322A (en) * 1988-05-02 1989-08-29 Bickford Harry R Double electronic device structure having beam leads solderlessly bonded between contact locations on each device and projecting outwardly from therebetween
EP0428785B1 (de) * 1989-11-24 1994-02-16 Siemens Aktiengesellschaft Halbleiterspeicher
US5155578A (en) * 1991-04-26 1992-10-13 Texas Instruments Incorporated Bond wire configuration and injection mold for minimum wire sweep in plastic IC packages

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61241959A (ja) * 1985-04-18 1986-10-28 インタ−ナショナル　ビジネス　マシ−ンズ　コ−ポレ−ション 半導体モジユ−ル
JPH01286448A (ja) * 1988-05-13 1989-11-17 Hitachi Ltd 半導体装置の製造方法
JPH0212863A (ja) * 1988-06-30 1990-01-17 Matsushita Electron Corp 樹脂封止型半導体装置
JPH0282625A (ja) * 1988-08-22 1990-03-23 Internatl Business Mach Corp <Ibm> 金属層リフト・オフ処理方法
JPH02246125A (ja) * 1989-03-20 1990-10-01 Hitachi Ltd 半導体装置及びその製造方法
JPH02310956A (ja) * 1989-05-26 1990-12-26 Hitachi Ltd 高密度実装半導体パツケージ
JPH04278548A (ja) * 1991-03-07 1992-10-05 Nec Corp 樹脂封止型半導体装置

Also Published As

Publication number Publication date
DE4215471C2 (de) 2002-10-24
KR940006164B1 (ko) 1994-07-08
US5334873A (en) 1994-08-02
KR920022459A (ko) 1992-12-19
TW221522B (OSRAM) 1994-03-01
DE4215471A1 (de) 1992-11-12

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