JPH0513011Y2 - - Google Patents
Info
- Publication number
- JPH0513011Y2 JPH0513011Y2 JP1987123180U JP12318087U JPH0513011Y2 JP H0513011 Y2 JPH0513011 Y2 JP H0513011Y2 JP 1987123180 U JP1987123180 U JP 1987123180U JP 12318087 U JP12318087 U JP 12318087U JP H0513011 Y2 JPH0513011 Y2 JP H0513011Y2
- Authority
- JP
- Japan
- Prior art keywords
- circuit board
- wire
- semiconductor chip
- bonding
- aluminum
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 229910052751 metal Inorganic materials 0.000 claims description 19
- 239000002184 metal Substances 0.000 claims description 19
- 239000004065 semiconductor Substances 0.000 claims description 14
- 229910052782 aluminium Inorganic materials 0.000 claims description 9
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims description 8
- 239000004020 conductor Substances 0.000 claims description 5
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 4
- 229910052802 copper Inorganic materials 0.000 claims description 4
- 239000010949 copper Substances 0.000 claims description 4
- 239000000463 material Substances 0.000 claims description 4
- 238000005476 soldering Methods 0.000 description 5
- 238000003466 welding Methods 0.000 description 5
- 229910000679 solder Inorganic materials 0.000 description 4
- 238000004519 manufacturing process Methods 0.000 description 3
- 230000000694 effects Effects 0.000 description 2
- WABPQHHGFIMREM-UHFFFAOYSA-N lead(0) Chemical compound [Pb] WABPQHHGFIMREM-UHFFFAOYSA-N 0.000 description 2
- 238000007747 plating Methods 0.000 description 2
- 239000003990 capacitor Substances 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 239000003223 protective agent Substances 0.000 description 1
- 239000011347 resin Substances 0.000 description 1
- 229920005989 resin Polymers 0.000 description 1
- 238000007789 sealing Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
Description
【考案の詳細な説明】
［産業上の利用分野］
この考案は、回路基板上に面搭載型電子部品を
配置するのみで、所定の電子回路が構成される導
体パターン型回路基板に関し、特に、面搭載型半
導体チツプの電極金属と回路基板の一部とをワイ
ヤボンデイングする場合に好適な導体パターン型
回路基板に関するものである。[Detailed description of the invention] [Industrial application field] This invention relates to a conductive pattern circuit board in which a predetermined electronic circuit is constructed by simply arranging surface-mounted electronic components on the circuit board, and in particular, The present invention relates to a conductor pattern type circuit board suitable for wire bonding between electrode metal of a surface-mounted semiconductor chip and a part of the circuit board.
［従来の技術］
半導体素子、抵抗、コンデンサ等の電子部品お
よび外部接続導体としのリード線等を搭載し、所
定の電子回路を形成した電子機器を製作するに当
り、従来では、上記のような電子部品およびリー
ド線等を搭載するために、一般にプリント配線基
板が用いられいた。このプリント配線基板は高価
であり、また、リード線を別部材として使用する
ために部品点数も多くなり、しかも各電子部品の
位置決めや半田付け作業等に手数がかかる等の問
題点があつた。[Prior Art] Conventionally, the above-mentioned method has been used to manufacture electronic devices that are equipped with electronic components such as semiconductor elements, resistors, capacitors, and lead wires as external connection conductors to form a predetermined electronic circuit. Printed wiring boards were generally used to mount electronic components, lead wires, and the like. This printed wiring board is expensive, has a large number of parts because the lead wire is used as a separate member, and has problems such as the need for positioning and soldering of each electronic component.
そこで、本考案者等は、上記のように問題点を
解消するために、第２図ａ，ｂに示すような回路
基板を特願昭61−79285号として提案した。 Therefore, in order to solve the above-mentioned problems, the inventors of the present invention proposed a circuit board as shown in FIGS.
すなわち、この回路基板は、リードフレーム１
自体が導体パターン型にその各部が形成されてい
て、直接該当部分に面搭載型の電子部品２，３，
４を搭載できるようにするとともに、リード線に
該当する部分５もリードフレーム１自体に形成し
ておき、最後にリードフレーム１の連結部６や支
持部７などの不要部分を切除し、第２図の鎖線で
示す部分８を樹脂封止して所定の電子機器を得る
ようにしたものである。 That is, this circuit board has lead frame 1
Each part is formed in the form of a conductor pattern, and surface-mounted electronic components 2, 3,
4, and a portion 5 corresponding to the lead wire is also formed on the lead frame 1 itself.Finally, unnecessary portions such as the connecting portion 6 and the supporting portion 7 of the lead frame 1 are cut out, and the second A predetermined electronic device is obtained by sealing a portion 8 indicated by a chain line in the figure with a resin.
その後、本考案者等は第３図に示すように、リ
ードフレーム１に、半導体チツプ１０自体を直接
半田付けできるように広幅部９を形成し、その半
導体チツプ１０の上面の電極金属と、上記リード
フレーム１の所定部分１１，１２とをアルミニユ
ーム製の金属細線１３を用いてワイヤボンデイン
グする構造の回路基板も開発した。 Thereafter, as shown in FIG. 3, the present inventors formed a wide portion 9 on the lead frame 1 so that the semiconductor chip 10 itself could be directly soldered, and the electrode metal on the top surface of the semiconductor chip 10 and the A circuit board having a structure in which predetermined portions 11 and 12 of the lead frame 1 are wire-bonded using a thin metal wire 13 made of aluminum has also been developed.
［考案が解決しようとする問題点］
半導体チツプ１０を直接上記回路基板に搭載す
るものにおいて、ワイヤボンデイングの際に次の
ような問題点がある。[Problems to be Solved by the Invention] In the device in which the semiconductor chip 10 is directly mounted on the circuit board, the following problems occur during wire bonding.
すなわち、半導体チツプ１０の電極金属上に金
属細線１３をワイヤボンデイングする場合には、
電極金属および金属細線とも同じアルミニユーム
金属であるために、互いに強固に溶接されるが、
金属細線１３の他端は、回路基板上の一部分１
１，１２に接続され、その回路基板の表面には半
田メツキが施されているために溶接強度が低い。
上記の半田メツキは回路基板の素材が銅板である
ために、搭載する電子部品の半田付けを良好にす
るためのものであり、金属細線１３をワイヤボン
デイングする部分１１，１２は、特別に半田メツ
キを除去し、銅板自体の表面にワイヤボンデイン
グするようにしているが、未だ溶接強度が低いと
いう問題点があつた。 That is, when wire bonding the thin metal wire 13 onto the electrode metal of the semiconductor chip 10,
Since both the electrode metal and the metal wire are made of the same aluminum metal, they are firmly welded together.
The other end of the thin metal wire 13 is attached to a portion 1 on the circuit board.
1 and 12, and the surface of the circuit board is solder plated, so the welding strength is low.
The above-mentioned solder plating is to improve the soldering of electronic components mounted on the circuit board since the material is a copper plate, and the parts 11 and 12 where the thin metal wire 13 is wire bonded are specially soldered. However, the problem was that the welding strength was still low.
［考案の目的］
この考案は上記のような問題点を解消するため
になされたもので、ワイヤボンデイングの溶接強
度が従来のものに比較し、格段と向上した回路基
板を得ることを目的とする。[Purpose of the invention] This invention was made to solve the above problems, and the purpose is to obtain a circuit board with significantly improved wire bonding welding strength compared to conventional ones. .
［問題点を解決するための手段］
この考案の回路基板は、そのワイヤボンデイン
グされる箇所に、アルミニユーム製のボンデイン
グパツドを備えたものである。[Means for Solving the Problems] The circuit board of this invention is provided with bonding pads made of aluminum at the locations where wire bonding is to be performed.
［作用］
この考案の回路基板においては、銅製の回路基
板上にアルミニユーム製のボンデイングパツドを
有するために、ワイヤボンデイングする金属細線
と同じ金属となり、溶接強度が格段と向上する。[Function] Since the circuit board of this invention has aluminum bonding pads on the copper circuit board, the bonding pads are made of the same metal as the thin metal wires used for wire bonding, and the welding strength is significantly improved.
［実施例］
以下、この考案の実施例を第１図に基づいて説
明する。[Example] Hereinafter, an example of this invention will be described based on FIG. 1.
まず、回路基板２０の素材は従来と同様に銅板
であり、その表面には半田メツキが施されてい
る。 First, the material of the circuit board 20 is a copper plate as in the past, and the surface thereof is solder plated.
上記の回路基板２０の一方の部分２２上には、
半導体チツプ２１が半田付けされる。回路基板２
０の他方の部分２３上にはアルミニユーム製のボ
ンデイングパツド２４が半田付けされる。 On one part 22 of the above circuit board 20,
Semiconductor chip 21 is soldered. circuit board 2
An aluminum bonding pad 24 is soldered onto the other portion 23 of the 0.
なお、上記のボンデイングパツド２４の半田付
けは、半導体チツプ２１や他の搭載電子部品の半
田付け時に一緒に行なうようにしても良い。 Note that the above-described soldering of the bonding pad 24 may be performed at the same time as the soldering of the semiconductor chip 21 and other mounted electronic components.
次に、半導体チツプ２１の表面のアルミニユー
ム製の電極金属２１ａとボンデイングパツド２４
との間をアルミニユーム製の金属細線２５を用い
てワイヤボンデイングする。このワイヤボンデイ
ング後は、半導体チツプ２１の全体および金属細
線２５の一部に対して表面保護剤を塗布する。 Next, the aluminum electrode metal 21a on the surface of the semiconductor chip 21 and the bonding pad 24 are connected to each other.
Wire bonding is performed using a thin metal wire 25 made of aluminum. After this wire bonding, a surface protective agent is applied to the entire semiconductor chip 21 and a part of the thin metal wires 25.
［考案の効果］
この考案によれば、上記のように構成したの
で、概略次のような効果がある。[Effects of the invention] According to this invention, which is configured as described above, the following effects can be obtained.
(1) アルミニユーム製の金属細線は、同一金属の
ボンデイングパツド上に溶接されるので、溶接
強度が従来に比較して強くなる。(1) Since the aluminum thin metal wire is welded onto the bonding pad made of the same metal, the welding strength is stronger than before.
(2) ワイヤボンデイングする部分の半田メツキを
除去する工程が不要となるので、製造原価を低
減させることができる。(2) Manufacturing costs can be reduced because there is no need to remove solder plating from the wire bonded area.
(3) ボンデイングパツドは、半導体チツプや他の
電子部品の半田付け時に同時に半田付けを行な
うことができるので、特に工数を増加させるこ
とがない。(3) Since the bonding pad can be soldered simultaneously with the soldering of semiconductor chips and other electronic components, there is no particular increase in the number of man-hours.
第１図は、この考案の一実施例を示す回路基板
の一部切欠断面図、第２図ａ，ｂは、従来の回路
基板の構成図、第３図は、上記回路基板を用いて
製作した電子機器の構成図である。
２０……回路基板、２１……半導体チツプ、２
１ａ……電極金属、２２，２３……回路基板上の
部分、２４……ボンデイングパツド、２５……金
属細線。
Figure 1 is a partially cutaway sectional view of a circuit board showing an embodiment of this invention, Figures 2a and b are configuration diagrams of a conventional circuit board, and Figure 3 is a fabrication using the above circuit board. FIG. 20... Circuit board, 21... Semiconductor chip, 2
1a...electrode metal, 22, 23...portion on the circuit board, 24...bonding pad, 25...metal thin wire.
Claims (1)
らなり、その表面に半田メツキされた回路基板上
に面搭載型電子部品を配置するのみで所定の電子
回路が構成される導体パターン型電子回路基板に
おいて、 面搭載型電子部品と混載される半導体チツプを
有し、該半導体チツプ表面の電極金属と前記回路
基板の表面の一部とをアルミ材からなるボンデイ
ングワイヤにより接続するために、前記回路基板
のワイヤボンデイングすべき箇所に、アルミ材か
らなるボンデイングパツドを備えたことを特徴と
する導体パターン型回路基板。[Claim for Utility Model Registration] A predetermined electronic circuit is constructed by simply arranging surface-mounted electronic components on a circuit board made of a copper material pre-formed into a conductive pattern and soldered onto the surface. A conductor pattern type electronic circuit board has a semiconductor chip mounted together with a surface-mounted electronic component, and an electrode metal on the surface of the semiconductor chip and a part of the surface of the circuit board are connected by a bonding wire made of aluminum material. A conductor pattern type circuit board, characterized in that bonding pads made of aluminum are provided at locations on the circuit board where wire bonding is to be performed.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1987123180U JPH0513011Y2 (en) | 1987-08-13 | 1987-08-13 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1987123180U JPH0513011Y2 (en) | 1987-08-13 | 1987-08-13 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS6429885U JPS6429885U (en) | 1989-02-22 |
| JPH0513011Y2 true JPH0513011Y2 (en) | 1993-04-06 |
Family
ID=31371794
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1987123180U Expired - Lifetime JPH0513011Y2 (en) | 1987-08-13 | 1987-08-13 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0513011Y2 (en) |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5629963B2 (en) * | 1975-02-21 | 1981-07-11 | ||
| JPS58151039A (en) * | 1982-03-04 | 1983-09-08 | Denki Kagaku Kogyo Kk | Hybrid integrated circuit substrate |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5629963U (en) * | 1979-08-15 | 1981-03-23 | ||
| JPS58118739U (en) * | 1982-02-05 | 1983-08-13 | 富士電機株式会社 | bonding block |
-
1987
- 1987-08-13 JP JP1987123180U patent/JPH0513011Y2/ja not_active Expired - Lifetime
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5629963B2 (en) * | 1975-02-21 | 1981-07-11 | ||
| JPS58151039A (en) * | 1982-03-04 | 1983-09-08 | Denki Kagaku Kogyo Kk | Hybrid integrated circuit substrate |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS6429885U (en) | 1989-02-22 |
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