JP2974819B2 - Semiconductor device and manufacturing method thereof - Google Patents

Abstract

PURPOSE:To provide a semiconductor device of both-side surface mounting structure which has a small size and in which a high density mounting can be performed. CONSTITUTION:In a both-side resin-sealed semiconductor device in which at least one bare IC chip 6 is placed on each of both side surfaces of a printed board 1 formed with a wiring pattern 4, a resin sealing frame 9 higher than the height of the chip 6 to be placed on the surface is arranged at least on one of front and rear surfaces of the board 1. Further, at least one bare IC chip is placed on the front surface of the board, wired to wirings of the board, the frame is mounted on the surface, at least one bare IC chip is placed on the rear surface of the board, and wired to a wiring pattern. In a third embodiment of this invention, a hybrid integrated circuits in each of which at least one bare IC chip is placed on the front surface of the board formed with the wiring pattern, the chip is connected to the pattern, and its periphery is resin- sealed, are so adhered through insulating adhesive members that rear surface sides are opposed.

Description

DETAILED DESCRIPTION OF THE INVENTION

[Object of the Invention]

[0002]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device and a method of manufacturing the same, and more particularly to a COB structure having a small size and a high density by mounting a plurality of bare IC chips on a double-sided board.

[0003]

2. Description of the Related Art In recent years, COB (Chip on Boa) has been developed.
rd) and the like, the tendency of light, thin, short, and high functionality in high-density mounting is increasing.

[0004] Focusing on higher functionality, it is difficult to mount and connect a large number of products in a hybrid integrated circuit of limited dimensions.

FIG. 11 is an overall view, FIG. 12 is an enlarged view of a main part,
FIG. 13 shows a perspective view. In this semiconductor device, six types of bare IC chips (IC chips before chip coating) 6 are mounted on the surface of a printed circuit board 1, and the electrodes of the bare IC chip and the wiring patterns of the substrate are connected via bonding wires 7. Interconnection wiring is performed, and sealing is performed in the package 8. 9 and 10 are lead terminals (wiring patterns).

When a plurality of various types of bare IC chips are arranged and mounted in a package in a hybrid integrated circuit having a fixed length as described above, not only the type and the number are limited, but also There is a problem that the area occupied by the bare IC chip increases and wire bonding becomes difficult.

In order to further increase the density, double-sided mounting is desirable.

However, in the case of this conventional structure, if components and the like are mounted on the back surface of the printed board 1, it becomes impossible to clamp the board during wire bonding. Figure 1
1, as shown in FIGS. 12 and 13, there are disadvantages such as mounting on only one side of the printed circuit board.

Further, as an example of performing the double-sided mounting according to the prior art, there is a method of using a package type IC 11 as shown in FIGS. 14 (a) and 14 (b) and FIG. By using the package type IC 11 as described above, mounting on both sides of the printed circuit board 1 is possible. 10 is a lead terminal.

In this double-sided mounting type semiconductor device, a bare IC chip can be mounted on only one side, as shown in FIGS.
Compared with the hybrid integrated circuit as shown in FIG. 3, the thickness of the hybrid integrated circuit is thicker and the package type IC 11 is mounted on both sides. It may be the same level or larger.

As another example of a double-sided mounting type semiconductor device, as shown in FIG. 16, a bare IC chip is mounted on the surface of a printed circuit board 1 and a chip capacitor 30, a chip resistor 31, and an SOP ( Small Ou
A device mounting a packaged surface mounting component such as Tline Package 32 has also been proposed. However, according to the conventional mounting structure, the bare IC chip 6 cannot be mounted on only one side because clamping cannot be performed at the time of wire bonding. Therefore, the mounting area is almost determined by the surface on which the bare IC chip 6 is mounted, and the chip capacitor 30, the chip resistor 31, and the SOP (Small) on the back surface.
(Outline Package) 32 or the like, only a surface mount component is mounted, and a considerable gap is generated.
There is a problem that high-density mounting cannot be performed.

Therefore, in order to solve this problem, when the bare IC chips 6 are simply mounted on both sides, only the areas of the components (bare IC chips, capacitors, resistors, SOPs, etc.) initially mounted on the back surface are bonded. ―Di 17
In this case, the counterbore must be inserted and released, and when the bare IC chip 6 is mounted on the surface and wire bonding is performed, the area (portion) where the counterbore is inserted cannot be firmly clamped. That is, when the wiring pattern 4 is disposed on the opposite side (front surface) corresponding to the portion where the counterbore is inserted, the wire bonding to the wiring pattern 4 is sufficiently pressed down on the wiring pattern 4 on the printed circuit board 1. Therefore, heat and ultrasonic energy cannot be transmitted efficiently and efficiently, causing problems such as a remarkable poor bonding property and a significant reduction in quality.

[0013] This problem is not limited to the mounting structure of the wire bonding method, but also to the mounting structure of the face-down bonding method such as a flip chip, that is, the direct bonding method in which mounting is performed without using a bonding wire. There has been a problem that sufficient clamping cannot be performed or the flatness of the surface deteriorates, and positioning with sufficiently high precision cannot be performed.

[0014]

As described above, in wire bonding, heat and ultrasonic waves are efficiently and uniformly transmitted to a printed circuit board, bare IC chips, and gold wires to ensure stable and good bonding strength. There must be. Therefore, it is necessary to bring the printed circuit board into close contact with the bonding stage and firmly fix it with a holding jig. Therefore, since the substrate contact surface of the bonding stage has a structure that is a flat surface without irregularities, it is not allowed that components and the like are mounted on the back surface of the printed circuit board.
Even when multiple bare IC chips are mounted by the wire bonding method, they can only be mounted on one side of the printed circuit board.
There is a problem that the mounting density does not increase.

In order to increase the density by simply mounting a bare IC chip on both sides, the parts mounted first on the front surface are obstructive when the bare IC chip is mounted on the back surface and wire bonding is performed. And only this part needs escape.

This has been a serious problem not only in the implementation of the wire bonding method but also in the implementation of the wireless (direct) bonding method.

The present invention has been made in view of the above circumstances, and has as its object to provide a small-sized double-sided mounting structure capable of high-density mounting.

[0018]

Means for Solving the Problems As means for solving the above-mentioned problems, the invention according to claim 1 is directed to a printed circuit board having a mounting area on the front and back surfaces, and a printed circuit board connected to the printed circuit board surface by metal wires. A package comprising: a bare IC chip, a packaged electronic component connected to the surface by reflow soldering, and a resin for sealing the first bare IC chip with a resin; A frame having a height greater than the height of the mounted electronic component when mounted, and a second bare IC chip connected to the back surface by a metal wire. The invention according to claim 2 is a step of connecting the packaged electronic component to the surface of the printed circuit board by reflow soldering, and the step of connecting the first bare IC to the surface of the printed circuit board.
Connecting the chip with a metal wire, sealing the first bare IC chip with a resin, and forming a frame having a height larger than the height when the packaged electronic component is mounted, A step of providing the resin on the front surface of the printed board so as to cover the resin;
Connecting the chip with a metal wire.

Preferably, the lead extraction terminal is provided in a predetermined area on the surface opposite to the surface on which the frame is formed.

Further, the frame needs to be formed so as to be higher than both the mounted component and its peripheral components.

[0021]

[0022]

[0023]

[0024]

[0025]

According to the first configuration, a frame higher than the height of the component is mounted on the front surface, and a plurality of bare IC chips are mounted on both surfaces such that the wiring pattern on the rear surface is within the region of the frame on the front surface. So that the conventional single-sided bare I
The mounting area can be reduced as compared with the C chip mounting. Further, it is excellent in bonding property as compared with the conventional double-sided bare IC chip mounting, and can be expected to improve quality.

Further, the lead extraction terminals are arranged in a predetermined region on the surface opposite to the surface on which the frame is formed, so that the flatness is maintained and the back side (the surface on which the frame is formed) is maintained. On the opposite side) can be implemented.

Further, by forming this frame to be higher than any of the mounted component and its peripheral components, the frame can be mounted on the bonding stage with good adhesion when mounting on the back surface side.

According to a second method of the present invention, at least one bare IC chip is mounted on a printed circuit board surface,
A bare IC chip is mounted on the back surface of the printed circuit board after being connected to the wiring pattern of the printed circuit board, and a resin sealing frame is mounted on this surface prior to the connection. Is protected and the flatness of the front surface can be maintained, and when mounting the rear surface side, the front surface side can be attached to the bonding stage with good adhesion, and high-precision and reliable mounting can be performed.

Here, as the connection method, any of wire bonding and direct bonding can be applied. The resin sealing on the front side may be performed before or after mounting the chip on the back side.

[0030]

[0031]

Next, embodiments of the present invention will be described in detail with reference to the drawings.

FIG. 1 shows an embodiment of the present invention.
(a) is a cross-sectional view, FIG. 1 (b) is a top view (as viewed from the direction C),
FIG. 1 (c) shows a bottom view (as viewed from the direction D), and FIG. 1 (d) shows a side view.

This semiconductor device is characterized in that a bare IC chip 6 is mounted on the front and back surfaces of a printed circuit board 1, and a frame 9 made of epoxy resin is arranged so as to surround these.

That is, one other type of bare IC chip 6 is mounted on the two surfaces of the printed circuit board 1 on which the gold wiring pattern 4 is formed, and the chip electrodes (bonding pads) are formed via bonding wires 7. The connection wiring is made mutually between the wiring pattern 20 and the wiring pattern 4, and sealing is performed with the chip coating resin 8.
19 is a crimp ball. The wiring pattern 4 is connected to a lead extraction terminal 10 for external connection, which is formed by plating a Cu foil with Ni as a base material and then plating it with gold.

30 is a capacitor, 31 is a resistor, 32 is S
OPs are fixed on the wiring pattern 4 with a conductive adhesive such as solder or silver paste.

Next, a method of mounting the semiconductor device will be described.

First, a printed board 1 having a predetermined wiring pattern 4 formed on both sides is prepared. Then, if necessary, use a screen printing method or the like to
A solder pattern (not shown) is formed on a wiring pattern in an area for connecting an SOP, etc.
And reflow soldering.

Thereafter, the bare IC chip 6 is first fixed to the chip mounting area on the front side of the printed circuit board 1 using a silver paste or the like (die bonding).

Then, wire bonding is performed by the method shown in FIGS.

The wire bonding is performed as follows.

First, the printed circuit board 1 on which the bare IC chip 6 is mounted via the silver paste 5 is placed on a heated bonding stage 17 with a built-in heater (not shown) and positioned.

Thereafter, the printed circuit board 1 is
Clamp. When this step ends, wire bonding is started.

First, as shown in FIG.
After passing through the gold wire 7, a high voltage is applied from the electric torch rod 14 to discharge and melt a part of the gold wire 7 to form a gold ball 21.

Next, as shown in FIG.
The capillary 12 mounted on the printed circuit board 1 clamped on the bonding stage 17 is pressed down onto the predetermined electrode 20 of the bare IC chip 6 on the bonding stage 17, and simultaneously the ultrasonic energy from an ultrasonic oscillator (not shown) is applied. It is transmitted to the capillary 12 and joined. This is called fast bonding (FIG. 2).

When the first bonding is completed, the capillary 12 is lifted, and the bonding head (not shown) mounted on the XY table (not shown) is moved to the wiring pattern 4 of the printed circuit board 1.
As shown in FIG. 3, the capillary 12 is lowered again and the gold wire 7 is crimped to a predetermined lead terminal 4 of the printed circuit board 1 and, at the same time, ultrasonic energy from an ultrasonic oscillator (not shown) is applied to join. Let it. This is called second bonding.

Thereafter, the capillary 12 is raised, the lower clamper 22 is closed halfway, and the gold wire 7 is cut from the wiring pattern 4 of the printed circuit board 1.

Thus, one cycle of the wire bonding is completed.

By repeating this process, the electrodes 20 of the plurality of bare IC chips 6 and the wiring patterns 4 of the printed circuit board 1 are connected by the gold wires 7. This bonding method is referred to as thermocompression bonding ultrasonic combined ball bonding.

After connecting the electrodes 20 of the bare IC chip 6 mounted on the surface and the wiring patterns 4 of the printed circuit board 1 with gold wires, the chip coating resin 8 is applied around the bare IC chip 6. And seal it.

That is, the surface of the bonding stage 17 of this device has a structure such that it has a flat surface without unevenness due to clamping.

Subsequently, the capacitor 30 and the chip resistor 31
Are placed on a solder pattern and fixed by heating.

Then, as shown in FIG. 1, a polyimide frame 9 formed in advance is fixed using an insulating adhesive so that the surface connecting the upper ends of the frame and the surface of the printed circuit board are parallel to each other.

Thereafter, the printed circuit board is placed on a bonding stage which is turned upside down so that the frame 9 is in close contact with the bonding stage.
The surface of the bonding stage 17 is flat without any irregularities due to the clamping, but the surface of the printed circuit board is fixed to the bonding stage 17 with good adhesion so that the back surface of the printed circuit board is kept balanced by the frame. Is placed.

Then, similarly, the bare IC chip 6 is fixed to the chip mounting area on the back surface side of the printed circuit board 1 using a silver paste or the like (die bonding).

Then, similarly, wire bonding is performed by the usual method shown in FIGS.

Subsequently, the SOP 32 is placed on the solder pattern on the back side and is fixed by heating (reflow soldering).

Then, a polyimide frame 9 formed in advance is fixed to the back side of the printed circuit board using an insulating adhesive.

Finally, the frame 9 is filled with epoxy resin, and the lead frame 10 is fitted so as to be connected to the wiring pattern 4 in the region R at the end exposed from the chip coating resin 8 and subjected to solder dip. Connecting.

This lead frame is shown in FIGS. 5 (a) and 5 (b).
As shown in a plan view and an A-A cross-sectional view thereof, a 42-alloy is formed, the tip is formed to have a U-shaped cross section, and the other end is integrally formed by a tie bar T. After the connection, the tie bar T is cut off. In addition, the connection portion with the substrate is formed so that the interval between the tips is slightly reduced in order to make good connection with the wiring pattern of the printed circuit board, and the printed circuit board can be fitted and satisfactorily joined. .

Thus, a double-sided COB structure is completed.

According to this method, the bare IC chips 6 can be mounted on both sides of the printed board with high reliability, and the printed board 1 can be reduced in size and increased in density.

In the above embodiment, the resin sealing is performed after mounting the bare chips on both surfaces. However, after mounting on the front surface, the resin sealing on the front surface side is performed once, and the chip on the rear surface side is mounted. You may.

In the above embodiment, the frame is formed on both sides, but may be formed on only one side.

Further, the mounting on each surface was performed in the order of the bare IC chip and the other mounting components, but it is needless to say that the reverse is also possible.

Embodiment 2 Next, a second embodiment of the present invention will be described. FIG.
7A and 7B are an overall plan view and a sectional view, FIGS. 7A and 7B are enlarged plan views and a sectional view of a main part, FIG. 8 is an exploded structural view, and FIG. 9 is a perspective view.

This semiconductor device has a printed circuit board 1 having a thickness of 0.8 mm on which each gold wiring pattern 4 is formed.
The three hybrid ICs are mounted by mounting three bare IC chips 6 on the surfaces a and 1b respectively, connecting the bare IC chips to the wiring patterns, and sealing the area around each bare IC chip 6 with resin. Is formed, and the printed circuit boards 1a and 1b are bonded via an insulating adhesive member 2 so that the back sides thereof face each other.
Lead frame 10 so as to be connected to wiring pattern 4 of
Are fitted, and connected by solder dip. The gold wiring pattern 4 has a surface covered with a gold plating layer having a thickness of 0.5 μm.

Here, 1a and 1b are printed boards, 2 is an insulating adhesive for connecting both printed boards, 3 is a gold-plated pattern, and an island (die pad) for die-bonding a bare IC chip. It is. 4
Is a gold wiring pattern. Reference numeral 6 denotes a bare IC chip, which is die-bonded to the island via the silver paste 5. Wire bonding is performed from the die-bonded bare IC chip to a wiring pattern (bonding pad) 4 on a printed circuit board with a gold wire 7.
Numeral 8 is a resin for protecting the die-bonded bare IC chip and the wire-bonded gold wire.
Reference numeral 10 denotes a lead frame for external connection, which sandwiches two printed circuit boards.

Next, a method of manufacturing the semiconductor device will be described.

First, a printed circuit board 1 having predetermined wiring patterns 4 formed on both sides is prepared. Next, the bare IC chip 6 is fixed to the chip mounting area on the surface of each of the printed boards 1a and 1b using a silver paste or the like (die bonding).

Then, wire bonding is performed on each of the first embodiment by the method shown in FIGS.

The printed circuit boards 1a and 1b thus mounted on one side are fixed via an insulating adhesive so that the back sides face each other.

Finally, the lead frame 10 is fitted so as to be connected to the wiring pattern 4 in the region R at one end of the printed circuit board, and is connected by solder dip.

This lead frame is made of a 42 alloy in the same manner as shown in the first embodiment, is formed so that its tip has a U-shaped cross section, and the other end is integrally formed with a tie bar T. After connecting with the printed circuit board, tie bar T
Cut off.

Thus, a pseudo double-sided COB structure is completed.

With this structure, even when a plurality of bare IC chips are mounted, double-sided mounting can be performed at a high density, so that the size can be considerably reduced as compared with the conventional example. .

Further, since it is only necessary to mount a semiconductor device having a normal single-sided mounting structure, the semiconductor device can be easily mounted without any change in the mounting method.

In this embodiment, the wiring pattern is formed only on the front surface side of the printed circuit board. However, the wiring pattern may be formed on the back surface side and connected via through holes, thereby providing a high degree of freedom in circuit design. And a highly reliable semiconductor device that can be easily manufactured even when the density is increased.

In the above embodiment, the lead terminal 10
I installed it so as to sandwich the two printed boards,
As shown in the cross-sectional view of FIG. 10, a wiring pattern 4s is also formed on the back side of the printed circuit board so as to be connected to the wiring pattern on the front side via the through hole H, and a lead is connected to the wiring pattern 4s. The terminal 10 may be sandwiched between two printed boards.

In this example, since two printed boards are overlapped with each other, it is desirable that the thickness of the boards be thin, and it is needless to say that a multilayer structure may be used by using a thin board.

In each embodiment, the connection between the chip and the wiring pattern is made by wire bonding. However, it is not always necessary to use wire bonding, and wireless (direct) bonding such as flip chip or TAB method is used. The present invention is also applicable to those using.

[0081]

As described above, the first aspect of the present invention has a structure in which a frame higher than the component height is mounted on at least one surface of the printed circuit board and a plurality of bare chips are mounted on both surfaces. Mounting is easy, and miniaturization and high density are possible.

According to the second method of the present invention, at least one bare IC chip is mounted on the surface of a printed circuit board,
After connecting to the wiring pattern of the printed circuit board, before mounting the bare IC chip on the back surface of the printed circuit board and connecting, a frame for resin sealing is attached to the front surface side. The mounting can be performed with high accuracy, and high-precision and reliable mounting can be performed.

According to the third aspect of the present invention, two pseudo printed boards having a COB structure mounted on one side using bare IC chips are bonded via an insulating adhesive and a plate. Since the hybrid integrated circuit has a COB structure, it is possible to significantly reduce the size and increase the density.

[Brief description of the drawings]

FIG. 1 is a diagram showing a hybrid integrated circuit according to a first embodiment of the present invention.

FIG. 2 is a view showing a wire bonding step.

FIG. 3 is a view showing a wire bonding step.

FIG. 4 is a view showing a wire bonding step.

FIG. 5 is a view showing a lead frame used in the first embodiment of the present invention.

FIG. 6 is a diagram showing a hybrid integrated circuit according to a second embodiment of the present invention.

FIG. 7 is an enlarged view of a main part of the hybrid integrated circuit.

FIG. 8 is an exploded structural view of the same.

FIG. 9 is a perspective view of the same.

FIG. 10 is a diagram showing another embodiment of the present invention.

FIG. 11 is a diagram showing a conventional hybrid integrated circuit.

FIG. 12 is a diagram showing a hybrid integrated circuit of a conventional example.

FIG. 13 is a diagram showing a conventional hybrid integrated circuit.

FIG. 14 is a diagram showing a conventional hybrid integrated circuit.

FIG. 15 is a diagram showing a conventional hybrid integrated circuit.

FIG. 16 is a diagram showing a conventional hybrid integrated circuit.

[Explanation of symbols]

 1a, 1b Printed circuit board 2 Insulating adhesive 3 Die pad 4, 4s Wiring pattern 5 Silver paste 6 Bare IC chip 7 Gold wire 8 Chip coating resin 9 Frame 10 External connection lead frame 12 Capillary 13 More than Sound horn 14 Electric torch rod 15 Holding jig 17 Bonding stage 19 Crimp ball 20 Bare IC chip electrode (bonding pad) 21 Gold ball 22 Lower clamper 30 Capacitor 31 Resistance 32 SOP T Tie bar

──────────────────────────────────────────────────続 き Continued on the front page (58) Field surveyed (Int.Cl. ⁶ , DB name) H01L 23/28 H01L 21/56 H01L 25/00

Claims (2)

(57) [Claims] 1. A printed circuit board having a mounting area on a front surface and a back surface, a first bare IC chip connected to a surface of the printed circuit board by a metal wire, and a packaged electronic component connected to the surface by reflow soldering And a frame provided on the surface so as to cover a resin for sealing the first bare IC chip with a resin, and having a height greater than a height when the packaged electronic component is mounted. A second bare IC chip connected to the back surface by a metal wire. 2. A step of connecting a packaged electronic component to the surface of the printed circuit board by reflow soldering; a step of connecting a first bare IC chip to the surface of the printed circuit board with a metal wire; Encapsulating the IC chip with a resin, and providing a frame having a height greater than a height of the packaged electronic component when mounted on the surface of the printed circuit board so as to cover the resin; Connecting a second bare IC chip to the back surface of the printed circuit board with a metal wire while the frame is placed on a bonding stage.