JP3033541B2 - TAB tape, semiconductor device, and method of manufacturing semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a TAB tape having two metal structure which can deal with fine pitch at low cost while stabilizing the manufacture. SOLUTION: The body has a first plane 3 principally provided with a wiring pattern, and a second plane 4 opposite to the first plane 3 composed of a base film 2 constituting the side provided with a thin metal film layer forming a ground layer. The base film 2 is provided with a device hole part 2a having a space part into which the end 1a of the wiring pattern formed on the first plane 3 projects. A ground electrode part 4a composed of the thin metal film layer forming a ground layer projects into the space part from a position on the second plane 4 corresponding to the projecting position of the wiring end part constituting the ground electrode from the base film part 2 in a predetermined wiring pattern formed on the first plane 3 projecting into the space part.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a film carrier tape generally called a TAB tape, a semiconductor device using the TAB tape, and a method of manufacturing the semiconductor device. The present invention relates to a semiconductor device in which bumps are arranged in a grid array to connect a semiconductor IC chip to a mounting substrate.

[0002]

2. Description of the Related Art A semiconductor device using the conventional technique has been manufactured, for example, as follows. That is, as shown in FIG. 6, an insulating film made of polyimide or the like having a sprocket hole for transport and positioning and a device hole which is an opening where a semiconductor IC chip is arranged is used as a base film. A metal foil such as copper is adhered through an agent, and a lead having a desired shape and a pad for electrical selection are formed by etching the metal foil.

A lead (inner lead) projecting into a device hole of a film carrier tape formed in this way and a bump which is a metal protrusion provided in advance on an electrode terminal of an IC chip as a semiconductor device are heated. Inner lead bonding (Inner
Lead Bonding; hereinafter referred to as ILB)
Electric sorting and BT (Bu)
rn-In Test) test, and then the leads were connected to outer lead bonding (Outer Lead B).
cutting (hereinafter referred to as OLB).

At this time, in the case of a large number of pins having a large number of leads, an insulating film such as polyimide constituting a film carrier tape is left outside of the outer leads in order to prevent the outer lead bonding portion of the leads from scattering. Methods are often used. Next, for example, the leads are OLB mounted on the bonding pads on the printed circuit board to perform mounting.

In the method of mounting a semiconductor device using such a film carrier tape, it is difficult to ensure the coplanarity of the OLB lead when performing OLB on a printed circuit board because the thickness of the OLB lead is very thin, about 35 μm. In order to cope with this, an OLB bonder dedicated to a film carrier tape is required. In addition, when mounting is performed on the same substrate together with another package that can be mounted by batch reflow such as QFP, it is necessary to mount the package in a process different from the reflow process. For this reason, the film carrier tape type semiconductor device is treated as a special package, and the versatility is insufficient.

On the other hand, the outer lead pitch of a reflowable QFP or the like is limited to a pitch of about 0.4 mm. As a device capable of coping with this limitation, see, for example, Nikkei Microdevice, March, 1994, pp. 146-64. 58 to 64, a BGA (Ba) as a surface mount type package in which solder bumps are arranged in a grid pattern as external terminals on the back surface of the package.
II Grid Array).

[0007] In order to realize a package of 23 to 24 mm square of, for example, a 220-pin class, such a package requires QF.
In the case of P, a pitch of 0.4 mm is required, but a pitch of about 1.5 mm is sufficient, so that it can be seen that the mountability is excellent.
In addition, since the BGA has a small package outer size, the wiring length inside the package can be reduced, and the electrical characteristics are improved. As the substrate of the BGA package, a multilayer printed circuit board is used, but a ceramic substrate or a film carrier tape can also be used.

[0008] Among these, as an example using a film carrier tape, published by IBM Corporation (EIAJ-J
EDEC JWG # 2-7 TAPE BALL GR
There is an IDARRAY (MAY. 1994) BGA package [hereinafter referred to as a first embodiment]. FIG. 6 is a sectional view thereof. In this BGA package, a metal thin film solid layer 4 serving as a ground layer is provided on a surface opposite to a surface 3 (Sig plane surface) on which an inner lead and a wiring pattern are formed on an insulating base film 2 of a film carrier tape. (GND plane surface)
A plurality of inner leads 3a formed on the Sig plane surface 3;
The lead of the GND potential is connected to the ND plane surface 4 by the fine via hole 16 near the device hole 2a.
The plane surface 4 is electrically connected.

On the other hand, the other power and signal leads on the Sig plane surface 3 are routed to a predetermined position in the outside of the device hole 2a to form an external terminal forming land portion 12 (hereinafter referred to as a land portion). Against GND
GND plane surface O which is electrically separated from the plane surface
A TAB tape (hereinafter, a two-metal film carrier tape for T-BGA) wherein the LB land 13 is connected to the LB land 13 via a through-hole metallization 15;
Is used.

Further, the OLB land portion 13 of the GND plane surface of the film carrier tape for T-BGA having a two-metal structure
In addition, a reinforcing metal plate 9 is provided around the outside of the device hole 2a of the film carrier tape in order to secure the flatness of the solder bump 6 and improve the heat radiation characteristics. A BGA type semiconductor device, further comprising a heat dissipating metal plate 10 (heat spreader) provided on the back surface of the semiconductor IC 1 and on the reinforcing metal plate 9 and using the solder bumps 6 as external terminals for connection to a mounting board. A microstrip line conductor line structure peculiar to a two-metal film carrier tape can be formed, and the package is a semiconductor device having excellent electric characteristics of a single package.

Further, it has been conventionally known to manufacture a semiconductor device using a TAB tape. For example, as disclosed in Japanese Patent Application Laid-Open Nos. 4-74444 and 6-53277, In manufacturing semiconductor devices,
In mounting the semiconductor chip on the film carrier tape using a film carrier tape such as a TAB tape, a part of a signal line or a ground line connected to one surface of the base film is replaced with a part of the device hole. Protruding into the space of the wind hole provided in the periphery,
A semiconductor chip for projecting the signal line or the ground wiring protruding into the space of the appropriate groove and connecting the signal line or the ground wiring protruding into the space with the signal line or the ground wiring disposed on the other surface of the base film; Since the wiring is not directly connected to the wiring, the wiring length is increased, so that the effect of reducing the wiring resistance and the wiring capacitance cannot be expected.

[0012]

In the above-described conventional film carrier tape having a two-metal structure, since the wiring on the Sig plane surface is a microstrip line conductor line, only the GND potential lead is provided near the device hole in the vicinity of the device hole.
Since the grounding process is performed on the ND plane surface, a fine via hole metallizing process, which is extremely difficult in a manufacturing process and is one of the high cost factors of a film carrier tape having a two-metal structure, is required.

Although fine via hole metallization for grounding the GND plane surface is required to improve the electrical characteristics of the package, the larger the fine via hole Size, the lower the wiring allowance on the Sig plane surface. This effect becomes more remarkable as the pad pitch of the semiconductor IC becomes finer. Further, as described above, the conventional film carrier tape having a two-metal structure has a fine V
There are problems such as an increase in cost due to an ia hole forming process (wet etching, laser processing) and a through-hole metallization process, and difficulty in adapting a fine pitch due to the presence of fine via holes.

Further, the above-mentioned conventional BGA type semiconductor package using a two-metal structure film carrier tape has a shield film (solder) for protecting a copper thin film wiring portion on the Sig plane surface of the two-metal structure film carrier tape. (Resist) does not exist, the protection against corrosive substances from the outside is weak, and it is difficult to ensure the reliability of the package against corrosive substances. Also, the GND plane surface is formed separately from the copper thin film solid layer. G
There is no shield film (solder resist) for protecting portions other than the ND surface land pad portion, and there is a problem of mass productivity such as yield when solder balls are attached.

Accordingly, an object of the present invention is to provide a film carrier tape having a two-metal structure which can improve the above-mentioned disadvantages of the prior art, is low in cost, has excellent fine pitch compatibility, and can stabilize production. It is another object of the present invention to provide a semiconductor device using the film carrier tape. Further, the present invention relates to a BGA type semiconductor package using a film carrier tape having a two-metal structure, a film having a low cost, excellent fine pitch compatibility, and capable of stabilizing production. An object of the present invention is to provide a BGA type semiconductor device using a carrier tape.

[0016]

In order to achieve the above-mentioned object, the present invention employs the following basic technical structure. That is, as a first aspect according to the present invention, the first surface of the main body constitutes a surface on which a wiring pattern is mainly provided (hereinafter referred to as a Sig plane surface),
A second surface of the main body opposite to the first surface is formed of a base film having a surface (GND plane) on which a metal thin film layer forming a ground layer is provided. Is provided with a device hole at a predetermined position, and in a space of the device hole,
At the same time that the end of the predetermined wiring pattern formed on the first surface is protruded, the predetermined wiring pattern formed on the first surface protruding from the space is A metal thin film layer forming the ground layer from a position on the second surface corresponding to a position where the wiring end portion constituting the ground electrode projects from the base film portion to the space portion. The TAB tape has a ground electrode portion protruding into the space, and as a second aspect according to the present invention, an appropriate semiconductor chip portion is mounted on the device hole portion of the TAB tape. Further, the semiconductor device is a semiconductor device in which the connection terminal portion of the semiconductor chip is joined to each of the wiring terminal portions protruding into the space of the device hole.

Further, as a third aspect according to the present invention,
The first surface of the main body constitutes a surface on which a wiring pattern is mainly provided (hereinafter referred to as a Sig plane surface), and the second surface of the main body opposite to the first surface is a ground layer. And a base film having a surface (GND plane) on which a metal thin film layer is formed. The base film is provided with a device hole at a predetermined position. At the same time as protruding the end of the predetermined wiring pattern formed on the first surface into the space portion of the device hole, the predetermined portion formed on the first surface protruding into the space portion Forming the ground layer from the position on the second surface corresponding to the position where the wiring end portion constituting the ground electrode protrudes from the base film portion to the space portion in the wiring pattern Money A ground electrode portion made of a thin film layer is protruded into the space portion, and mutually opposing ground electrodes protruded from both surfaces into the space portion of the device hole portion are brought into contact with each other. After arranging a predetermined semiconductor chip in the space of the hole, the connection terminal of the semiconductor chip is bonded to each of the wiring terminals protruding into the space of the device hole. This is a method for manufacturing a semiconductor device.

[0018]

DESCRIPTION OF THE PREFERRED EMBODIMENTS TAB Tape and T According to the Present Invention
More specifically, a semiconductor device using an AB tape and a method for manufacturing the semiconductor device will be described. In the present invention, an inner lead formed of a metal thin film on an insulating film of a film carrier tape is used. A metal thin solid layer (hereinafter referred to as a GND plane) serving as a ground layer is formed on a surface opposite to a surface on which a wiring pattern is formed (hereinafter referred to as a Sig plane), and some of the inner leads formed on the Sig plane are present. The inner lead of the GND potential to be connected is connected to the GND plane lead which has the same pattern as the inner lead pattern of the GND potential on the GND plane surface and is formed so as to protrude inside the device hole.

Further, the power supply and signal system leads on the other Sig plane surface are routed to a predetermined position in the outside of the device hole to form an external terminal forming land portion (hereinafter referred to as a land portion). On the other hand, the GND plane surface OL which is electrically separated from the GND plane surface
The B lands are connected to each other via through-hole metallization.

That is, in the present invention, the above-described TAB
Tape, that is, a two-metal T-BGA film carrier tape.
Solder bumps are formed on the OLB lands on the GND plane side of the BGA film carrier tape, and a reinforcing metal plate is provided on the outer periphery of the device hole of the film carrier tape for securing the solder bump flatness and improving the heat radiation characteristics.
Further, a semiconductor device is provided in which a heat-dissipating metal plate (heat spreader) is provided on the back surface of the semiconductor IC and on the reinforcing metal plate, and the solder bumps are used as external terminals for connection to a mounting substrate.

Another technical configuration relates to a film carrier tape, which is a semiconductor device in which a solder resist film is provided on both the Sig plane surface and the GND plane surface or only on the GND plane surface.

[0022]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Specific examples of a TAB tape, a semiconductor device and a method of manufacturing a semiconductor device according to the present invention will be described below in detail with reference to the drawings. That is, FIG. 1 is a cross-sectional view schematically showing the configuration of a specific example of the TAB tape according to the present invention. A second surface 4 of the main body opposite to the first surface 3 is a surface (GND plane) on which a metal thin film layer forming a ground layer is provided. The base film 2 is provided with a device hole 2a at a predetermined position, and is formed on the first surface 3 in a space of the device hole 2a. At the same time that the end 1a of the predetermined wiring pattern is projected, the ground electrode is formed in the predetermined wiring pattern formed on the first surface 3 which is projected into the space. The end of the wiring is From the position on the second surface 4 corresponding to the position protruding into the space from the memory 2, a ground electrode portion 4 a formed of a metal thin film layer forming the ground layer protrudes into the space. A TAB tape is shown.

In the TAB tape according to the present invention, the ground electrode portion 4a composed of a metal thin film layer forming the ground layer protruding from the second surface 4 into the space of the device hole 2a is provided. The ground electrode 1a protruding into the space of the device hole on the first surface 3.
It is desirable to have a length such that they can contact each other in a refracted state.

Further, in the present invention, the ground electrode portion 4 made of a metal thin film layer forming the ground layer protruding from the second surface 4 into the space of the device hole 2a.
It is desirable that the length of “a” is set to be shorter than the length of the ground electrode 1 a protruding into the space of the device hole on the first surface 3. In the present invention, the Sig plane surface 3
External terminal forming land portion (OLB land portion) 1 to which the end of the wiring portion routed along the g plane surface 3 is connected.
On the other hand, the GND plane surface 4 has a GND plane surface external terminal forming land portion 13 (GND) which is electrically insulated from the metal thin film layer formed on the GND plane surface 4. (Plane plane OLB land)
Are formed, and O on the Sig plane surface 3 is formed.
LB land portion 12 and GN on the GND plane surface 4
A TAB tape may be used in which the D plane surface OLB lands 13 are connected to each other via metallized through holes formed in the base film.

The GND in the base film 2
Each of the solder bump mounting lands provided on the plane surface 4 preferably has a blind via structure 11. Next, as the semiconductor device 20 according to the present invention,
The semiconductor chip section 1 is mounted on the above-described TAB tape. Specifically, the appropriate semiconductor chip section 1 is mounted on the device hole section 2a of the above-described TAB tape, and the connection terminal section 1a of the semiconductor chip 1 is mounted on the TAB tape. A wiring terminal 3a protruding into the space of the device hole 2a.
And a structure joined to each of them.

Further, as the semiconductor device 20 according to the present invention, the GND plane surface 4 of the base film 2 is used.
A solder bump 6 is formed on the side OLB land portion 13 and a device hole 2 a provided in the base film 2.
A reinforcing metal plate 9 is provided on the outer peripheral portion of the semiconductor chip 1, and a heat dissipating metal plate 10 is provided on the back surface of the semiconductor chip 1 and the reinforcing metal plate 9 via an appropriate adhesive 8 or a high heat dissipating adhesive 8a. Things are also desirable.

In the semiconductor device 20 according to the present invention, the solder bumps 6 are used as external terminals for connection to an appropriate mounting board. Further, in the present invention, it is preferable that the land portion for mounting the solder bump has a blind via structure, or that the land portion for mounting the solder bump has a through-hole structure.

Further, the semiconductor device 2 of the present invention
At 0, it is also desirable that the solder resist film 5 is provided on the Sig plane surface 3 and the GND plane surface 4 of the base film 2. Hereinafter, TAB according to the present invention
More specific examples of the tape and the semiconductor device using the tape will be described with reference to the drawings.

That is, as described above, the TA according to the present invention
As shown in FIG. 1, the B tape and the semiconductor device 20 are: 1 is a semiconductor IC chip, 1a is an IC external terminal formed on the semiconductor IC chip, 2 is a base film of a film carrier tape, 2a is Device holes 3 opened in the base film, 3 is a metal thin-film wiring surface (Sig plane) made of copper or the like formed on the base film, and 3a is provided on metal thin-film wiring surface 3 so as to protrude into device hole 2a. The inner leads 4 are formed on the metal thin film solid layer surface 4 (GND plane) made of copper or the like formed on the surface opposite to the metal thin film wiring 3 via the base film 2, and 4 a is formed on the metal thin film solid layer surface 4. GND plane leads having the same pattern as that of the inner leads 3a and having a shorter length than the inner leads 3a, and 5 being a metal thin solid layer surface 4 (GND plane). ) Solder resist formed thereon, 6 is a solder bump, 7 is a sealing resin for protecting the semiconductor IC chip 1, 8 is an adhesive, 8a is a high heat radiation adhesive having high heat radiation characteristics, 9 is a solder bump Reference numeral 6 denotes a reinforcing plate for ensuring flatness, 10 denotes a heat spreader provided on the back surface of the semiconductor IC 1 via a high heat radiation adhesive 8a, and 12 denotes external terminals formed on the metal thin film wiring surface 3 (Sig plane). The forming land portion 13 is a metal thin film solid layer surface 4 (GND)
GND plane surface land formed on the
1 is to form a fine hole in the base film 2 to electrically connect the external terminal forming land portion 12 and the GND plane surface land portion 13 and to provide a metal thin film layer made of copper or the like on the side surface of the fine hole. Blinds Vi formed
Section a.

The present film carrier tape is manufactured by an ordinary tape manufacturing method having a two-layer two-metal structure. In the configuration of this specific example, the inner leads 3a formed of a metal thin film layer on the base film 2 of the film carrier tape and the metal thin film wiring surface 3 (hereinafter referred to as a Sig plane) on which a wiring pattern is formed are provided. A metal thin-film solid layer surface 4 (hereinafter referred to as a GND plane) serving as a ground layer is formed.
g Of the inner leads 3a formed on the plane surface 3,
Several GND potential inner leads 3a and GN
A two-metal film carrier tape having a configuration in which the GND plane lead 4a having the same pattern as the GND potential inner lead pattern and projecting inside the device hole 2a is connected to the D plane surface 4 is used. It has a configuration.

By adopting the above configuration, a fine Vi for GND plane conversion for reducing the ground impedance like a conventional two-metal film carrier tape can be obtained.
a Since there is no need for hole formation and metallization,
The g-plane surface 3 wiring tolerance is extremely high, and the fine pitch compatibility is improved. Furthermore, fine Via
The cost of the film carrier tape can be reduced by eliminating the need for the hole forming metallization process.

Further, in the first specific example, the solder resist film 5 for protecting the metal thin film wiring portion on the Sig plane surface 3 of the film carrier tape and the GND plane surface 4 are also formed from the metal thin film solid layer. By providing a solder resist film 5 for protection on portions other than the GND plane surface land portion 13 formed separately, from the viewpoint of improving package reliability and stabilizing the solder ball 6 attaching process. It is easy to ensure stability in package manufacturing.

FIGS. 2 (A) to 2 (C) and FIGS. 3 (A) to 3 (A)
(C) and FIG. 4 are step-by-step sectional views for explaining an example of the manufacturing method of the first specific example of the present invention. First, FIG.
As shown in FIG. 1A, a metal plate 13a (hereinafter referred to as an upper clamper) for supporting and fixing the film carrier tape (TAB tape) described with reference to FIG. 1 and the film carrier tape are supported and fixed. The film carrier tape is clamped and fixed by a metal plate 13b (hereinafter, referred to as a lower clamper) having a stage for bonding the target and the GND plane lead 4a, and the semiconductor IC 1 is placed on a bonding stage 18 having a heating mechanism.

Next, referring to FIG. 2B, a single point bonding tool 17 is formed on the GND plane 4 by using a single point bonding technique of a thermocompression bonding method combined with thermocompression bonding and ultrasonic waves. GND
The plane lead 4a is connected to the inner lead 3a formed on the Sig plane 3. Next, FIG.
In (C), the inner leads 3a formed on the Sig plane 3 are mounted on the bonding stage 18 using the single point bonding technique by using the single point bonding tool 17 in the semiconductor IC 1 mounted on the bonding stage 18. It is connected to the upper external terminal 1a.

Next, in FIGS. 3A and 3B, GN
An epoxy or silicone thermosetting liquid type sealing resin 7 is attached to the film carrier tape in a state where the D plane lead 4a is connected to the inner lead 3a and the inner lead 3a is connected to the external terminal 1a of the semiconductor IC 1.
The inside of the device hole 2 is sealed with a resin. next,
In FIG. 3C to FIG. 4, after the solder balls 6 are attached to the GND plane surface 4 side and the GND plane surface land side 13 of the film carrier tape, high heat radiation bonding is performed on the back surface of the semiconductor IC 1 and the reinforcing plate 9. By attaching the heat spreader 10 using the agent 9 and the adhesive 8, the film carrier tape type semiconductor device of the first specific example of the present invention can be obtained.

Next, a second embodiment of the present invention is shown in FIG.
The film carrier tape in FIG. 5 is characterized in that a film carrier tape in which the solder resist 5 is not provided on the Sig plane surface 3 is used. The adhesive 8 to be used is an adhesive having excellent characteristics such as insulation, adhesion, and solvent resistance, and has a solder resist film function to the adhesive 8, so that the solder resist is applied to the Sig plane surface of the film carrier tape. Eliminates the need for film formation
The cost of the film carrier tape itself can be reduced.

In the method of manufacturing a semiconductor device according to the present invention, for example, the first surface of the main body constitutes a surface on which a wiring pattern is mainly provided (hereinafter referred to as a Sig plane surface), The second surface opposite to the first surface is formed of a base film having a surface (GND plane) provided with a metal thin film layer forming a ground layer, and the base film includes: Using a base film provided with a device hole at the predetermined position, at the same time as projecting an end of a predetermined wiring pattern formed on the first surface into a space of the device hole, In the predetermined wiring pattern formed on the first surface protruding into the space, the wiring end constituting the ground electrode protrudes from the base film to the space. From the position on the second surface corresponding to the position on the second surface, the ground electrode portion formed of the metal thin film layer forming the ground layer is protruded into the space portion, and the device hole portion of the device hole portion is projected from both surfaces. The ground electrodes protruding into the space are brought into contact with each other, and after a predetermined semiconductor chip is disposed in the space of the device hole, the connection terminal of the semiconductor chip and the device hole are connected. This is a method of manufacturing a semiconductor device configured to join each of the wiring terminal portions protruding into the space portion of the semiconductor device.

Further, according to the present invention, in the above-described method for manufacturing a semiconductor device, the external terminal to which the end of the wiring portion routed along the Sig plane surface is connected to the Sig plane surface. Land part for formation (OLB land part)
And the GND plane surface is provided with the GND
A GND plane surface external terminal forming land portion (GND plane surface OLB land portion) electrically insulated from the metal thin film layer formed on the D plane surface is provided, and
It is also preferable that the OLB land portion on the g plane surface and the GND plane surface OLB land portion on the GND plane surface are connected to each other via metallized through holes formed in the base film.

[0039]

As described above, in the present invention, the surface opposite to the surface (hereinafter referred to as the Sig plane surface) on which the inner leads and the wiring patterns formed of the metal thin film layer are formed on the insulating film of the film carrier tape is formed. A metal thin solid layer (hereinafter referred to as a GND plane surface) serving as a ground layer is formed, and among the inner leads formed on the Sig plane surface, there are inner leads having a GND potential and GND.
Using a two-metal film carrier tape having the same pattern as the inner lead pattern of the GND potential on the D plane surface and connecting a GND plane lead formed so as to protrude inside the device hole; and Sig. The following effects can be obtained by providing a protective film of an epoxy-based or polyimide-based material on the plane surface and the GND plane surface.

That is, unlike the conventional film carrier tape having a two-metal structure, there is no need to form and metalize fine via holes for converting the GND plane to reduce the ground impedance. There is also an excellent effect in terms of the fine pitch correspondence degree due to the increase and the cost reduction due to the elimination of the need for forming and metallizing the fine via hole.

A shield film (solder resist) for protecting the copper thin film wiring portion on the Sig plane surface of the film carrier tape having a two-metal structure, and the GND plane surface is separated from the copper thin film solid layer. By providing a shield film (solder resist) for protection to portions other than the formed GND surface land pad portion, the package manufacturing process is improved in terms of improving package reliability and stabilizing the solder ball attaching process. Stability can be ensured.

[Brief description of the drawings]

FIG. 1 shows a TAB tape according to the present invention and the TB tape.
It is sectional drawing which shows the structure of one specific example of the semiconductor device using AB tape.

FIGS. 2A to 2C are cross-sectional views for connecting the steps of the manufacturing process of the semiconductor device shown in FIG. 1;

3 (A) to 3 (C) are cross-sectional views for connecting the steps of the manufacturing process of the semiconductor device shown in FIG. 1;

FIG. 4 is a cross-sectional view for connecting the steps of the manufacturing process of the semiconductor device shown in FIG. 1;

FIG. 5 shows a TAB tape according to the present invention and the TB tape.
It is sectional drawing which shows the structure of the other specific example of the semiconductor device using AB tape.

FIG. 6 is a diagram showing a conventional TAB tape and the TB tape.
It is sectional drawing which shows the structure of the specific example of the semiconductor device using AB tape.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 ... Semiconductor chip 1a ... Semiconductor chip external terminal 2 ... Base film 2a ... Device hole part 3 ... Sig plane surface 3a ... Inner lead 4 ... GND plane 4a ... Ground electrode part 5 ... Solder resist 6 ... Bump 7 ... Sealing resin 8 ... Adhesive material 8a ... High heat radiation adhesive material 9 ... Reinforcement plate 10 ... Heat diffusion plate 11 ... Blind Via 12 ... Land portion for forming external terminals 13 ... Land portion for GND plane surface 16 ... Via hole 20 ... Semiconductor device

Claims (13)

(57) [Claims] 1. A first surface of a main body is a surface on which a wiring pattern is mainly provided (hereinafter referred to as a Sig plane surface).
A second surface of the main body opposite to the first surface is formed of a base film having a surface (GND plane) on which a metal thin film layer forming a ground layer is provided, The base film is provided with a device hole at a predetermined position, and an end of a predetermined wiring pattern formed on the first surface is projected into a space of the device hole. At the same time, in the predetermined wiring pattern formed on the first surface protruding into the space, the wiring end constituting the ground electrode protrudes from the base film to the space. A ground electrode portion composed of a metal thin film layer forming the ground layer is protruded into the space from a position on the second surface corresponding to the position of the second surface.
AB tape. 2. A ground electrode portion formed of a metal thin film layer forming the ground layer protruding from the second surface into a space portion of the device hole, the device electrode hole being formed on the first surface. 2. The TAB tape according to claim 1, wherein said TAB tape has a length such that said ground electrode protrudes into said space and can abut against each other in a refracted state. 3. The length of a ground electrode portion made of a metal thin film layer forming the ground layer protruding from the second surface into a space portion of the device hole, the length of the ground electrode portion in the first surface is reduced. 3. The TAB tape according to claim 2, wherein the length of the ground electrode protruding into the space of the device hole is set to be shorter than the length of the ground electrode. 4. An external terminal forming land portion (OLB land portion) to which an end of a wiring portion routed along the Sig plane surface is connected is provided on the Sig plane surface. On the GND plane surface, the GN
A GND plane surface external terminal forming land portion (GND plane surface OLB land portion) which is electrically insulated from the metal thin film layer formed on the D plane surface is formed, and OLB on the Sig plane surface is formed. 4. The land according to claim 1, wherein the land portion and the land portion of the ground plane OLB on the ground plane surface are connected to each other via metallized through holes formed in the base film. The TAB tape described in Crab. 5. The TAB tape according to claim 1, wherein the land portion for mounting the solder bump provided on the GND plane surface of the base film has a blind via structure. 6. The TAB tape according to claim 1, wherein an appropriate semiconductor chip portion is mounted in the device hole portion, and the connection terminal portion of the semiconductor chip is connected to the device hole portion. A semiconductor device which is joined to each of the wiring terminal portions protruding into the space. 7. A solder bump is formed on an OLB land on the GND plane side of the base film, a reinforcing metal plate is provided on an outer peripheral portion of a device hole provided on the base film, and the semiconductor chip is provided. 7. The semiconductor device according to claim 6, wherein a heat-dissipating metal plate is provided on the back surface and the reinforcing metal plate. 8. The semiconductor device according to claim 6, wherein said solder bump is used as an external terminal for connection to an appropriate mounting board. 9. The semiconductor device according to claim 6, wherein the land portion for mounting the solder bump has a blind via structure. 10. The semiconductor device according to claim 5, wherein the land portion for mounting the solder bump has a through-hole structure. 11. The semiconductor device according to claim 6, wherein a solder resist film is provided on the Sig plane surface and the GND plane surface of the base film. 12. A first surface of the main body constitutes a surface on which a wiring pattern is mainly provided (hereinafter referred to as a Sig plane surface), and a second surface of the main body opposite to the first surface. The surface is constituted by a base film constituting a surface (GND plane) on which a metal thin film layer forming a ground layer is provided, and the base film has a device hole provided at a predetermined position on the base film. Using a film, the end of the predetermined wiring pattern formed on the first surface is projected into the space of the device hole, and the first surface is projected into the space at the same time. In the predetermined wiring pattern formed in the above, from the position on the second surface corresponding to the position where the wiring end constituting the ground electrode protrudes from the base film portion to the space portion, ground A ground electrode portion made of a metal thin film layer forming a layer is protruded into the space portion, and ground electrodes that can be opposed to each other and protrude from both surfaces into the space portion of the device hole portion are connected to each other. After that, after disposing a predetermined semiconductor chip in the space portion of the device hole, the connection terminal portion of the semiconductor chip is joined to each of the wiring terminal portions protruding into the space portion of the device hole portion. A method for manufacturing a semiconductor device, comprising: 13. The Sig plane is provided on the Sig plane surface.
An external terminal forming land portion (OLB land portion) to which an end portion of the wiring portion routed along the plane surface is connected is provided, and a metal thin film formed on the GND plane surface is provided on the GND plane surface. Lands for forming external terminals on the plane of the GND plane which are electrically insulated from the layer (GND)
Plane plane OLB land portion), and the OLB land portion on the Sig plane surface and the GND plane surface OLB land portion on the GND plane surface are formed through through-hole metallization formed in the base film. The method according to claim 12, wherein the semiconductor devices are connected to each other.