JP3297959B2 - Semiconductor device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device used for manufacturing, for example, a high-density mounted IC.

[0002]

2. Description of the Related Art In a conventional semiconductor device, for example, as shown in FIG. 7, a flat semiconductor element 52 called a chip is die-bonded on a die pad 51 with an Ag paste or the like. This semiconductor element 52
For example, on the top surface, as shown in FIG. 8, a plurality of electrode pads 53 made of Al are arranged in an electrode forming region 52b formed around the element region 52a, and each electrode pad 53 is provided for external connection. Is wire-bonded to the lead terminal 55 with a wire 54 of Au, Al or the like. Further, a sealing portion 56 made of epoxy resin or the like is formed in a state in which the connection portion including the lead terminals 55 and the wires 54 is integrally sealed, and such a semiconductor device is formed on a circuit board by a reflow method or the like. Implemented in

In recent years, ICs have been increasing in number of pins due to an increase in their functions. The increase in the number of pins means an increase in the size of the semiconductor element 52 on an extension of the conventional design rule. That is, the occupation area occupied by all the electrode pads 53 increases due to the increase in the number of individual electrode pads 53, and The area increases. On the other hand, with the miniaturization of electronic devices, miniaturization of semiconductor devices has also been promoted. Therefore, the area of the electrode pads 53 and the pad pitch d (see FIG. 7) for miniaturizing the semiconductor element 52 have been reduced. Increasing the number of pins is a major issue in development.

[0004]

However, in the above-described semiconductor device, there have been various problems in assembly in order to reduce the electrode pad 53 and the pad pitch d and increase the number of pins. For example, if the pad pitch d is reduced, the bonding jig may be damaged by contacting the adjacent wire 54 during wire bonding. Also, since the length of the wire 54 increases as the number of pins increases, the wire 54 is likely to be loosened or deformed at the time of sealing, which may cause a short circuit. Therefore, technical innovations at the limits, such as studying the material of the wire 54 and developing a bonding jig, have been studied, but no significant improvement has been seen.

The present invention has been made in view of the above problems, and has as its object to provide a semiconductor device which can reduce the size of a semiconductor element, is small, and is advantageous in increasing the number of pins.

[0006]

SUMMARY OF THE INVENTION In order to solve the above-mentioned problems, the present invention provides a plurality of electrodes formed on an insulating substrate and a plurality of electrode pads formed on a semiconductor element, which are respectively connected to each other, A semiconductor device in which the insulating substrate and the semiconductor element are sealed by a sealing portion, wherein the insulating substrate is N
The entire metal plate made of i or Cu is polyimide resin
Fat, epoxy resin, polyphenylene sulfide thermoplastic
Resin or polysulfone resin
Rutotomoni covered with an insulating film, a plurality of bond pads wired to the plurality of electrodes are formed corresponding to the plurality of bond pads, and the tip end side protrudes to the outside from the sealing portion And a plurality of terminals.

In the above apparatus, the metal plate may be made of Ni.
Alternatively, it is made of Cu .

[0008]

According to the semiconductor device of the present invention , a metal plate is heat-resistant.
If an insulating substrate covered with an edge film is used, ceramic materials can be used.
As with materials, it has excellent thermal conductivity,
Etc. can also serve as a role. Therefore, small
With more electrical pins and more excellent heat dissipation
A semiconductor device can be obtained.

[0009]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Embodiments of the semiconductor device according to the present invention will be described below with reference to the drawings. In the drawings, the same components as those of the conventional example are denoted by the same reference numerals. FIG. 1 is a sectional view showing an example of the semiconductor device of the present invention. As shown in the drawing, the semiconductor device of this embodiment includes an insulating substrate 11, a semiconductor element 52 disposed on the insulating substrate 11 and joined to the insulating substrate 11, and integrally sealing the insulating substrate 11 and the semiconductor element 52. And a sealing portion 20.

The semiconductor element 52 has a plate-like shape as in the prior art (see FIG. 8) and has an element region 52a formed substantially from the center and an electrode formation region 52b formed around the element region 52a. ing. Then, the electrode forming region 52
A plurality of electrode pads 53 are arranged on one surface corresponding to b, that is, near the outer periphery of one surface of the semiconductor element 52. The electrode pad 53 is made of, for example, Al, Cu, Au, Pd, or the like. In this embodiment, the insulating substrate 1 of the semiconductor element 52 is used.
On one side, for example, a through-hole (not shown) is provided.

Meanwhile, the insulating substrate 11 is made of a metal plate having heat insulating film is coated on the front surface. Is preferably one substantially match the linear expansion coefficient of the semi-conductor element 52, and is used having a heat resistance to withstand the soldering at the time of mounting on a circuit board. The insulating substrate 11 is formed to have an area substantially equal to the area of the semiconductor element 52, for example.

A plurality of electrodes 12 respectively corresponding to a plurality of electrode pads 53 of the semiconductor element 52 are formed on one of the surfaces of the insulating substrate 11 and on the side joined to the semiconductor element 52 in FIG. Have been. FIG. 2 is a schematic plan view of such an insulating substrate 11. FIG. 3 is a cross-sectional view showing a first example of the insulating substrate 11, showing an example in which the insulating substrate 11 is formed of, for example, a ceramic material.

As shown in FIG. 2 and FIG.
A plurality of electrodes 12 are formed in the periphery of the, and the same number of bond pads 13 as the number of the electrodes 12 are provided on the same surface as the electrodes 12. In the field of semiconductor manufacturing, the electrode pad 53 of the semiconductor element 52 may be referred to as a bond pad. In this specification, a pad provided on the insulating substrate 11 and wired to the electrode 12 is referred to as a bond pad 13. . For example, as shown in FIG. 2, the bond pads 13 are provided in an array on the center side of the insulating substrate 11 with respect to the electrodes 12, and each electrode 12 and each bond pad 13
And Au or the like are regularly wired.

The wiring 14 can be provided by a conventional technique such as electroless plating, electrolytic plating, or vapor deposition. FIG. 1 shows a state in which each electrode 12 and each bond pad 13 are wired and the wiring pattern 18 is formed on the surface of the insulating substrate 11 on the semiconductor element 52 side.

A through hole 15 is formed under each bond pad 13, and a bonding hole corresponding to each of the through holes 15 is formed on the surface of the insulating substrate 11 opposite to the side joined to the semiconductor element 52. Pads 16 are provided, for example, in an array. This through hole 15 can be mechanically processed by a conventional technique such as etching.
The inside of the through hole 15 can also be processed by a conventional technique such as electroless plating or electrolytic plating using Cu, Au, solder, Pd alloy or the like.

Further, terminals 17 made of solder or the like are provided on the surface of the insulating substrate 11 opposite to the side joined to the semiconductor element 52, corresponding to each bond pad 16. That is, the same number of terminals 17 as the bond pads 13 on the surface on the semiconductor element 52 side are provided in an array on the surface of the insulating substrate 11 opposite to the side joined to the semiconductor element 52. The terminal 17 is formed, for example, in the shape of a ball by a method such as plating or immersion.
It is made of a material that can be used in a later mounting step on a circuit board, such as a material plated with Au, a material plated with Sn, Au, Ni, or the like on a Cu material.

On the insulating substrate 11, the above-mentioned semiconductor element 52 is arranged and joined with the electrode pad 53 facing the electrode element 53. At this time, the insulating substrate 11
The semiconductor element 52 and the semiconductor element 52 are joined in a state where the electrode 12 of the insulating substrate 11 and the electrode pad 53 of the semiconductor element 52 abut against each other. The joining is performed using, for example, an ultrasonic bonder. Further, the bonding combination between the electrode pad 53 and the electrode 12 is, for example, Al-Al, Al-Cu, Al-
In the case of Au or the like, bonding can be performed by appropriately applying heat.

Then, the joined insulating substrate 11 and the semiconductor element 52 are integrally sealed with, for example, a resin material, a ceramic material, or the like except for the distal end side of the terminal 17 to form a sealing portion 20. That is, in the sealed state, the distal end side of each terminal 17 projects outside from the sealing portion 20.

The bonded insulating substrate 11 and semiconductor element 52 can be mounted on a circuit board before sealing, that is, a so-called direct bond is also possible. In this case, the sealing is performed by performing potting or the like with a liquid resin. The part 20 can be formed. As a method for sealing the joined insulating substrate 11 and semiconductor element 52 before mounting them on a circuit board, for example, potting, transfer molding and the like are available. In any case, the insulating substrate 11 and the semiconductor element 52
Are integrally sealed to provide environmental protection in terms of mechanical strength and moisture resistance.

In the semiconductor device constructed as described above, the bond pads 13 are provided on the insulating substrate 11 in a state of being dispersed over the entire surface of the semiconductor element 52, so that it is not necessary to adopt the wire bonding method. 5
Even if 3 or the pad pitch d is reduced, problems such as damage, deformation, and short-circuit of the wire do not occur, and the assembly becomes easy. As a result, the electrode pads 53 and the pad pitch d can be reduced, the number of pins can be increased, and the size of the semiconductor element 52 itself can be reduced.

Further, since there is no conventional lead terminal and no wires are used, the thickness can be reduced. Furthermore, compared with the wire bonding method, the electrode pad 53
Since the length of the wiring from the terminal to the terminal 17 can be reduced, electric characteristics such as high frequency characteristics and noise characteristics are improved. When the insulating substrate 11 is made of a ceramic material,
It becomes excellent in thermal conductivity, and the insulating substrate 11 itself also functions as a heat sink. Therefore, according to this embodiment, it is possible to obtain a semiconductor device which is compact and advantageous for increasing the number of pins, and which is excellent in electric characteristics and heat radiation characteristics.

Next, an example of forming the insulating substrate 11 made of a material other than the ceramic material will be described. FIG. 4 is a sectional view showing a second example of the insulating substrate 11. As shown, the insulating substrate 11 includes a metal plate 11a and the metal plate 11a.
and a heat-resistant insulating film 11b covering the entirety of the insulating film 11a.

In this case, the metal plate 11a and the heat-resistant insulating film 11
b is preferably made of a material substantially matching the linear expansion coefficient of the semiconductor element 52, and for example, Ni, Cu or the like is used as the metal plate 11a. The heat-resistant insulating film 11b is made of a material having heat resistance.
1 is made of the same material as that made of a plastic material. The heat-resistant insulating film 11b is provided so as to cover the inside of the through hole 15 formed in the insulating substrate 11.

As in the case of the above-described ceramic material, the electrode 12 and the wiring pattern 18 are provided on one of the surfaces, in this embodiment, on the surface to be joined to the semiconductor element 52. Is formed. In addition, an array of bond pads 16 and terminals 17 are provided via a through hole 15 on the surface opposite to the side joined to the semiconductor element 52.

The insulating substrate 11 has excellent thermal conductivity as in the case of the ceramic material, and can also serve as a heat sink or the like. Therefore, even when the insulating substrate 11 in which the metal plate 11a is covered with the heat-resistant insulating film 11b is used, it is compact and advantageous in increasing the number of pins, and has electrical characteristics.
A semiconductor device having excellent heat dissipation characteristics can be obtained.

FIG. 5 is a sectional view showing a third example of the insulating substrate 11, showing an example in which the insulating substrate 11 is made of a plastic material having heat resistance. Examples of the plastic material include, for example, polyimide resins, epoxy resins such as glass epoxy, polyphenylene sulfide thermoplastic resin, and polysulfone resin, which are one of the materials for circuit boards to which semiconductor devices can be directly bonded.

Such a plastic material forms the insulating substrate 11 in the same manner as the case of the ceramic material shown in FIG.
5, terminals 17 and the like can be provided, and can also be formed as shown in FIG.

That is, the plastic material is laminated on the surface of the electrode pad 53 of the semiconductor element 52 to a predetermined thickness while including the electrode pad 53, thereby forming the insulating substrate 1.
1 is formed. Then, the electrode pad 53 of the insulating substrate 11
Are provided at the positions corresponding to the through holes 19, and the electrodes 12 are provided corresponding to the through holes 19 on the surface of the insulating substrate 11 opposite to the side joined to the semiconductor element 52. In the same plane as the electrode 12, the wiring pattern 1
8 are formed, and a ball-shaped terminal 17 is provided on the surface of the insulating substrate 11 opposite to the surface to be joined to the semiconductor element 52 in the same manner as described above. Note that a diffusion preventing film may be interposed between the terminal 17 and the wiring pattern 18.

When a plastic material having heat resistance is used as a constituent material of the insulating substrate 11, the insulating substrate 11 can be formed as shown in FIG. 3 and then joined to the semiconductor element 52, as shown in FIG. As described above, the semiconductor element 52 can be bonded to the semiconductor element 52 by directly forming the layer on the semiconductor element 52. That is, the insulating substrate 11 can be flexibly formed when various semiconductor devices are formed, and has an advantage of high applicability.

Next, another example of the semiconductor device of the present invention will be described. FIG. 6 is a sectional view showing another example of the semiconductor device of the present invention. This embodiment differs from the embodiment shown in FIG. 1 in that the wiring pattern 18 is formed on the surface of the insulating substrate 11 opposite to the side connected to the semiconductor element 52, and the semiconductor element of the insulating substrate 11 This is the point that another insulating substrate 21 is interposed between the plurality of terminals 17 on the side opposite to the side connected to the terminal 52.

That is, the semiconductor element 52 on the insulating substrate 11
An electrode 12 is formed on the surface on the side to be joined with the same as in the case of FIG. 1, and a through hole 19 is formed below each of the electrodes 12. Each of the through holes 1 is provided on the surface of the insulating substrate 11 opposite to the side connected to the semiconductor element 52.
The electrode 12 is provided again corresponding to the electrode 9, and a wiring pattern 18 composed of an array of bond pads and wiring (both not shown) is formed in the same plane as the electrode 12.

On the other hand, as described above, another insulating substrate 21 is provided on the side of the insulating substrate 11 on which the wiring pattern 18 is formed. The insulating substrate 21 is made of, for example, a ceramic material or the like, like the insulating substrate 11 described above.
An electrode 22 corresponding to the electrode 12 and the same number of pads 23 as the number of bond pads on the insulating substrate 11 are formed on the surface on the side where the one wiring pattern 18 is formed. In addition, through holes 24 are formed under the respective pads 23, and bond pads 23 corresponding to the respective through holes 24 are formed on the surface of the insulating substrate 21 opposite to the side joined to the semiconductor element 52. Are provided in, for example, an array.

Further, terminals 17 made of solder or the like are provided on the surface of the insulating substrate 21 opposite to the surface to be joined to the semiconductor element 52, corresponding to each pad 23. The insulating substrate 21 and the insulating substrate 11 are connected to the wiring pattern 1.
The electrode 12 and the electrode 22 on the eighth side, and the bond pad of the wiring pattern 18 and the pad 23 of the insulating substrate 21 are joined in a state where they abut each other. A sealing portion 2 for integrally sealing the semiconductor element 52 and the insulating substrates 11 and 21;
0 is provided except for the distal end side of the terminal 17.

In such a semiconductor device, when the insulating substrate 21 is composed of a ceramic material or a metal plate 11a shown in FIG. Since the insulating substrates 11 and 21 are provided, the heat radiation characteristics are extremely excellent. Therefore, a more reliable semiconductor device can be obtained.

[0035]

As described above, according to the semiconductor device of the present invention, it is advantageous to reduce the size and increase the number of pins, and furthermore, to reduce the electric characteristics.
And a semiconductor device having excellent heat dissipation characteristics .

[Brief description of the drawings]

FIG. 1 is a sectional view showing an example of a semiconductor device of the present invention.

FIG. 2 is a schematic plan view of an insulating substrate.

FIG. 3 is a sectional view of a first example of an insulating substrate.

FIG. 4 is a cross-sectional view of a second example of the insulating substrate.

FIG. 5 is a cross-sectional view of a third example of the insulating substrate.

FIG. 6 is a sectional view showing another example of the semiconductor device of the present invention.

FIG. 7 is a cross-sectional view illustrating an example of a conventional semiconductor device.

FIG. 8 is a schematic view showing an example of forming an electrode pad.

[Explanation of symbols]

 11, 21 Insulating substrate 11a Metal plate 11b Heat-resistant insulating film 12 Electrode 13 Bond pad 17 Terminal 20 Sealing part 52 Semiconductor element 53 Electrode pad

Claims (1)

(57) [Claims] 1. A plurality of electrodes formed on an insulating substrate and a plurality of electrode pads formed on a semiconductor element are respectively connected to each other, and the insulating substrate and the semiconductor element are sealed by a sealing portion. Semiconductor device, wherein the insulating substrate is made of Ni or Cu.
The polyimide resin, epoxy resin, polyphenylenesul
Fid thermoplastic resin or polysulfone resin
One kind is coated with a configured insulating film Rutotomoni, a plurality of bond pads wired to the plurality of electrodes are formed corresponding to the plurality of bond pads, and the distal end side of the sealing portion A semiconductor device, comprising: a plurality of terminals protruding to the outside.