JPH09246416A - Semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To realize improvement in thermal diffusion of a semiconductor device by providing a conductor layer supported on an insulating film in an inner region of a wiring pattern film in which an external connection terminal is provided, and connecting a metal bump to the conductor layer. SOLUTION: In an inner region of a surface of a semiconductor chip 10 on which an electrode terminal 8 is formed, a wiring pattern film is formed by supporting a wiring pattern 18 on an insulating film 17, with one end connected to an external connection terminal 14 and with the other end electrically connected to an electrode terminal 8. In an inner region of the region of this wiring pattern film where the external connection terminal 14 is provided, a conductor layer 32 supported on the insulating film 17 is provided, and a metal bump 30 is connected to the conductor layer 32. Thus, thermal diffusion of the semiconductor chip 10 may be improved and the semiconductor chip 10 having a large calorific value may be mounted.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device formed to have substantially the same size as a semiconductor chip.

[0002]

2. Description of the Related Art As a semiconductor device formed by sealing a semiconductor chip, there is a product formed to have substantially the same size as the semiconductor chip. 9 and 10 show such a semiconductor device (Chip Size
A conventional example of Package) is shown. FIG. 9 is a plan view of the semiconductor device as seen from the mounting surface side, and FIG. 10 is a cross-sectional view showing a support structure of an external connection terminal on a semiconductor chip. The semiconductor device shown in this conventional example is a product in which a metal ring 12 for protection is mounted on the peripheral side surface of a semiconductor chip 10.

Electrode terminals 8 are formed on the surface of the semiconductor chip 10, and external connection terminals 14 are provided so as to be electrically connected to these electrode terminals 8. In the conventional example shown in FIG. 9, the external connection terminal 14 is arranged at the peripheral portion of the mounting surface of the semiconductor device.

The external connection terminal 14 is a wiring pattern film 16 adhered onto the semiconductor chip 10 via an adhesive layer 15.
Supported by The wiring pattern film 16 has a predetermined wiring pattern 18 formed on one surface of the insulating film 17,
The external connection terminal 14 is joined to one end of the wiring pattern 18 to be formed. A solder resist 19 protects the outer surface of the wiring pattern film 16. The other end of the wiring pattern 18 has leads 2 extending from the peripheral edge of the insulating film 17.
The lead 20 is bonded to the surface electrode 8. As a result, the electrode terminal 8 and the external connection terminal 14 are electrically connected. After bonding the lead 20, the resin material 15a is applied and the bonding portion of the lead 20 is sealed. Thus, as shown in FIG. 9, a semiconductor device in which the external connection terminals 14 are arranged on the outer surface of the wiring pattern film 16 is obtained. The resin material 15a is filled between the semiconductor chip 10 and the protective metal ring 12.

In the semiconductor device described above, the external connection terminal 14
And the electrode terminal 8 of the semiconductor chip 10 are electrically connected, the insulating film 17 of the wiring pattern film 16 is formed.
The leads 6 are extended from the edges of the electrodes and the ends of the leads are bonded to the electrode terminals 8. However, as shown in FIG. 11, the external connection terminals 14 and the electrode terminals 8 are electrically connected by the wire bonding method. It is also possible. In this case, it is not necessary to extend the other end side of the lead from the peripheral edge of the insulating film. Reference numeral 22 in FIG. 11 denotes a pad portion for wire bonding, which is provided on the edge portion of the insulating film 17. The pad portion 22 is connected to the external connection terminal 1 via the wiring pattern 18.
4 and the pad portion 22 and the electrode terminal 8 are connected by the wire 24, the electrode terminal 8 and the external terminal 14 are electrically connected.

[0006]

By the way, as a problem when mounting a semiconductor device having substantially the same size as the semiconductor chip 10 as described above, since these semiconductor devices are extremely small, the surface area thereof is small, There is a problem that it is not suitable for mounting a semiconductor chip that generates a large amount of heat due to insufficient heat dissipation from the semiconductor device during mounting.

The heat dissipation from the semiconductor device when the above semiconductor device is mounted on the mounting substrate is dissipated to the mounting substrate side through the external connection terminals 14 and to the dissipated from the outer surface of the semiconductor device. There is. However, the external connection terminals 14 arranged in the conventional semiconductor device are only arranged in the peripheral portion of the mounting surface, and it cannot be said that heat dissipation through the external connection terminals 14 is sufficient. Although it is possible to attach a radiation fin to the outer surface of the semiconductor device in order to enhance heat dissipation from the body of the semiconductor device, the provision of the radiation fin impedes downsizing of the semiconductor device.

As described above, the present invention has been made to solve the problem of heat dissipation, which has been a problem in a semiconductor device formed in a size substantially the same as a semiconductor chip.
An object of the present invention is to provide a semiconductor device which improves reliability of the semiconductor device by improving the heat dissipation property of the semiconductor device and enables mounting of a semiconductor chip having a large heat generation amount and which is easier to handle.

[0009]

The present invention has the following constitution in order to achieve the above object. That is, a wiring pattern, one end of which is connected to an external connection terminal and the other end of which is electrically connected to the electrode terminal, is formed in the inner region of the surface of the semiconductor chip on which the electrode terminals are formed, supported by an insulating film. In the semiconductor device in which the wiring pattern film is adhered to expose the electrode terminals, and the wiring pattern and the electrode terminals are electrically connected, a region in which the external connection terminals of the wiring pattern film are provided. A conductor layer supported by the insulating film is provided in an inner region of the, and metal bumps are provided so as to be connected to the conductor layer. The conductor layer may be formed on the entire surface of the region where the metal bumps are formed. Further, the wiring pattern film is characterized in that an outer surface of the wiring pattern and the conductor layer is covered with an insulating layer except for the external connection terminal and the metal bump. Further, the external connection terminals and the metal bumps are solder balls formed in a joint hole portion that extends to the wiring pattern and the conductor layer provided in the insulating layer. Further, the wiring pattern film is adhered to a semiconductor chip with an insulating film as an outer surface, plating metal is raised in the connection hole leading to the wiring pattern and the conductor layer provided in the insulating film, and the external connection terminal and It is characterized in that a metal bump is formed. In addition, the lead formed by extending the wiring pattern of the wiring pattern film from the edge of the insulating film and the electrode terminal of the semiconductor chip are directly bonded and joined. Also, the wiring pattern formed on the wiring pattern film and the electrode terminal of the semiconductor chip are connected by wire bonding.

[0010]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Preferred embodiments of the present invention will be described below. FIG. 1 is a plan view of a semiconductor device according to one embodiment of the present invention, viewed from the mounting surface side. In the semiconductor device of this embodiment, the external connection terminals 14 that are electrically connected to the electrode terminals 8 of the semiconductor element 10 are arranged on the peripheral portion of the mounting surface, and heat is generated inside the region where the external connection terminals 14 are arranged. Dispersion metal bump 30
It is characterized by arranging. In FIG. 1, a portion A is a region where the metal bump 30 is arranged. The metal bumps 30 are provided for the purpose of effectively dissipating heat on the mounting substrate side when the semiconductor device is mounted on the mounting substrate. Therefore, unlike the external connection terminal 14, the metal bump 30 does not need to be electrically connected to the electrode terminal 8 of the semiconductor chip 10.

FIG. 2 is a sectional view showing a state in which the semiconductor device of this embodiment is mounted on the mounting substrate 26. In the semiconductor device, the wiring pattern film 16 is adhered to the surface of the semiconductor chip 10 on which the electrode terminals 8 are formed via the adhesive layer 15, and the leads 20 extending from the edges of the insulating film 17 are bonded to the electrode terminals 8. Become. The external connection terminal 14 is electrically connected to the electrode terminal 8 via the wiring pattern 18 and the lead 20. The basic structure of these wiring pattern films 16 is the same as that of the conventional example.

As described above, the metal bumps 30 are formed in the inner region where the external connection terminals 14 are arranged. These metal bumps 30 are bonded to the conductor layer 32 supported by the insulating film 17. It is provided. In this embodiment, the conductor layer 32 is formed on one surface over the entire area where the metal bumps 30 are formed, and the metal bumps 30 are bonded to the conductor layer 32 formed on this surface. In this way, the conductor layer 32
The reason why the surface is formed is that the heat from the semiconductor chip 10 is effectively conducted to the metal bumps 30 and the heat can be efficiently dissipated through the metal bumps 30. In addition, the conductor layer 32 for joining the metal bumps 30 is not integrally formed on the surface, and each metal bump 30 or a plurality of metal bumps 3 is formed.
It is also possible to form islands every 0.

Connection pads 28 are formed on the mounting substrate 26 in correspondence with the positions of the external connection terminals 14 and the metal bumps 30 of the semiconductor device, and the external connection terminals 14 and the metal bumps 3 are formed.
It is mounted by bonding 0 to the connection pad 28 of the mounting board. The mounting substrate 26 of the illustrated example has two ground layers 27 that also function as heat sinks in the substrate. The connection pads 28 for connecting the metal bumps 30 are connected to the ground layer 27 by the inner layer connection vias 29 provided inside the mounting substrate. Further, the metal layer may function as a ground layer or a power supply layer, and the metal bump 30 may function as a grounding external connection terminal or a power supply external connection terminal.

FIG. 3 shows the results of measuring the effect of heat dissipation on the semiconductor device of this embodiment. In this measurement, a mounting board provided with two ground layers was used, and as the semiconductor device, the semiconductor chip 10 shown in the above embodiment with the metal ring 12 mounted on the peripheral side surface was used. In FIG. 3, a graph a is a measurement result when the semiconductor device of the present embodiment provided with the metal bumps 30 is mounted, and a graph b is a measurement result when a conventional semiconductor device without the metal bumps 30 is mounted.

This measurement result shows that the thermal resistance is improved by providing the metal bump 30. Since the semiconductor device of this embodiment is extremely small, the improvement in thermal resistance is not so remarkable, but can be expected to some extent.

The semiconductor device of this embodiment has an external connection terminal 1
4 and the wiring pattern film 16 provided with the metal bumps 30 are adhered to the semiconductor chip 10 with the adhesive layer 15. Below, the manufacturing method of the wiring pattern film 16 which has this metal bump 30 is demonstrated.

FIG. 4 shows the wiring pattern 18 and the leads 20.
The manufacturing process of the wiring pattern film 16 which uses copper for the main components of the conductor which comprises is shown. FIG. 4A shows an insulating film 40 such as a polyimide film used as a support for the wiring pattern film 16. This insulating film 40 is a film having an adhesive applied to one surface thereof. First, the insulating film 40 is punched to open a window 42, and then a copper foil 44 is bonded to one surface of the insulating film 40 (FIG. 4 (b). )
). The window 42 is a portion for forming the lead 20 to be bonded to the electrode terminal 8 of the semiconductor chip 10, and is provided at a position where the upper side of the electrode terminal 8 is opened in a state where an insulating film is bonded to the semiconductor chip 10.

Next, the copper foil 44 is etched to form the wiring pattern 18, the leads 20, the conductor layer 32 and the like. A method of forming the wiring pattern 18, the conductor layer 32, etc. is based on a so-called photolithography method. That is,
The resist 45 is applied to the surface of the copper foil 44, and is patterned to form a resist pattern exposing only the portion where the copper foil 44 is removed, and the copper foil 44 is etched by using this resist pattern as a mask (FIG. Four
(c)).

After etching the copper foil 44, the resist 4
5 is removed (FIG. 4 (d)). Thereby, the wiring pattern 18 on the insulating film 40, the land 18 a for joining the external connection terminal 14 to one end of the wiring pattern, and the lead 2 formed by extending the other end of the wiring pattern into the window 42.
0, the conductor layer 32 is formed. Reed 6 is as shown
The window 42 is supported so as to span the insulating film 40.

Next, the wiring pattern 18 and the conductor layer 32
A protective insulating layer on the surface of the insulating film 40 provided with
For example, a solder resist 46 is applied, the solder resist 46 is patterned, and the land 18a for joining the external connection terminals 14 and the solder resist 46 at the portion where the metal bump 30 is joined on the conductor layer 32 are removed to remove the land 18a.
And the conductor layer 32 is exposed. FIG. 4E shows a bonding hole 48 for patterning the solder resist 46 and bonding the external connection terminal 14 and the metal bump 30 to the solder resist 46.
Is in the state of being formed.

Next, gold plating is applied to form a gold plating layer 50 on the outer surface of the lead 20 and the surface of the copper foil in the bonding hole 48. By this gold plating, the surface of the copper layer of the lead 20 is covered with the gold plating layer 50 (FIG. 4).
(f)). A joint hole 48 is formed in the land 18a and the conductor layer 32.
The solder balls are joined from the portions to form the external connection terminals 14 and the metal bumps 30 for heat dissipation. In the manufacturing process of the semiconductor device, after the wiring pattern film 16 at the above stage is adhered to the semiconductor chip 10, the solder balls are attached. To join. The wiring pattern film 16 of FIG.
0 corresponds to the insulating film 17 in FIG. 2, and the solder resist 46 corresponds to the solder resist 19.

FIG. 5 shows a method of manufacturing a semiconductor device using the wiring pattern film 16 obtained by the above method. That is, the wiring pattern film 16 is bonded to the semiconductor chip 10 with the surface on which the external connection terminals 14 and the metal bumps 30 are formed as the outer surface (FIG. 5A). The insulating film 40 is adhered to the region inside the electrode terminal 8 formed on the semiconductor chip 10 via the adhesive layer 15 having an elastic action.
The lead 20 extends above and is supported by the electrode terminal 8.

In this state, the bonding tool 52 is pushed down from above the lead 20 and the tip of the lead 20 is bonded to the electrode terminal 8 of the semiconductor chip 10 (FIG. 5 (b)). The bonding tool 52 cuts the lead 20 and then bends the lead 20 as it is to join the electrode terminal 8. The bonding by the bonding tool 52 is by thermocompression bonding which also uses ultrasonic waves. After joining the lead 20 to the electrode terminal 8, the lead 20, the bonding portion, and the exposed portion of the electrode terminal 8 are sealed with the resin material 15a (FIG. 5).
(c)).

Finally, solder balls are bonded to the lands 18a of the wiring pattern film 16 and the bonding holes 48 to form the external connection terminals 14 and the metal bumps 30. Thus, a semiconductor device having the metal bumps 30 is obtained (FIG. 5).
(d)). The external connection terminals 14 and the metal bumps 30 are not limited to solder balls, and connection terminals having metal spheres plated with solder may be used.

FIG. 6 shows another manufacturing process for forming the wiring pattern film 16. In this method, the insulating film 40 is used.
A single-sided copper-clad insulating film 60 having a copper foil 44 attached to one side thereof is used (FIG. 6 (a)). First, gold plating for forming the wiring pattern 18 (including the land 18a), the lead 20 and the conductor layer 62 is performed on the copper foil 44 of the one-sided copper-clad insulating film 60. Therefore, a resist 45 is applied on the copper foil 44 to form a resist pattern on the copper foil 44 exposing only the portions where the wiring pattern 18, the leads 20 and the conductor layer 62 are formed (FIG. 6B).

In this state, the exposed copper foil 44 is gold-plated to form a gold plating layer 64 on the copper foil 44 (FIG. 6).
(c)). FIG. 6D shows a state in which the resist 45 is removed and the gold plating layer 64 is formed on the copper foil 44 in a predetermined pattern. Next, the connection holes 66 for forming the external connection terminals 14 and the metal bumps 30 are formed by opening the insulating film 40. The connection holes 66 are formed in accordance with the portions (lands 18a) for forming the external connection terminals 14 connected to the wiring pattern 18 and the portions for forming the metal bumps 30 connected to the conductor layer 62. The connection hole 66 can be formed by using laser light or chemical etching. FIG. 6 (e) shows a state in which the connection hole 66 is formed.

The external connection terminals 14 and the metal bumps 30 are formed by electroplating the connection holes 66. Copper foil 44
Since is deposited on the entire surface of the insulating film 40, required plating such as nickel plating can be performed by electrolytic plating using the copper foil 44 as a plating power supply layer.

FIG. 6 (f) shows a state in which the connection holes 66 are plated by electrolytic plating to form the external connection terminals 14 in the form of bumps. A window 42 for bonding the lead 20 to the electrode terminal 8 of the semiconductor chip 10 is formed in the insulating film 40. This window formation can be performed using laser light or chemical etching.

Next, the copper foil 44 is etched using an etching solution that selectively removes only the copper foil 44. FIG.
(f) is a state after the copper foil 44 is etched. Conductor layer 62 at the center of insulating film 40, wiring pattern 1
8, the lead 20 in the window 42 portion is formed by being supported by the insulating film 40. In the present embodiment, as described above, unlike the manufacturing method described above, the external connection terminals 14 are provided at the stage of the manufacturing process of the wiring pattern film 16.

In the above process, the lead 20 is a portion which remains by removing the copper foil 44 adhered to the gold plating layer 64 by etching, and is formed by the gold plating layer 64 itself. Therefore, when forming the gold plating layer 64, it is necessary to appropriately set the plating thickness and the like so that the required strength and the like of the lead 20 can be obtained.

The wiring pattern film 16 obtained by the above manufacturing process is also externally connected to the wiring pattern 18 formed on the insulating film 40 and the conductor layer 62, like the wiring pattern film 16 obtained by the above manufacturing process. The terminal 14 and the metal bump 30 are formed,
The lead 20 is formed by extending the edge of the insulating film 40 into the window 42. The method of manufacturing a semiconductor device using this wiring pattern film 16 is the same as that of the above-mentioned embodiment. That is, it is obtained by aligning the wiring pattern film 16 with the semiconductor chip 10, adhering the wiring pattern film 16 via an adhesive layer, and bonding the leads 20 to the electrode terminals 8 of the semiconductor chip 10 using a bonding tool. . In addition,
In the wiring pattern film 16 in this embodiment, the surface on which the wiring pattern 18 and the conductor layer 62 are formed serves as the adhesive surface to the semiconductor chip 10, and the insulating film 40 is the outer surface side.

FIG. 7 shows a semiconductor device produced using the wiring pattern film 16 obtained by the above process.
The metal bumps 3 are provided on the inner area where the external connection terminals 14 are arranged.
0 is formed, the external connection terminal 14 has a wiring pattern 18,
The metal bump 30 is electrically connected to the electrode terminal 8 via the lead 20, and the metal bump 30 is connected to the conductor layer 62. In this embodiment, the conductor layer 62 has a two-layer structure of a copper foil 44 and a gold plating layer 64. The semiconductor device of this embodiment has an external connection terminal 1
4 and the metal bumps 30 are formed by raising plated metal.

The wiring pattern film 16 described above is used.
In the manufacturing process of both, from the insulating film 40 to the lead 2
It is a method of forming the wiring pattern film 16 which is bonded to the electrode terminal 8 of the semiconductor chip 10 while 0 is extended outward and the lead 20 is cut off by a bonding tool. In the case of the method of connecting the electrode terminal 8 of the semiconductor chip 10 and the external connection terminal 14 by the wire bonding method as shown in FIG. 11, the insulating film 4 is used.
The lead 20 may not be extended from the edge portion of 0, and the bonding portion for wire bonding may be formed on the edge portion of the insulating film 40.

The method of manufacturing the wiring pattern film in this case is basically the same as the above-described two manufacturing methods.
That is, in order to provide the bonding portion at the edge of the insulating film 40, the first method is etching and processing the copper foil 44 so as to form the bonding portion at the edge of the insulating film 40, and the second method. Then, the gold plating layer 64 may be patterned in accordance with the bonding portion and similarly processed. Then, after the wiring pattern film is adhered to the semiconductor chip 10, the external connection terminal 14 and the electrode terminal 8 are electrically connected by wire bonding the bonding portion of the wiring pattern film and the electrode terminal 8 of the semiconductor chip 10. be able to.

The above-mentioned wiring pattern film is different from the conventional wiring pattern film in that the metal bumps 30 are formed in addition to the external connection terminals 14, but the manufacturing method of the wiring pattern film itself has only the external connection terminals 14. The basic steps are not different from the method of manufacturing the formed wiring pattern film, and the metal bumps 30 can be formed in the same steps as the steps of forming the external connection terminals 14. Therefore, there is also an advantage that the manufacturing process for forming the external connection terminal 14 can be applied without any particular change.

In each of the above-described embodiments, an example in which the external connection terminals 14 are arranged on the periphery of the mounting surface as shown in FIG. 9 has been described, but the metal bumps 3 are formed on the mounting surface of the semiconductor device.
The method of setting 0 to improve the heat dissipation of the semiconductor device is not particularly limited to the arrangement of the external connection terminals 14. For example, as shown in FIG. 8, there is a product in which external connection terminals 14 are installed along two opposing sides in a semiconductor device formed to have substantially the same size as the semiconductor chip 10. By installing the metal bumps 30 in the empty space on the mounting surface (between the two opposite sides),
The heat dissipation of the semiconductor device can be effectively improved.

[0037]

As described above, the semiconductor device according to the present invention is provided with metal bumps for improving heat dissipation in addition to the external connection terminals. The semiconductor device can be provided as a semiconductor device having excellent heat dissipation, and the reliability of the semiconductor device is improved, and a semiconductor chip with a large heat generation amount can be mounted.

[Brief description of drawings]

FIG. 1 is a plan view of a mounting surface side of a semiconductor device according to the present invention.

FIG. 2 is a sectional view showing a state in which a semiconductor device according to the present invention is mounted.

FIG. 3 is a graph showing measurement results of heat dissipation when a semiconductor device is mounted on a mounting board having a ground layer.

FIG. 4 is an explanatory diagram showing a method for manufacturing a wiring pattern film used for manufacturing a semiconductor device.

FIG. 5 is an explanatory diagram showing a method of manufacturing a semiconductor device using a wiring pattern film.

FIG. 6 is an explanatory view showing another method for manufacturing a wiring pattern film used for manufacturing a semiconductor device.

FIG. 7 is a cross-sectional view of a semiconductor device formed using a wiring pattern film.

FIG. 8 is an explanatory diagram showing another arrangement example of metal bumps in a semiconductor device.

FIG. 9 is a plan view of a conventional semiconductor device viewed from the mounting surface side.

FIG. 10 is a cross-sectional view showing a method of supporting external connection terminals and the like in a conventional semiconductor device.

FIG. 11 is a cross-sectional view showing a main part of a semiconductor device in which an external connection terminal and an electrode terminal are connected by a wire bonding method.

[Explanation of symbols]

 10 semiconductor chip 12 ring 14 external connection terminal 15 adhesive layer 16 wiring pattern film 17 insulating film 18 wiring pattern 19 solder resist 20 lead 26 mounting board 27 ground layer 28 connection pad 29 inner layer connection via 30 metal bump 32 conductor layer 40 insulation Film 42 Window 44 Copper foil 45 Resist 46 Solder resist 48 Bonding hole 50 Gold plating layer 52 Bonding tool 60 Single-sided copper-clad film 62 Conductor layer

Claims (7)

[Claims] 1. A wiring pattern, one end of which is connected to an external connection terminal and the other end of which is electrically connected to the electrode terminal, is supported by an insulating film in an inner region of a surface of a semiconductor chip on which an electrode terminal is formed. In a semiconductor device in which a wiring pattern film formed by exposing the electrode terminals is adhered, and the wiring pattern and the electrode terminals are electrically connected, the external connection terminals of the wiring pattern film are provided. A semiconductor device, wherein a conductor layer supported by the insulating film is provided in an inner region of the formed region, and a metal bump is provided so as to be connected to the conductor layer. 2. The semiconductor device according to claim 1, wherein the conductor layer is formed over the entire surface of the region where the metal bump is formed. 3. The semiconductor device according to claim 1, wherein in the wiring pattern film, the outer surfaces of the wiring pattern and the conductor layer except the external connection terminals and the metal bumps are covered with an insulating layer. 4. The external connection terminal and the metal bump are
4. The semiconductor device according to claim 3, wherein the semiconductor ball is a solder ball formed in a joint hole portion that extends to the wiring pattern and the conductor layer provided in the insulating layer. 5. The wiring pattern film is adhered to a semiconductor chip with an insulating film as an outer surface, and a plating metal is raised in a connection hole extending to the wiring pattern and the conductor layer provided in the insulating film, and the external wiring is formed. The semiconductor device according to claim 1, wherein the connection terminal and the metal bump are formed. 6. A lead formed by extending a wiring pattern of the wiring pattern film from an edge portion of an insulating film and an electrode terminal of a semiconductor chip are directly bonded and joined. 1, 2, 3, 4
Or the semiconductor device according to 5. 7. The semiconductor device according to claim 1, wherein the wiring pattern formed on the wiring pattern film and the electrode terminal of the semiconductor chip are connected by wire bonding. .