JPH05129594A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To prevent generation of a crystal defect and to improve the yield by forming by the steps of first heat treating parts to become source and drain regions by ion implanting an impurity, forming a bit line and second heat treating it. CONSTITUTION:An SiO2 film is deposited on a silicon substrate 1 and a gate electrode 3, and a sidewall 4 made of SiO2 is formed on the electrode 3. A first heat treatment is conducted so as to ion implant an impurity in source and drain regions on the electrode 3 and the substrate 1 through a polysilicon 6 and to diffuse the impurity. Further, a WSi film 9 is formed on the polysilicon 6 to form a bit line 10. Then, a second heat treatment is conducted to oxidize tungsten. Thus, a crystal defect such as a stacking fault defect, etc., can be prevented, and the line 10 of a low resistance can be simultaneously formed.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device, and more particularly to a method for manufacturing a MOS type semiconductor device having an LDD (Lightly Doped Drain) structure.

[0002]

2. Description of the Related Art A conventional method of manufacturing a MOS type memory cell having an LDD structure will be described with reference to the drawings. First, as shown in FIG. 2A, a P-type silicon substrate (21)
After securing an element formation region by forming an element isolation region composed of an active region and a field oxide film on the element formation region, a 3500 to 4000 Å layer is formed on the element formation region where the SiO ₂ film (22) is formed as a gate oxide film. A gate electrode (23) made of polysilicon having a thickness is formed, and CVD is performed.
A SiO ₂ film is deposited to a thickness of 2500 to 3500Å by a method, and a sidewall (24) made of SiO ₂ is formed on the gate electrode (23) by a reactive ion etching (RIE) method and an HF wet etching method. About 100-400Å S on the silicon substrate (21)
An iO ₂ film (26) is formed.

Then, using the gate electrode (23) as a mask, the SiO ₂ film (2
N-type impurity ions (25) such as As are implanted through 6). Then, in order to diffuse the impurities in the source / drain regions, for example, a first heat treatment is performed at a temperature of 800 ° C. for 1 hour.

Thereafter, as shown in FIG. 2B, an NSG film (27) is deposited on the SiO ₂ film (26) in order to suppress the outward diffusion of the source / drain regions, and the NS film is deposited on the NSG film (27).
BPSG to reduce the step difference between layers on the G film (27)
A film (28) is deposited and a second heat treatment is performed, for example, at 950 ° C. for 30 minutes to form the source / drain regions.

[0005]

The existence of crystal defects in the source / drain regions is one of the causes of variations in various characteristics of the fine MOS transistor. However, in the method of manufacturing a semiconductor device described above, Ion implantation is S
Since occurs through iO ₂ film (26), when implanted ions pass through the SiO ₂ film (26), a silicon substrate (21 with the oxygen atom of the SiO ₂ film (26) in the recoil has been implanted ions ) Will be driven into. Then, there is a problem that oxygen implanted into the silicon substrate (21) causes crystal defects (29) in the silicon substrate (21).

Further, there is a problem that the crystal defects (29) do not disappear even in the subsequent heat treatment, which causes an electric leak of the semiconductor device and a decrease in yield. The present invention has been made in view of such a problem, and an object thereof is to provide a method for manufacturing a semiconductor device having a high yield without causing crystal defects.

[0007]

In order to solve the above-mentioned problems, according to the present invention, sidewalls are formed on the side walls of the gate electrode and the NSG film, and the gate electrode is provided via the gate oxide film. A layer of polysilicon on a semiconductor substrate that has been formed, a step of performing a first heat treatment by ion-implanting impurities into the source / drain regions through the polysilicon, and a layer of silicide on the polysilicon. The method is characterized by including the step of forming the bit line and then performing the second heat treatment.

In the present invention, a semiconductor substrate (for example,
A gate oxide film (eg, SiO 2) is previously formed on the silicon substrate.
_The gate electrode is formed by forming the sidewall through the _two films). And this semiconductor substrate has CV
Polysilicon having a thickness of about 200 to 500 Å is laminated by a known method such as the D method, and impurities A are contained in the source / drain regions of the semiconductor substrate through the polysilicon.
Ion implantation of s, P, etc. is performed by a known method. When the N ⁺ impurity is ion-implanted through polysilicon, it is preferable to implant the ions capable of forming a shallow junction. For example, in the case of As ion, 60 to 100K
It is preferable to perform ion implantation at eV and 2 × 10 ¹⁵ to 1 × 10 ¹⁶ ions / cm ² .

Then, in the present invention, this impurity is added to the source / source.
A first heat treatment is performed to diffuse into the drain region. This first heat treatment can be achieved by performing the first heat treatment in the temperature range of about 750 to 850 ° C. for about 30 to 60 minutes. Then, a silicide is stacked on the polysilicon to form a bit line. The silicide laminated on the polysilicon can be deposited by a known method such as a sputtering method, and MoS can be used as the silicide.
Although i ₂ , WSi ₂ , TiSi _{2 and the} like can be used, it is preferable to stack WSi in the range of 300 to 600 Å. Then, after that, a second heat treatment is performed. By performing the second heat treatment at about 900 to 950 ° C. for 10 to 30 minutes, a defect-free impurity diffusion region can be formed.

[0010]

According to the above-described method, crystal defects such as insertion type stacking faults that occur in the semiconductor substrate when impurities are ion-implanted into the source / drain regions are suppressed by ion-implanting via polysilicon. At the same time, after forming a bit line by stacking silicide on the polysilicon, a second heat treatment is performed to eject Si atoms from the polysilicon and the semiconductor substrate and force vacancies in the semiconductor substrate. Will be introduced in. Then, the vacancy eliminates the defect generated in the semiconductor substrate and an impurity-diffused region having no defect is formed.

By implanting ions through polysilicon, the impurity diffusion region is formed shallow, and the resistance of the polysilicon / silicide film interface is reduced, so that a low resistance bit line is simultaneously formed. It will be.

[0012]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of a method for manufacturing a semiconductor device according to the present invention will be described with reference to the drawings. First, silicon substrate (1)
An element formation region is secured by forming an element isolation region composed of an active region and a field oxide film thereon, and a SiO ₂ film (2) is laminated as a gate oxide film. Then, 3500 to 4000 Å Forming a gate electrode (3) of polysilicon having a thickness of. Then, an NSG film (4) of about 1500 Å is formed on the gate electrode (3). Then, an SiO ₂ film is formed on the silicon substrate (1) and the gate electrode (3) by a CVD method in a range of 2500 to 2500.
Deposited to a thickness of 3500Å and Si on the gate electrode (3)
The side wall (4) made of O ₂ is formed by the reactive ion etching (RIE) method and the HF wet etching method. At this time, the SiO ₂ film laminated on the silicon substrate (1) is entirely removed by etching to expose the silicon substrate (1) (FIG. 1A).

Next, the gate electrode (3) and the silicon base
On the plate (1), for example, about 300 Å polysilicon is C
The layers are laminated by the VD method, and the
As ions as impurities in the source / drain region (8)
(7) is 80 KeV, 5 × 10 ¹⁵ions / cm²Note in
To diffuse the impurities in the source / drain region (8)
Therefore, for example, the first heat treatment for 1 hour at a temperature of 800 ° C.
(Fig. 1 (b)). And moreover, this police
WSi film (9) is laminated on controller (6) to about 500Å
Bit line by a known photo-etching process.
(10) is formed. Then, at 950 ° C for about 30 minutes
The second heat treatment is then performed to oxidize tungsten.

In the semiconductor device manufactured as described above, crystal defects such as insertion type stacking faults occurring in the semiconductor substrate (1) can be eliminated, and the polysilicon (6) /
The resistance of the interface of the WSi film (9) can be reduced to form the low resistance bit line (10) at the same time.

[0015]

According to the method of manufacturing a semiconductor device of the present invention, crystal defects such as insertion type stacking faults that occur in a semiconductor substrate when impurities are ion-implanted into the source / drain regions are mediated by polysilicon. By performing ion implantation, the silicide can be suppressed on the polysilicon, and a bit line is formed by stacking silicide on the polysilicon, and then a second heat treatment is performed to cause Si atoms to fly out from the polysilicon and the semiconductor substrate. The voids are forcibly introduced into the semiconductor substrate. As a result, the defects caused by the holes in the semiconductor substrate can be eliminated, and a defect-free impurity diffusion region can be formed.

Further, by implanting ions through polysilicon, the impurity diffusion region can be formed shallowly, and the resistance of the polysilicon / silicide film interface is lowered to simultaneously form a low resistance bit line. can do. Therefore, by forming a defect-free impurity diffusion region, it is possible to reduce the leak current, and it is possible to form a low resistance bit line at the same time as making the impurity diffusion layer defect-free, thus improving the yield. It becomes possible.

[Brief description of drawings]

FIG. 1 is a manufacturing process explanatory view showing an embodiment of a semiconductor device manufacturing method according to the present invention.

FIG. 2 is a schematic cross-sectional view showing a conventional method for manufacturing a semiconductor device.

[Explanation of symbols]

1 Silicon substrate (semiconductor substrate) 2 SiO ₂ film (gate oxide film) 3 Gate electrode 4 NSG film 5 Sidewall 6 Polysilicon 7 Impurity ion 8 Source / drain region 9 WSi film (silicide film) 10 Bit line

Claims (1)

[Claims] 1. A portion which becomes a source / drain region after polysilicon is laminated on a semiconductor substrate in which a sidewall is formed on a gate electrode and an NSG film, and the gate electrode is provided through a gate oxide film. And a step of performing a first heat treatment by ion-implanting impurities through the polysilicon, a step of stacking silicide on the polysilicon to form a bit line, and a step of performing a second heat treatment thereafter. A method of manufacturing a semiconductor device, comprising: