JP2818060B2 - Method for manufacturing semiconductor device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device, and more particularly to a method for manufacturing a MOS type semiconductor device having an LDD (Lightly Doped Drain) structure.

[0002]

2. Description of the Related Art A conventional method for manufacturing a MOS memory cell having an LDD structure will be described with reference to the drawings. First, as shown in FIG. 2A, a P-type silicon substrate (21)
An element formation region including an active region and a field oxide film is formed thereon to secure an element formation region. Then, the surface of the device formation region where the SiO ₂ film (22) is formed as a gate oxide film has a thickness of 3500 to 4000 °. A gate electrode (23) made of polysilicon having a thickness is formed, and CVD is performed.
A SiO ₂ film is deposited to a thickness of 2500-3500 ° by a method, and a sidewall (24) made of SiO ₂ is formed on the gate electrode (23) by a reactive ion etching (RIE) method and an HF wet etching method. About 100-400 ° S on a silicon substrate (21)
An iO ₂ film (26) is formed.

Then, using a gate electrode (23) as a mask, a SiO ₂ film (2
An N-type impurity ion (25) such as As is implanted through 6). Then, in order to diffuse the impurities in the source / drain regions, for example, a first heat treatment is performed at a temperature of 800 ° C. for one hour.

[0004] Thereafter, as shown in FIG. 2 (b), an NSG film (27) is deposited on the SiO ₂ film (26) to suppress out-diffusion of the source / drain regions.
BPSG to reduce the interlayer step on the G film (27)
A film (28) is deposited and subjected to a second heat treatment at, for example, 950 ° C. for 30 minutes to form source / drain regions.

[0005]

One of the causes of variations in the characteristics of the fine MOS transistor is the presence of crystal defects in the source / drain regions. However, in the above method of manufacturing a semiconductor device, Ion implantation is S
Since occurs through iO ₂ film (26), when implanted ions pass through the SiO ₂ film (26), a silicon substrate (21 with the oxygen atom of the SiO ₂ film (26) in the recoil has been implanted ions ). Then, there is a problem that oxygen implanted into the silicon substrate (21) generates a crystal defect (29) in the silicon substrate (21).

Further, the crystal defect (29) does not disappear even in the subsequent heat treatment, causing an electric leak of the semiconductor device and a reduction in yield. The present invention has been made in view of such a problem, and an object of the present invention is to provide a method for manufacturing a semiconductor device with high yield without generating crystal defects.

[0007]

According to the present invention, in order to solve the above-mentioned problems, a sidewall is formed on a side wall of a gate electrode and an NSG film, and the gate electrode is provided via a gate oxide film. Laminating polysilicon on a semiconductor substrate, and then performing a first heat treatment by ion-implanting impurities through the polysilicon into portions to be source / drain regions, laminating silicide on the polysilicon. And forming a bit line, and then performing a second heat treatment.

In the present invention, a semiconductor substrate (for example,
A gate oxide film (eg, SiO 2) is previously formed on a silicon substrate.
₂ ), a sidewall is formed and a gate electrode is formed. The semiconductor substrate has CV
Polysilicon having a thickness of about 200 to 500 ° is laminated by a known method such as the D method.
Ions such as s and P are implanted by a known method. In addition, when ion-implanting an N ⁺ impurity through polysilicon, it is preferable to implant ions that can form a shallow junction. For example, in the case of As ion, 60 to 100K
It is preferable to perform ion implantation at eV of 2 × 10 ¹⁵ to 1 × 10 ¹⁶ ions / cm ² .

Then, in the present invention, this impurity is
A first heat treatment is performed to diffuse into the drain region. This first heat treatment can be achieved by performing the first heat treatment in a temperature range of about 750 to 850 ° C. for about 30 to 60 minutes. Then, a bit line is formed by stacking silicide on the polysilicon. The silicide to be stacked on the polysilicon can be deposited by a known method such as a sputtering method.
i ₂ , WSi ₂ , TiSi _2, etc. can be used, but it is preferable to stack WSi by 300 to 600 °. After that, a second heat treatment is performed. By performing the second heat treatment at about 900 to 950 ° C. for 10 to 30 minutes, a defect-free impurity diffusion region can be formed.

[0010]

According to the above-described method, crystal defects such as insertion-type stacking faults generated in a semiconductor substrate when impurities are ion-implanted into source / drain regions are suppressed by being ion-implanted through polysilicon. At the same time, after forming a bit line by laminating silicide on the polysilicon, a second heat treatment is performed, so that Si atoms fly out of the polysilicon and the semiconductor substrate, and holes are forcibly formed in the semiconductor substrate. Will be introduced. Then, the voids eliminate defects generated in the semiconductor substrate, and impurity-free impurity diffusion regions are formed.

Further, by performing ion implantation through the polysilicon, the impurity diffusion region is formed to be shallow, and the resistance at the polysilicon / silicide film interface is reduced, so that a low-resistance bit line is simultaneously formed. It will be.

[0012]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of a method for manufacturing a semiconductor device according to the present invention will be described with reference to the drawings. First, silicon substrate (1)
An element formation region consisting of an active region and a field oxide film is formed thereon to secure an element formation region, and an SiO ₂ film (2) is laminated as a gate oxide film. A gate electrode (3) made of polysilicon having a thickness of 3 nm is formed. Next, an NSG film (4) of about 1500 ° is formed on the gate electrode (3). Then, an SiO ₂ film is deposited on the silicon substrate (1) and the gate electrode (3) by the CVD method at 2500-
Deposited to a thickness of 3500 °, and the gate electrode (3) is
A sidewall (4) made of O ₂ is formed by a reactive ion etching (RIE) method and an HF wet etching method. At this time, the SiO ₂ film laminated on the silicon substrate (1) is entirely removed by etching to expose the silicon substrate (1) (FIG. 1A).

Next, a gate electrode (3) and a silicon-based
On the plate (1), for example, polysilicon of about 300 ° C.
The layers are laminated by the VD method, and the polysilicon is
As ions as impurities in the source / drain region (8)
(7) at 80 KeV, 5 × 10 ^Fifteenions / cm^TwoNote in
To diffuse impurities in the source / drain regions (8).
Therefore, for example, the first heat treatment for 1 hour at a temperature of 800 ° C.
(FIG. 1B). And furthermore, this polysilicon
A WSi film (9) is laminated on the capacitor (6) by about 500 °.
The bit line is formed by a known photo etching process.
Form (10). Then at 950 ° C for about 30 minutes
A second heat treatment is performed to oxidize tungsten.

In the semiconductor device manufactured as described above, insertion type crystal defects such as stacking faults generated in the semiconductor substrate (1) can be eliminated, and the polysilicon (6) /
By lowering the resistance at the interface of the WSi film (9), a bit line (10) having a low resistance can be simultaneously formed.

[0015]

According to the method of manufacturing a semiconductor device according to the present invention, a crystal defect such as an insertion type stacking fault generated in a semiconductor substrate when an impurity is ion-implanted into a source / drain region is formed through polysilicon. In addition, by performing ion implantation, the silicide is stacked on the polysilicon to form a bit line, and then the second heat treatment is performed, so that Si atoms are ejected from the polysilicon and the semiconductor substrate. Consequently, holes are forcibly introduced into the semiconductor substrate. This makes it possible to eliminate defects caused by the holes in the semiconductor substrate and to form a defect-free impurity diffusion region.

By performing ion implantation through polysilicon, the impurity diffusion region can be formed shallowly, and the resistance at the polysilicon / silicide film interface is reduced, so that low-resistance bit lines are simultaneously formed. can do. Therefore, by forming an impurity diffusion region having no defect, it is possible to reduce a leak current and to form a low-resistance bit line at the same time as a defect-free impurity diffusion layer, thereby improving the yield. It is possible to do.

[Brief description of the drawings]

FIG. 1 is an explanatory view of a manufacturing process showing an embodiment of a method of manufacturing a semiconductor device according to the present invention.

FIG. 2 is a schematic sectional view showing a conventional method for manufacturing a semiconductor device.

[Explanation of symbols]

Reference Signs List 1 silicon substrate (semiconductor substrate) 2 SiO ₂ film (gate oxide film) 3 gate electrode 4 NSG film 5 side wall 6 polysilicon 7 impurity ion 8 source / drain region 9 WSi film (silicide film) 10 bit line

──────────────────────────────────────────────────続 き Continuation of the front page (56) References JP-A-59-74668 (JP, A) JP-A-62-183179 (JP, A) JP-A-1-94667 (JP, A) JP-A-2- 5411 (JP, A) JP-A-2-10739 (JP, A) (58) Fields investigated (Int. Cl. ⁶ , DB name) H01L 29/78

Claims (1)

(57) [Claims] 1. A portion which becomes a source / drain region after polysilicon is laminated on a semiconductor substrate in which a sidewall is formed on a gate electrode and an NSG film and the gate electrode is disposed via a gate oxide film. Performing a first heat treatment by ion-implanting impurities through the polysilicon, forming a bit line by stacking silicide on the polysilicon, and then performing a second heat treatment. A method for manufacturing a semiconductor device, comprising: