JP3344162B2 - Method for manufacturing field effect semiconductor device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a field effect type semiconductor device having a source / drain electrode and a gate electrode.

[0002]

2. Description of the Related Art In a conventional method of manufacturing a field effect type semiconductor device, after forming a gate electrode, a source / drain diffusion layer, and the like, an interlayer insulating film is formed, and a contact hole reaching the source / drain diffusion layer is formed by interlayer insulating. A source / drain electrode is formed in a film or the like and is in contact with the source / drain diffusion layer through the contact hole.

[0003]

However, when a contact hole for a source / drain electrode is formed, not only the area of the contact hole itself but also a margin for matching the contact hole with a gate electrode or the like is increased. Must be included. Therefore, it is necessary to increase the area of the source / drain diffusion layer by that much, and it is difficult to manufacture a fine field-effect semiconductor device by the above-mentioned conventional method.

On the other hand, if the area of the contact hole is reduced,
Although the area of the source / drain diffusion layers can be reduced, the contact resistance, which is a parasitic resistance, increases. For this reason, it has been difficult to manufacture a high-speed field-effect semiconductor device that is fine but operates at high speed by the above-described conventional method.

[0005]

According to a first aspect of the present invention, there is provided a method of manufacturing a field effect type semiconductor device, comprising: forming a gate electrode having a p-type impurity and having an insulating side wall on a semiconductor substrate; Forming a polycrystalline Si film containing no impurity on the gate electrode, the side wall, and the semiconductor substrate; and forming a portion of the polycrystalline Si film on the gate electrode from the gate electrode to the p-type impurity. Diffusing, and injecting protons into the polycrystalline Si film to form a portion of the polycrystalline Si film where the p-type impurity is diffused into a porous Si film; Si oxide film
Forming a film, removing the Si oxide film, and forming a portion of the polycrystalline Si film, in which the p-type impurity is diffused, into the porous Si film. Forming a source / drain electrode and a source / drain diffusion layer by introducing an impurity into the semiconductor substrate.

According to a second aspect of the present invention, in the method for manufacturing a field effect type semiconductor device according to the first aspect, the impurity for forming the source / drain diffusion layers is a p-type impurity. It is characterized by having.

According to a third aspect of the present invention, in the method for manufacturing a field effect type semiconductor device according to the first aspect, the impurity for forming the source / drain diffusion layers is an n-type impurity. It is characterized by having.

[0008]

In the method of manufacturing a field-effect semiconductor device according to the present invention, a portion of a polycrystalline Si film in which a p-type impurity is diffused from a gate electrode is formed into a porous Si film, and then removed after forming a Si oxide film. Therefore, the source electrode and the drain electrode can be separated from each other in a self-aligned manner on the gate electrode. Also, since the side wall can be formed in a self-aligned manner with respect to the gate electrode, the source / drain electrode and the gate electrode can be separated from each other in a self-aligned manner by the side wall.

Further, since the source / drain electrode and the source / drain diffusion layer are formed by introducing impurities into the polycrystalline Si film and the semiconductor substrate, the source / drain electrode is self-aligned over the entire surface of the source / drain diffusion layer. Make contact. For this reason, the contact resistance of the source / drain electrode, which is a parasitic resistance, can be reduced while reducing the area of the source / drain diffusion layer by making the area of the contact hole for the source / drain electrode unnecessary.

Further, since the source / drain electrodes and the source / drain diffusion layers are formed by introducing impurities into the polycrystalline Si film and the semiconductor substrate, the depth is shallower than when impurities are directly introduced into the semiconductor substrate. Source / drain diffusion layers can be formed.

[0011]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention applied to the manufacture of a pMOS transistor having an LDD structure and a p ⁺ type gate electrode will be described below with reference to FIGS.

In this embodiment, as shown in FIG.
The surface of the element isolation region of the i-substrate 11 is coated with Si by LOCOS method.
After forming an O ₂ film (not shown), 850 ° C., H ₂ / O
An SiO ₂ film 12 having a thickness of 8 nm as a gate oxide film is formed on the surface of the element active region by pyrogenic oxidation of ₂ = 1.0. And 900 in N ₂ atmosphere
The film quality of the SiO ₂ film 12 is improved by annealing at 10 ° C. for 10 minutes.

Thereafter, a polycrystalline Si film 13 having a thickness of 80 nm and containing no impurities is deposited, and the polycrystalline Si film 13 is accelerated with an acceleration energy of 10 keV and a dose of 5 × 10 ¹⁵ cm ^−2.
B ⁺ 14 is ion-implanted into the film 13 to form a polycrystalline Si film 13.
Into p ⁺ type. The acceleration energy in the ion implantation at this time is a condition under which B ⁺ 14 does not penetrate the SiO ₂ film 12, and the dose is a condition under which the polycrystalline Si film 13 is degenerated.

Next, as shown in FIG.
The resist 15 is processed into a gate electrode pattern on the film 13, and the polycrystalline Si film 13 is formed using the resist 15 as a mask.
Is anisotropically etched. Then, using the resist 15 as a mask, an acceleration energy of 20 keV and 2.0 × 1
BF ₂ ⁺ 16 is ion-implanted into the Si substrate 11 at a dose of 0 ¹³ cm ⁻² to form a p ⁻ type diffusion layer 17 for the LDD structure.

Thereafter, the resist 15 is ashed and peeled off, and H ₂ SO ₄ + H ₂ O is used to remove metal ions.
₂₎ Wash with the solution for 10 minutes. In order to further remove various particles such as dust and organic matter, NH ₄ OH
Washing is performed for 10 minutes each with a + H ₂ O ₂ solution and a HCl + H ₂ O ₂ solution.

Next, as shown in FIG.
100-120 n of insulating film such as SiO ₂ film 21
Then, the entire surface of the SiO ₂ film 21 is anisotropically etched back to form sidewalls made of the SiO ₂ film 21 on the side surfaces of the polycrystalline Si film 13 or the like.

Next, as shown in FIG.
A polycrystalline Si film 22 containing no impurity in nm is deposited. Then, annealing is performed at 900 ° C. for one hour in an N ₂ atmosphere, so that boron in the polycrystalline Si film 13 is diffused into the polycrystalline Si film 22. Only the upper portion and a portion slightly closer to the SiO ₂ film 21 from this portion are made self-aligned and selectively p ⁺ -type.

Next, as shown in FIG.
The protons 23 are implanted into the entire surface of the film 22. Since the protons 23 have a function of converting a p-type polycrystalline Si film into a porous Si film, the polycrystalline Si film 13 in the polycrystalline Si film 22 is used. Only the upper portion and the portion slightly closer to the SiO ₂ film 21 from this portion are changed to the porous Si film 24.

After that, oxidation is performed, and porous Si has an oxidation rate 10 to 20 times as high as that of single crystal Si, and is higher than that of polycrystalline Si. Therefore, by adjusting the oxidation time, the polycrystalline Si film 22 is not substantially oxidized, and only the porous Si film 24 becomes the SiO ₂ film 25.

Next, as shown in FIG. 2B, the SiO ₂ film 25 is removed with dilute hydrofluoric acid to separate the polycrystalline Si films 22 on both sides of the polycrystalline Si film 13. The SiO ₂ film 2
1, the polycrystalline Si film 22 is also separated from the polycrystalline Si film 13 in a self-aligned manner.

Next, as shown in FIG.
Source / drain with a polycrystalline Si film 22 and the Si substrate 11 at a dose of acceleration energy and 4 × 10 ¹⁵ cm ^-2 by ion implantation of BF ₂ ⁺ 26, the polycrystalline Si film 22 in the p ⁺ -type The p ⁺ -type diffusion layer 27 serving as the diffusion layer is made of S
It is formed on the i-substrate 11. Thereafter, the polycrystalline Si film 22 is processed into a pattern of source / drain electrodes, and the pMOS transistor is completed through conventionally known steps.

In the above embodiment, the polycrystalline Si film 1
B ⁺ 14 is ion-implanted in order to make 3 into p ⁺ -type, BF ₂ ⁺ 16 is ion-implanted with resist 15 remaining to form diffusion layer 17, and a large amount of SiO ₂ film 21 is formed by low-pressure CVD. The side wall of the crystalline Si film 13 is formed.

[0023] However, polycrystalline Si film 13 BF ₂ ⁺ ion implantation to the p ⁺ -type, the BF ₂ ⁺ 16 after removing the resist 15 by ion implantation to form a diffusion layer 17, a reduced pressure The sidewall of the polycrystalline Si film 13 may be formed of an insulating film other than the SiO ₂ film 21 by the CVD method.

In the above embodiment, the present invention is applied to the manufacture of a pMOS transistor.
F ₂ ⁺ 16 of As ⁺ with a dose of an acceleration energy and 1.0 × 10 ¹⁴ cm ^-2 of 25keV instead of by ion implantation n ^- -type diffusion layer, 20 keV instead of BF ₂ ⁺ 26 As ⁺ ions are implanted at an acceleration energy of 3 × 10 ¹⁵ cm ^{−2 and} the polycrystalline Si film 22 is made n ⁺ type and an n ⁺ type diffusion layer is formed.
An OS transistor can also be formed. Furthermore, MO
The present invention can be applied to the manufacture of a field effect semiconductor device other than the S transistor.

[0025]

According to the method of manufacturing a field-effect semiconductor device according to the present invention, a source electrode and a drain electrode and a source / drain electrode are formed.
Since the drain electrode and the gate electrode can be separated from each other in a self-aligned manner, and the area of the source / drain diffusion layer can be reduced, a fine field-effect semiconductor device can be manufactured.

Further, since a shallow source / drain diffusion layer can be formed, it is possible to manufacture a field effect type semiconductor device which is fine but has a suppressed short channel effect. Further, since the contact resistance of the source / drain electrodes, which is the parasitic resistance, can be reduced, it is possible to manufacture a field-effect semiconductor device that is fine but operates at high speed.

[Brief description of the drawings]

FIG. 1 is a side sectional view showing the first half of an embodiment of the present invention for manufacturing a pMOS transistor in the order of steps.

FIG. 2 is a side sectional view showing the latter half of one embodiment in the order of steps.

[Explanation of symbols]

11 Si substrate 13 polycrystalline Si film 14 B ⁺ 21 SiO ₂ film 22 a polycrystalline Si film 23 protons 24 porous Si layer 25 SiO ₂ layer 26 BF ₂ ⁺ 27 diffusion layer

Claims (3)

(57) [Claims] A step of forming a gate electrode containing a p-type impurity and having an insulating side wall on a semiconductor substrate; and forming a polycrystalline Si film containing no impurity on the gate electrode, the side wall, and the semiconductor. Forming on a substrate; diffusing the p-type impurity from the gate electrode into a portion of the polycrystalline Si film on the gate electrode; injecting protons into the polycrystalline Si film; A portion of the polycrystalline Si film where the p-type impurity is diffused is made of porous S
an i-film; a step of converting the porous Si film into an Si oxide film; a step of removing the Si oxide film; and a step of diffusing the p-type impurity in the polycrystalline Si film. After forming the porous Si film, the polycrystalline Si
Forming a source / drain electrode and a source / drain diffusion layer by introducing impurities into a film and the semiconductor substrate. 2. The method according to claim 1, wherein the impurity for forming the source / drain diffusion layers is a p-type impurity. 3. The method according to claim 1, wherein the impurity for forming the source / drain diffusion layer is an n-type impurity.