JPH0480531B2 - - Google Patents

Info

Publication number
JPH0480531B2
JPH0480531B2 JP58005876A JP587683A JPH0480531B2 JP H0480531 B2 JPH0480531 B2 JP H0480531B2 JP 58005876 A JP58005876 A JP 58005876A JP 587683 A JP587683 A JP 587683A JP H0480531 B2 JPH0480531 B2 JP H0480531B2
Authority
JP
Japan
Prior art keywords
substrate
resist
resist film
temperature
cooling
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP58005876A
Other languages
English (en)
Japanese (ja)
Other versions
JPS59132127A (ja
Inventor
Yoshihide Kato
Kinya Usuda
Kei Kirita
Toshiaki Shinozaki
Nobuji Tsucha
Fumiaki Shigemitsu
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Shibaura Electric Co Ltd filed Critical Tokyo Shibaura Electric Co Ltd
Priority to JP587683A priority Critical patent/JPS59132127A/ja
Priority to KR1019840000153A priority patent/KR860002082B1/ko
Priority to DE8484300297T priority patent/DE3478060D1/de
Priority to EP88102726A priority patent/EP0275126B1/en
Priority to EP84300297A priority patent/EP0114126B1/en
Priority to DE88102726T priority patent/DE3486187T2/de
Publication of JPS59132127A publication Critical patent/JPS59132127A/ja
Priority to US06/789,366 priority patent/US4717645A/en
Priority to US07/108,767 priority patent/US4897337A/en
Priority to US07/441,479 priority patent/US5051338A/en
Publication of JPH0480531B2 publication Critical patent/JPH0480531B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Photosensitive Polymer And Photoresist Processing (AREA)
  • Electron Beam Exposure (AREA)
  • Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
JP587683A 1983-01-19 1983-01-19 レジストパタ−ンの形成方法及び装置 Granted JPS59132127A (ja)

Priority Applications (9)

Application Number Priority Date Filing Date Title
JP587683A JPS59132127A (ja) 1983-01-19 1983-01-19 レジストパタ−ンの形成方法及び装置
KR1019840000153A KR860002082B1 (ko) 1983-01-19 1984-01-16 레지스트 패턴의 형성 방법 및 장치
DE88102726T DE3486187T2 (de) 1983-01-19 1984-01-18 Verfahren und Vorrichtung zur Herstellung von Schutzlackbildern.
EP88102726A EP0275126B1 (en) 1983-01-19 1984-01-18 Method and apparatus for forming resist pattern
EP84300297A EP0114126B1 (en) 1983-01-19 1984-01-18 Method for forming resist pattern
DE8484300297T DE3478060D1 (en) 1983-01-19 1984-01-18 Method for forming resist pattern
US06/789,366 US4717645A (en) 1983-01-19 1985-10-22 Method and apparatus for forming resist pattern
US07/108,767 US4897337A (en) 1983-01-19 1987-10-15 Method and apparatus for forming resist pattern
US07/441,479 US5051338A (en) 1983-01-19 1989-11-27 Method and apparatus for forming resist pattern

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP587683A JPS59132127A (ja) 1983-01-19 1983-01-19 レジストパタ−ンの形成方法及び装置

Publications (2)

Publication Number Publication Date
JPS59132127A JPS59132127A (ja) 1984-07-30
JPH0480531B2 true JPH0480531B2 (en, 2012) 1992-12-18

Family

ID=11623112

Family Applications (1)

Application Number Title Priority Date Filing Date
JP587683A Granted JPS59132127A (ja) 1983-01-19 1983-01-19 レジストパタ−ンの形成方法及び装置

Country Status (1)

Country Link
JP (1) JPS59132127A (en, 2012)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61156814A (ja) * 1984-12-28 1986-07-16 Toshiba Corp レジストベ−キング方法およびレジストベ−キング装置
JPS6381820A (ja) * 1986-09-25 1988-04-12 Toshiba Corp レジストパタ−ン形成方法
JPH0250165A (ja) * 1988-05-09 1990-02-20 Mitsubishi Electric Corp パターン形成方法
JPH0250163A (ja) * 1988-05-09 1990-02-20 Mitsubishi Electric Corp パターン形成方法

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS50113347U (en, 2012) * 1974-02-27 1975-09-16
JPS5398782A (en) * 1976-12-29 1978-08-29 Fujitsu Ltd Positioning method for exposure unit
JPS54150079A (en) * 1978-05-18 1979-11-24 Cho Lsi Gijutsu Kenkyu Kumiai Method of forming pattern
JPS57149731A (en) * 1981-03-11 1982-09-16 Seiko Epson Corp Exposing device

Also Published As

Publication number Publication date
JPS59132127A (ja) 1984-07-30

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