JPH0480531B2 - - Google Patents

Info

Publication number
JPH0480531B2
JPH0480531B2 JP58005876A JP587683A JPH0480531B2 JP H0480531 B2 JPH0480531 B2 JP H0480531B2 JP 58005876 A JP58005876 A JP 58005876A JP 587683 A JP587683 A JP 587683A JP H0480531 B2 JPH0480531 B2 JP H0480531B2
Authority
JP
Japan
Prior art keywords
substrate
resist
resist film
temperature
cooling
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP58005876A
Other languages
Japanese (ja)
Other versions
JPS59132127A (en
Inventor
Yoshihide Kato
Kinya Usuda
Kei Kirita
Toshiaki Shinozaki
Nobuji Tsucha
Fumiaki Shigemitsu
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Shibaura Electric Co Ltd filed Critical Tokyo Shibaura Electric Co Ltd
Priority to JP587683A priority Critical patent/JPS59132127A/en
Priority to KR1019840000153A priority patent/KR860002082B1/en
Priority to EP84300297A priority patent/EP0114126B1/en
Priority to DE88102726T priority patent/DE3486187T2/en
Priority to EP88102726A priority patent/EP0275126B1/en
Priority to DE8484300297T priority patent/DE3478060D1/en
Publication of JPS59132127A publication Critical patent/JPS59132127A/en
Priority to US06/789,366 priority patent/US4717645A/en
Priority to US07/108,767 priority patent/US4897337A/en
Priority to US07/441,479 priority patent/US5051338A/en
Publication of JPH0480531B2 publication Critical patent/JPH0480531B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26

Description

【発明の詳細な説明】 〔発明の属する技術分野〕 本発明は、パターン精度を向上させたレジスト
パターンの形成方法に関する。
DETAILED DESCRIPTION OF THE INVENTION [Technical field to which the invention pertains] The present invention relates to a method for forming a resist pattern with improved pattern accuracy.

〔従来技術及びその問題点〕 超LSIをはじめとして、半導体素子の集積密度
が大きくなるにつれて微細にしてかつ高精度なパ
ターン形成技術が要求されている。この為許容さ
れる寸法精度は非常に厳しいものとなり、6イン
チマスクあるいは5インチウエハではパターン寸
法の最大偏差値が0.1μm以下の寸法精度が要求さ
れて始めている。
[Prior art and its problems] As the integration density of semiconductor devices, including VLSIs, increases, finer and more accurate pattern forming techniques are required. For this reason, the permissible dimensional accuracy has become very strict, and dimensional accuracy of a maximum deviation of pattern dimensions of 0.1 μm or less is now required for 6-inch masks or 5-inch wafers.

第1図は従来技術によるレジストパターン形成
プロセスを示すブロツク図である。先づ被処理基
板上にスピン塗布法により所望の膜厚にレジスト
を塗布する。次に塗布溶媒を除去し、基板との密
着性を向上させるために基板をオーブン内に置い
てレジストの種類に応じた所定の温度(Tb)で
ベーキング(プリベーク)を行なう。この後、オ
ーブンから取り出されたレジスト膜付被処理基板
を清浄な大気中で自然放冷することにより、室温
程度迄20〜30分かけて冷却する。レジスト膜付被
処理基板に対して、レジストの種類に応じた所定
の照射量で所定波長域の電磁波、例えば紫外光あ
るいは所定エネルギーの粒子線、例えば電子線を
選択的に照射して露光する。その後現像・リンス
処理工程を経て所望のレジストパターンが形成さ
れる。
FIG. 1 is a block diagram showing a resist pattern forming process according to the prior art. First, a resist is applied to a desired thickness onto a substrate to be processed by spin coating. Next, the coating solvent is removed, and the substrate is placed in an oven and baked (prebaked) at a predetermined temperature (Tb) depending on the type of resist to improve adhesion to the substrate. Thereafter, the resist film-coated substrate taken out of the oven is allowed to cool naturally in clean air, and is cooled to about room temperature over 20 to 30 minutes. A resist film-coated substrate to be processed is exposed by selectively irradiating electromagnetic waves in a predetermined wavelength range, such as ultraviolet light, or particle beams with a predetermined energy, such as electron beams, at a predetermined dose depending on the type of resist. Thereafter, a desired resist pattern is formed through a development and rinsing process.

ところで発明者等が上述した自然放冷中の被処
理基板(レジスト膜)のある時点に於ける全面の
温度分布を赤外線放射温度計により調べた結果、
第2図に示す通りであつた。即ち、被処理基板1
の上方中央部(A点)では温度が高く冷え難く、
その下方及び周辺部(B点、C点)では温度が低
くなり、冷却されやすいことが判明した。
By the way, the inventors used an infrared radiation thermometer to investigate the temperature distribution over the entire surface of the substrate to be processed (resist film) at a certain point during the natural cooling mentioned above.
It was as shown in Figure 2. That is, the substrate to be processed 1
In the upper central part (point A), the temperature is high and it is difficult to cool down.
It was found that the temperature below and around the area (points B and C) is low and is easily cooled.

尚、図中の曲線は等温線である。第3図は更に
上記各点A,B,Cの時間経過に対する温度変化
の様子を示しており、曲線1,2,3は点A,
B,Cに対応する特性である。A点とB点の最大
温度差が15℃程度、A点とC点の最大温度差が30
℃程度であつた。このような温度分布が生じる理
由としては、自然放冷中被処理基板が支持台上に
立てられる為、熱放散による自然対流が基板面に
沿つて上方向に起こり易いこと及び基板底部が支
持台により熱を奪われ易いことが考えられる。
Note that the curves in the figure are isothermal lines. Figure 3 further shows the state of temperature change over time at each of the points A, B, and C, and curves 1, 2, and 3 represent points A, B, and C.
This is a characteristic corresponding to B and C. The maximum temperature difference between points A and B is about 15℃, and the maximum temperature difference between points A and C is about 30℃.
It was about ℃. The reason why such a temperature distribution occurs is that the substrate to be processed is placed on a support stand during natural cooling, so natural convection due to heat dissipation tends to occur upward along the substrate surface, and the bottom of the substrate is placed on the support stand. It is thought that heat is easily taken away by this.

更に発明者等が基板(レジスト膜)の温度分布
とパターン精度の関係について着目し、温度測定
点A,B,Cに於いて形成パターンの寸法を測定
した所、本来それぞれ同一寸法(2μm)である
べきパターンが各々B点に於いて0.1μm、C点に
於いて0.2μm程度の誤差が生じており、基板(レ
ジスト膜)の温度分布と形成されるパターンの寸
法分布が極めて対応することが確認され、第5図
に示すように基板(レジスト膜)の温度分布が均
一な状態で温度降下させると各点の冷却速度のば
らつきがなくなりパターン寸法にむらが少くなく
精度が向上することが見い出された。
Furthermore, the inventors focused on the relationship between the temperature distribution of the substrate (resist film) and pattern accuracy, and measured the dimensions of the formed pattern at temperature measurement points A, B, and C, and found that they were originally the same size (2 μm). The expected pattern has an error of about 0.1 μm at point B and 0.2 μm at point C, which shows that the temperature distribution of the substrate (resist film) and the size distribution of the pattern to be formed are extremely consistent. It was confirmed that, as shown in Figure 5, if the temperature is lowered while the temperature distribution of the substrate (resist film) is uniform, there will be no variation in the cooling rate at each point, and the pattern dimensions will be less uneven and accuracy will be improved. It was.

〔発明の目的〕[Purpose of the invention]

本発明の目的とするところは、電磁波もしくは
粒子線照射及び現像処理により形成されるレジス
トパターンの精度がすぐれたレジストパターンの
形成方法を提供するものである。
An object of the present invention is to provide a method for forming a resist pattern that is formed by electromagnetic wave or particle beam irradiation and development treatment and has excellent precision.

〔発明の概要〕[Summary of the invention]

本発明によるレジストパターン形成プロセスの
概要を第4図に示す。先づ被処理基板上にレジス
トを塗布した後、レジスト膜をベーキング(プリ
ベーク)する。ここ迄は従来の工程と同様であ
る。次に前記レジスト膜を冷却するのであるが、
これをレジスト膜全体として均一な冷却速度でそ
の温度を低下させることにより行なう。その後レ
ジスト膜に対して所定波長域の電磁波あるいは所
定エネルギーの粒子線を選択的に照射し、それを
現像・リンス処理することによりレジストパター
ンを形成するものである。
FIG. 4 shows an outline of the resist pattern forming process according to the present invention. First, a resist is applied onto a substrate to be processed, and then the resist film is baked (prebaked). The process up to this point is the same as the conventional process. Next, the resist film is cooled.
This is done by lowering the temperature of the entire resist film at a uniform cooling rate. Thereafter, the resist film is selectively irradiated with electromagnetic waves in a predetermined wavelength range or particle beams with a predetermined energy, and then developed and rinsed to form a resist pattern.

〔発明の効果〕〔Effect of the invention〕

本発明によれば、被処理基板上全体に亘り寸法
のばらつきが少くなりパターン精度が大幅に向上
する。
According to the present invention, dimensional variations are reduced over the entire substrate to be processed, and pattern accuracy is significantly improved.

〔発明の実施例〕[Embodiments of the invention]

以下、本発明の実施例について具体的に説明す
る。先づ、第4図に示された本発明によるレジス
トパターン形成プロセスに従つて、次の実験を行
なつた。
Examples of the present invention will be specifically described below. First, the following experiment was conducted according to the resist pattern forming process according to the present invention shown in FIG.

回転台に載置されたクロムを蒸着したガラス基
板上に、溶媒に溶かされたレジストとしてポリ
2,2,2−トリフルオロエチル−α−クロロア
クリレートを噴出ノズルより滴下して周知のスピ
ン塗布法により所定膜厚塗布した。その後、レジ
スト膜をオーブンにより200℃で30分間ベーキン
グ(プリベーク)した。プリベーク完了後、レジ
スト膜を前記基板と共に冷却液としての常温の純
水を入れた水槽中に一気に浸漬してガラス転移温
度(Tg)を通過して均一冷却した。この場合、
第5図に示すようにレジスト膜がプリベーク温度
から常温近く迄温度が低下する間に第3図のA,
B,Cの各点に相当する箇所の温度が曲線1,
2,3のように均一に低下した。
Poly 2,2,2-trifluoroethyl-α-chloroacrylate as a resist dissolved in a solvent is dripped from a jet nozzle onto a glass substrate on which chromium is vapor-deposited and placed on a rotary table using a well-known spin coating method. The film was coated to a predetermined thickness. Thereafter, the resist film was baked (prebaked) in an oven at 200° C. for 30 minutes. After the prebaking was completed, the resist film and the substrate were immersed all at once in a water tank containing pure water at room temperature as a cooling liquid to uniformly cool the resist film through the glass transition temperature (Tg). in this case,
As shown in FIG. 5, while the temperature of the resist film decreases from the pre-bake temperature to near room temperature, A in FIG.
The temperatures at points corresponding to points B and C are curve 1,
It decreased uniformly like 2 and 3.

次にレジスト膜付の基板を回転台に載置してス
ピン乾燥した。十分乾燥したレジスト膜に対し、
加速電圧20KVで電子線を選択的に照射し、更に
それをメチルイソブチルケトン:イソプロピルア
ルコール=7:3の現像液により25℃で10分間現
像処理し、続いてイソプロピルアルコールにより
25℃で30秒間リンス処理した。
Next, the substrate with the resist film was placed on a rotating table and spin-dried. For a sufficiently dried resist film,
It was selectively irradiated with an electron beam at an accelerating voltage of 20 KV, and then developed with a developer of methyl isobutyl ketone:isopropyl alcohol = 7:3 at 25°C for 10 minutes, and then with isopropyl alcohol.
Rinse treatment was performed at 25°C for 30 seconds.

その結果、基板上のレジストパターン寸法の最
大偏差値が0.1μm以下という高精度のパターンを
形成することができた。
As a result, it was possible to form a highly accurate pattern in which the maximum deviation value of resist pattern dimensions on the substrate was 0.1 μm or less.

レジストの種類としてポリメチルメタクリレー
トを用いた場合に於いても上記実施例と同様に
0.1μm以下の最大偏差値で高精度なパターンを形
成することができた。
Even when polymethyl methacrylate is used as the type of resist, the same procedure as in the above example is applied.
It was possible to form a highly accurate pattern with a maximum deviation value of 0.1 μm or less.

更にフオトレジストやX線レジストについても
従来プロセスに比しパターン精度が大幅に向上す
ることが確認された。ポジ型のみならずネガ型の
レジストについても本発明は適用され得る。
Furthermore, it was confirmed that the pattern accuracy of photoresists and X-ray resists was significantly improved compared to conventional processes. The present invention can be applied not only to positive type resists but also to negative type resists.

尚、本発明の主眼は、プリベーク後のレジスト
膜の冷却を膜全体として均一な冷却速度で温度低
下させることにあり、その冷却速度は任意に選択
できるし、その冷媒や冷却手段並びにその後の乾
燥方法等については、特に上述した実施例に限定
されるものではない。例えば冷媒としては、純水
以外にレジストに対して溶解もしくは反応を生じ
ない液体もしくは気体を用いることができる。そ
の場合、できる限り比熱の大きな材料を選択する
と効果的である。適合する冷媒として液体フロ
ン、低温の窒素ガス、フロンガス等がある。又、
レジストの種類やレジスト膜が被着される基板材
料、レジストの溶媒、現像液、プリベーク温度等
についても上述した実施例に限定されるものでは
なく、公知の種々な材料及び温度について高精度
が達成されることが確認された。レジストの露光
方法についても、上述した電子線、光線、X線以
外にイオンビーム等の所定エネルギーの粒子線や
所定波長域の電磁波を用いて同様な結果が得られ
る。
The main purpose of the present invention is to reduce the temperature of the resist film after prebaking at a uniform cooling rate for the entire film, and the cooling rate can be selected arbitrarily, and the cooling medium, cooling means, and subsequent drying The method and the like are not particularly limited to the above-mentioned embodiments. For example, as the coolant, other than pure water, a liquid or gas that does not dissolve or react with the resist can be used. In that case, it is effective to select a material with as large a specific heat as possible. Compatible refrigerants include liquid fluorocarbon, low-temperature nitrogen gas, and fluorocarbon gas. or,
The type of resist, substrate material to which the resist film is applied, resist solvent, developer, pre-bake temperature, etc. are not limited to the above-mentioned examples, and high accuracy can be achieved with various known materials and temperatures. It was confirmed that Regarding the resist exposure method, similar results can be obtained by using a particle beam of a predetermined energy such as an ion beam or an electromagnetic wave in a predetermined wavelength range, in addition to the above-mentioned electron beam, light beam, or X-ray.

次に本発明方法を実施するのに適合する装置の
一例について第6図を参照して説明する。第6図
の装置は、基板に対するレジスト塗布から露光前
迄の一連の工程を全自動で行うものである。
Next, an example of an apparatus suitable for carrying out the method of the present invention will be described with reference to FIG. The apparatus shown in FIG. 6 fully automatically performs a series of steps from applying resist to a substrate to before exposure.

先づレジストが塗布されるべき基板1が真空チ
ヤツク2によりスピン塗布用回転試料台3上に置
かれる。上方の噴出ノズル4から溶媒に溶解した
レジストが滴下され、基板が回転され基板1上に
レジスト膜が形成される。次に、基板1は真空チ
ヤツク2によつてベルトコンベア5上に載置され
プリベーク用オーブン6内に導入される。オーブ
ン6の室内にはプリベークの為のヒーター7が設
けられ、又ヒーター7の下方には基板1の搬送用
の低速ベルトコンベア8も設けられている。ベル
トコンベア5により搬送された基板1はオーブン
6内に入るとベルトコンベア8に移され、このベ
ルトコンベア8によりゆつくりとオーブン6内を
通過しヒーター7により所定時間、所定温度でプ
リベークされる。プリベークの終了した基板1は
ベルトコンベア9へ移されさらに搬送され冷却機
構10へ導入される。即ち、ベルトコンベア9に
より搬送されてきた基板1は上下・左右に移動可
能な搬送機構11に移され冷却槽12内の液体冷
媒である純水13に浸漬され、均一冷却される。
冷却された基板1は搬送機構11によりベルトコ
ンベア14に移され、スピン乾燥用回転試料台1
5上に載置される。試料台15の回転により乾燥
した基板1は、真空チヤツク16によりベルトコ
ンベア17に移され搬出される。こうして得られ
たレジスト膜付の基板1は所定の露光工程及び現
像・リンス処理工程を経てパターン形成される。
40及び41はレジストの温度を測定する為の熱
電対である。温度測定には赤外線放射温度計をも
ちいることもできる。
First, a substrate 1 to be coated with a resist is placed on a rotating sample stage 3 for spin coating by means of a vacuum chuck 2 . A resist dissolved in a solvent is dropped from the upper jet nozzle 4, and the substrate is rotated to form a resist film on the substrate 1. Next, the substrate 1 is placed on a belt conveyor 5 by a vacuum chuck 2 and introduced into a pre-bake oven 6. A heater 7 for pre-baking is provided inside the oven 6, and a low-speed belt conveyor 8 for conveying the substrate 1 is also provided below the heater 7. When the substrate 1 conveyed by the belt conveyor 5 enters the oven 6, it is transferred to the belt conveyor 8. The substrate 1 is slowly passed through the oven 6 by the belt conveyor 8, and is prebaked by the heater 7 at a predetermined temperature for a predetermined time. The prebaked substrate 1 is transferred to the belt conveyor 9, further conveyed, and introduced into the cooling mechanism 10. That is, the substrate 1 conveyed by the belt conveyor 9 is transferred to a conveyance mechanism 11 that can move vertically and horizontally, and is immersed in pure water 13, which is a liquid refrigerant, in a cooling tank 12, and is uniformly cooled.
The cooled substrate 1 is transferred to a belt conveyor 14 by a transport mechanism 11, and is transferred to a rotating sample stage 1 for spin drying.
5. The substrate 1 dried by the rotation of the sample stage 15 is transferred to a belt conveyor 17 by a vacuum chuck 16 and carried out. The substrate 1 with the resist film thus obtained is subjected to a predetermined exposure process and development/rinsing process to form a pattern.
Thermocouples 40 and 41 are used to measure the temperature of the resist. An infrared radiation thermometer can also be used to measure temperature.

尚、冷却機構10としては、第6図の浸漬式に
限定されることなく、例えばスプレー式、シヤワ
ー式あるいは冷却プレート式等種々変形実施が可
能である。
Note that the cooling mechanism 10 is not limited to the immersion type shown in FIG. 6, and may be modified in various ways, such as a spray type, a shower type, or a cooling plate type.

第7図はスプレー法による冷却機構を示してお
り、基板1を回転試料台20に載置し、回転駆動
しつつ、上方の噴出ノズル21から液体又は気体
の冷媒を吹き付けるものである。冷却された基板
1は真空チヤツク22により移送される。
FIG. 7 shows a cooling mechanism using a spray method, in which the substrate 1 is placed on a rotating sample stage 20, and while being rotated, a liquid or gas coolant is sprayed from an upper jet nozzle 21. The cooled substrate 1 is transferred by a vacuum chuck 22.

第8図はシヤワー式の冷却機構を示しており、
ベルトコンベア9により搬送されてきた基板1を
多孔式の冷却装置23の冷却室24内にある低速
ベルトコンベア25に移し、液体冷媒室26に溜
められた冷媒27を隔壁28の多孔ノズル29か
ら噴出するものである。冷却された基板1はベル
トコンベア14に移され回転試料台15により乾
燥されその後真空チヤツク16によりベルトコン
ベア17へ移され搬出される。冷媒27として気
体を用いることもできる。その場合回転試料台1
5は不要となる。
Figure 8 shows the shower type cooling mechanism.
The substrate 1 transported by the belt conveyor 9 is transferred to the low-speed belt conveyor 25 in the cooling chamber 24 of the porous cooling device 23, and the refrigerant 27 stored in the liquid refrigerant chamber 26 is jetted out from the porous nozzle 29 of the partition wall 28. It is something to do. The cooled substrate 1 is transferred to a belt conveyor 14, dried by a rotating sample stage 15, and then transferred to a belt conveyor 17 by a vacuum chuck 16 and carried out. Gas can also be used as the refrigerant 27. In that case, rotating sample stage 1
5 becomes unnecessary.

第9図は、冷却プレート式の冷却機構を示して
いる。基板1がベルトコンベア31により搬送さ
れている間、上方の基板1に近接する冷却プレー
ト32により均一に冷却されるようになつてい
る。尚、ベルトコンベア31を止めて冷却プレー
ト32を基体1に接触させてもよい。
FIG. 9 shows a cooling plate type cooling mechanism. While the substrate 1 is being conveyed by the belt conveyor 31, it is uniformly cooled by a cooling plate 32 located close to the substrate 1 above. Note that the belt conveyor 31 may be stopped and the cooling plate 32 may be brought into contact with the base body 1.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来のレジストパターン形成工程を概
略的に示すブロツク図、第2図は、従来工程に於
けるプリベーク後の被処理基板の各点の温度変化
の様子を等温曲線で示す説明図、第3図は同温度
変化の様子を時間対温度曲線で示す特性図、第4
図は本発明によるレジストパターン形成工程を概
略的に示すブロツク図、第5図は本発明に於ける
レジスト均一冷却による被処理基板の温度変化の
様子を示す特性図、第6図は本発明方法の実施に
適合する装置の一例を示す配置図、第7図乃至第
9図は均一冷却機構の各変形例を示す説明図であ
る。 1……基板、4……レジスト噴出ノズル、6…
…オーブン、5,8,9,14,15,25,3
1……ベルトコンベア、11……搬送機構、12
……冷却槽、3,15,20……試料回転台、2
1……冷媒噴出ノズル、23……冷却装置、32
……冷却プレート。
FIG. 1 is a block diagram schematically showing a conventional resist pattern forming process, and FIG. 2 is an explanatory diagram showing isothermal curves of temperature changes at various points on the substrate to be processed after prebaking in the conventional process. Figure 3 is a characteristic diagram showing the same temperature change as a time vs. temperature curve.
The figure is a block diagram schematically showing the resist pattern forming process according to the present invention, Figure 5 is a characteristic diagram showing how the temperature of the substrate to be processed changes due to uniform cooling of the resist in the present invention, and Figure 6 is a diagram showing the process of the present invention. FIG. 7 to FIG. 9 are explanatory diagrams showing each modification of the uniform cooling mechanism. 1...Substrate, 4...Resist jet nozzle, 6...
…Oven, 5, 8, 9, 14, 15, 25, 3
1... Belt conveyor, 11... Conveyance mechanism, 12
...Cooling tank, 3, 15, 20...Sample rotating table, 2
1... Refrigerant jet nozzle, 23... Cooling device, 32
...cooling plate.

Claims (1)

【特許請求の範囲】[Claims] 1 基板上にレジストを塗布する工程と、形成さ
れたレジスト膜をベーキングする工程と、しかる
後レジスト膜を基板1枚単位で強制冷却し、レジ
スト膜全体を均一な冷却速度で冷却させる工程
と、この後所定波長域の電磁波あるいは所定エネ
ルギーの粒子線を前記レジスト膜に照射する工程
と、このレジスト膜を現像処理することによりレ
ジストパターンを形成する工程とを備えた事を特
徴とするレジストパターンの形成方法。
1. A step of applying a resist onto a substrate, a step of baking the formed resist film, and a step of forcibly cooling the resist film one substrate at a time, and cooling the entire resist film at a uniform cooling rate, A resist pattern characterized by comprising the steps of: irradiating the resist film with electromagnetic waves in a predetermined wavelength range or particle beams with a predetermined energy; and forming a resist pattern by developing the resist film. Formation method.
JP587683A 1983-01-19 1983-01-19 Method and apparatus for forming resist pattern Granted JPS59132127A (en)

Priority Applications (9)

Application Number Priority Date Filing Date Title
JP587683A JPS59132127A (en) 1983-01-19 1983-01-19 Method and apparatus for forming resist pattern
KR1019840000153A KR860002082B1 (en) 1983-01-19 1984-01-16 Forming method and apparatus of resistor pattern
DE8484300297T DE3478060D1 (en) 1983-01-19 1984-01-18 Method for forming resist pattern
DE88102726T DE3486187T2 (en) 1983-01-19 1984-01-18 Method and device for producing protective lacquer images.
EP88102726A EP0275126B1 (en) 1983-01-19 1984-01-18 Method and apparatus for forming resist pattern
EP84300297A EP0114126B1 (en) 1983-01-19 1984-01-18 Method for forming resist pattern
US06/789,366 US4717645A (en) 1983-01-19 1985-10-22 Method and apparatus for forming resist pattern
US07/108,767 US4897337A (en) 1983-01-19 1987-10-15 Method and apparatus for forming resist pattern
US07/441,479 US5051338A (en) 1983-01-19 1989-11-27 Method and apparatus for forming resist pattern

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP587683A JPS59132127A (en) 1983-01-19 1983-01-19 Method and apparatus for forming resist pattern

Publications (2)

Publication Number Publication Date
JPS59132127A JPS59132127A (en) 1984-07-30
JPH0480531B2 true JPH0480531B2 (en) 1992-12-18

Family

ID=11623112

Family Applications (1)

Application Number Title Priority Date Filing Date
JP587683A Granted JPS59132127A (en) 1983-01-19 1983-01-19 Method and apparatus for forming resist pattern

Country Status (1)

Country Link
JP (1) JPS59132127A (en)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61156814A (en) * 1984-12-28 1986-07-16 Toshiba Corp Method and apparatus for resist baking
JPS6381820A (en) * 1986-09-25 1988-04-12 Toshiba Corp Formation of resist pattern
JPH0250163A (en) * 1988-05-09 1990-02-20 Mitsubishi Electric Corp Pattern forming method
JPH0250165A (en) * 1988-05-09 1990-02-20 Mitsubishi Electric Corp Pattern forming method

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5398782A (en) * 1976-12-29 1978-08-29 Fujitsu Ltd Positioning method for exposure unit
JPS54150079A (en) * 1978-05-18 1979-11-24 Cho Lsi Gijutsu Kenkyu Kumiai Method of forming pattern
JPS57149731A (en) * 1981-03-11 1982-09-16 Seiko Epson Corp Exposing device

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS50113347U (en) * 1974-02-27 1975-09-16

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5398782A (en) * 1976-12-29 1978-08-29 Fujitsu Ltd Positioning method for exposure unit
JPS54150079A (en) * 1978-05-18 1979-11-24 Cho Lsi Gijutsu Kenkyu Kumiai Method of forming pattern
JPS57149731A (en) * 1981-03-11 1982-09-16 Seiko Epson Corp Exposing device

Also Published As

Publication number Publication date
JPS59132127A (en) 1984-07-30

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