JPH0478180B2 - - Google Patents
Info
- Publication number
- JPH0478180B2 JPH0478180B2 JP60186068A JP18606885A JPH0478180B2 JP H0478180 B2 JPH0478180 B2 JP H0478180B2 JP 60186068 A JP60186068 A JP 60186068A JP 18606885 A JP18606885 A JP 18606885A JP H0478180 B2 JPH0478180 B2 JP H0478180B2
- Authority
- JP
- Japan
- Prior art keywords
- silicon glass
- groove
- silicon
- forming
- glass
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Landscapes
- Element Separation (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP18606885A JPS6246543A (ja) | 1985-08-23 | 1985-08-23 | 半導体装置の製造方法 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP18606885A JPS6246543A (ja) | 1985-08-23 | 1985-08-23 | 半導体装置の製造方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS6246543A JPS6246543A (ja) | 1987-02-28 |
JPH0478180B2 true JPH0478180B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) | 1992-12-10 |
Family
ID=16181825
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP18606885A Granted JPS6246543A (ja) | 1985-08-23 | 1985-08-23 | 半導体装置の製造方法 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6246543A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) |
Families Citing this family (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH04233273A (ja) * | 1990-12-28 | 1992-08-21 | Matsushita Electron Corp | カラー固体撮像装置の製造方法 |
DE59402986D1 (de) * | 1993-07-27 | 1997-07-10 | Siemens Ag | Verfahren zur Herstellung eines Halbleiterschichtaufbaus mit planarisierter Oberfläche und dessen Verwendung bei der Herstellung eines Bipolartransistors sowie eines DRAM |
US5459096A (en) * | 1994-07-05 | 1995-10-17 | Motorola Inc. | Process for fabricating a semiconductor device using dual planarization layers |
US5661073A (en) * | 1995-08-11 | 1997-08-26 | Micron Technology, Inc. | Method for forming field oxide having uniform thickness |
KR100326251B1 (ko) * | 1999-06-28 | 2002-03-08 | 박종섭 | 고밀도 플라즈마 산화막 평탄화 방법 및 그를 이용한 반도체소자의 소자분리막 형성 방법 |
Family Cites Families (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6167934A (ja) * | 1984-09-11 | 1986-04-08 | Nec Corp | 溝埋込分離の形成方法 |
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1985
- 1985-08-23 JP JP18606885A patent/JPS6246543A/ja active Granted
Also Published As
Publication number | Publication date |
---|---|
JPS6246543A (ja) | 1987-02-28 |