JPH0477932B2 - - Google Patents
Info
- Publication number
- JPH0477932B2 JPH0477932B2 JP60259448A JP25944885A JPH0477932B2 JP H0477932 B2 JPH0477932 B2 JP H0477932B2 JP 60259448 A JP60259448 A JP 60259448A JP 25944885 A JP25944885 A JP 25944885A JP H0477932 B2 JPH0477932 B2 JP H0477932B2
- Authority
- JP
- Japan
- Prior art keywords
- processing section
- vector
- quotient
- register
- division
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F17/00—Digital computing or data processing equipment or methods, specially adapted for specific functions
- G06F17/10—Complex mathematical operations
- G06F17/16—Matrix or vector computation, e.g. matrix-matrix or matrix-vector multiplication, matrix factorization
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Mathematical Physics (AREA)
- Pure & Applied Mathematics (AREA)
- Mathematical Analysis (AREA)
- Mathematical Optimization (AREA)
- Computational Mathematics (AREA)
- Data Mining & Analysis (AREA)
- Theoretical Computer Science (AREA)
- Computing Systems (AREA)
- Algebra (AREA)
- Databases & Information Systems (AREA)
- Software Systems (AREA)
- General Engineering & Computer Science (AREA)
- Complex Calculations (AREA)
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP60259448A JPS62118474A (ja) | 1985-11-19 | 1985-11-19 | ベクトル除算装置の制御方式 |
| US06/929,913 US4797849A (en) | 1985-11-19 | 1986-11-13 | Pipelined vector divide apparatus |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP60259448A JPS62118474A (ja) | 1985-11-19 | 1985-11-19 | ベクトル除算装置の制御方式 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS62118474A JPS62118474A (ja) | 1987-05-29 |
| JPH0477932B2 true JPH0477932B2 (OSRAM) | 1992-12-09 |
Family
ID=17334216
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP60259448A Granted JPS62118474A (ja) | 1985-11-19 | 1985-11-19 | ベクトル除算装置の制御方式 |
Country Status (2)
| Country | Link |
|---|---|
| US (1) | US4797849A (OSRAM) |
| JP (1) | JPS62118474A (OSRAM) |
Families Citing this family (14)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5157388A (en) * | 1989-02-14 | 1992-10-20 | Intel Corporation | Method and apparatus for graphics data interpolation |
| SE464787B (sv) * | 1989-10-04 | 1991-06-10 | Ericsson Telefon Ab L M | Foerfarande och anordning foer att utfoera en approximativ division |
| US5274580A (en) * | 1990-03-21 | 1993-12-28 | Bull, S.A. | Method for calculating the inverse of a number, and computer for performing the method |
| JPH0731592B2 (ja) * | 1990-11-29 | 1995-04-10 | 株式会社東芝 | 除算回路 |
| US5140545A (en) * | 1991-02-13 | 1992-08-18 | International Business Machines Corporation | High performance divider with a sequence of convergence factors |
| JPH0535773A (ja) * | 1991-07-30 | 1993-02-12 | Nec Corp | ベクトル除算方式とその装置 |
| US5828591A (en) * | 1992-11-02 | 1998-10-27 | Intel Corporation | Method and apparatus for using a cache memory to store and retrieve intermediate and final results |
| US5377134A (en) * | 1992-12-29 | 1994-12-27 | International Business Machines Corporation | Leading constant eliminator for extended precision in pipelined division |
| US5862059A (en) * | 1995-07-19 | 1999-01-19 | National Semiconductor Corporation | Table compression using bipartite tables |
| US6360241B1 (en) | 1999-02-01 | 2002-03-19 | Compaq Information Technologies Goup, L.P. | Computer method and apparatus for division and square root operations using signed digit |
| US6732135B1 (en) * | 1999-02-01 | 2004-05-04 | Hewlett-Packard Development Company, L.P. | Method and apparatus for accumulating partial quotients in a digital processor |
| US6971038B2 (en) * | 2002-02-01 | 2005-11-29 | Broadcom Corporation | Clock gating of sub-circuits within a processor execution unit responsive to instruction latency counter within processor issue circuit |
| US8140608B1 (en) * | 2007-05-31 | 2012-03-20 | Nvidia Corporation | Pipelined integer division using floating-point reciprocal |
| US7979677B2 (en) * | 2007-08-03 | 2011-07-12 | International Business Machines Corporation | Adaptive allocation of reservation station entries to an instruction set with variable operands in a microprocessor |
Family Cites Families (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3508038A (en) * | 1966-08-30 | 1970-04-21 | Ibm | Multiplying apparatus for performing division using successive approximate reciprocals of a divisor |
| US3900723A (en) * | 1974-05-28 | 1975-08-19 | Control Data Corp | Apparatus for controlling computer pipelines for arithmetic operations on vectors |
| JPS57134774A (en) * | 1981-02-13 | 1982-08-20 | Hitachi Ltd | Vector operating device |
| JPS57172444A (en) * | 1981-04-15 | 1982-10-23 | Hitachi Ltd | Approximate quotient correcting circuit |
| JPS6086671A (ja) * | 1983-10-19 | 1985-05-16 | Hitachi Ltd | 除算回路 |
| JPS60142738A (ja) * | 1983-12-30 | 1985-07-27 | Hitachi Ltd | 内挿近似を使用する除算装置 |
-
1985
- 1985-11-19 JP JP60259448A patent/JPS62118474A/ja active Granted
-
1986
- 1986-11-13 US US06/929,913 patent/US4797849A/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| JPS62118474A (ja) | 1987-05-29 |
| US4797849A (en) | 1989-01-10 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| EP1293891B2 (en) | Arithmetic processor accomodating different finite field size | |
| JPH0863353A (ja) | 掛け算累算命令を使用したデータ処理 | |
| JPH0477932B2 (OSRAM) | ||
| US5796645A (en) | Multiply accumulate computation unit | |
| US5426600A (en) | Double precision division circuit and method for digital signal processor | |
| US6009450A (en) | Finite field inverse circuit | |
| JPH0368416B2 (OSRAM) | ||
| JPH0831025B2 (ja) | 乗算回路 | |
| US6675286B1 (en) | Multimedia instruction set for wide data paths | |
| US5734599A (en) | Performing a population count using multiplication | |
| US5721697A (en) | Performing tree additions via multiplication | |
| US3290493A (en) | Truncated parallel multiplication | |
| JPH09212485A (ja) | 2次元idct回路 | |
| EP0529755A2 (en) | Method and apparatus for negating an operand of a multiplication operation | |
| US5377134A (en) | Leading constant eliminator for extended precision in pipelined division | |
| JPS6259828B2 (OSRAM) | ||
| JP2608090B2 (ja) | 高基数非回復型除算装置 | |
| JP3691538B2 (ja) | ベクトルデータ加算方法及びベクトルデータ乗算方法 | |
| SU711570A1 (ru) | Арифметическое устройство | |
| JP2812365B2 (ja) | 乗算回路 | |
| JP3201097B2 (ja) | 乗算器における乗算処方方法 | |
| SU661549A1 (ru) | Арифметическое устройство | |
| JPS60171535A (ja) | 除算装置 | |
| JPS61177543A (ja) | 乗算装置 | |
| JPH06168105A (ja) | 整数除算方式 |