JPH0451779A - Synchronizing signal replacing circuit - Google Patents

Abstract

PURPOSE:To prevent disturbance of synchronization caused by noise superimposed on a VBS(video burst SYNC) signal by connecting a low pass filter to an input terminal of a synchronizing separator circuit and giving the VBS signal to the synchronizing separator circuit through the filter. CONSTITUTION:A low pass filter 21 connects to an input terminal of a synchronizing separator circuit 1 and a VBS signal is given to the synchronizing separator circuit l through the filter 21. The low pass filter 21 is a filter circuit acting like passing a low frequency and cutting off a high frequency to eliminate high frequency noise superimposed on the VBS signal. The synchronizing separator circuit 1 executes synchronizing separation to a VBS signal without no high frequency noise component and no malfunction takes place in a replacing circuit. Even when a differentiating circuit is connected to an output terminal of the synchronizing separator circuit 1, the VBS signal with high frequency noise superimposed thereon is subject to synchronizing separation by the synchronizing separator circuit 1. Thus, disturbance of synchronization caused by noise superimposed on the VBS signal is prevented.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a synchronization signal replacement circuit for preventing synchronization disturbance in a television receiver or the like that reproduces a video signal.

[Prior Art] The conventional synchronization signal replacement circuit shown in FIG.

Synchronous separation circuit 1 and pedestal clamp circuit 2 have V
A BS (video burst sync) signal is provided. This signal is generally called a video signal. The synchronization separation circuit 1 is used to separate and extract synchronization signal components from the VBS signal input thereto, and the synchronization signal components extracted by this circuit 1 are supplied to an adder circuit 3. The pedestal clamp circuit 2 is used to fix the VBS signal to a predetermined potential (pedestal potential) level, and the VBS signal maintained at the predetermined potential level is supplied to the adder circuit 3.

The adder circuit 3 is supplied with a DC power supply. This circuit 3
comprises a first transistor 4, a second emitter follower transistor 5, a third emitter follower transistor 6, a synchronization signal component removal transistor 7, a resistor 8, and a variable resistor 9. There is.

The base of the first transistor 4 is connected to the output terminal of the synchronous separation circuit 1. The emitter of this transistor 4 is grounded, and the collector is connected to the DC power supply via a resistor 8 and a variable resistor 9 connected in series thereto. The base of the second transistor 5 is the pedestal clamp circuit 2.
The collector is connected to the DC power supply. Furthermore, the emitter of the second transistor 5 is
It is connected to the base of the third transistor 6 via a resistor 10. The collector of the third transistor 6 is grounded,
The emitter is connected to the connection point between the resistor 8 and the variable resistor 9. Note that 11 in FIG. 3 is an output line connected to the above connection point.

The collectors and emitters of the transistors 5 and 7 are connected together. The base of this transistor 7 is grounded via a variable reference voltage generator]2.

In this adder circuit 3, the base of the second transistor 5 is connected to the VB which has passed through the pedestal clamp circuit 2.
Since the S signal is input, this signal is output from the emitter of the transistor 5. The heavy DC voltage is applied to this output signal through the collector-emitter of the synchronizing signal removing transistor 7 which is always on. Then, the signal component of the VHS signal below the pedestal potential (that is, the synchronizing signal component) is raised to the pedestal potential level and removed. In other words, the video signal component is extracted from the VBS signal by this addition process. This video signal component has a resistance of 10
is applied to the base of the third transistor 6 through. Therefore, the video signal component passes through the base-emitter of the transistor 6 and is output from the output line 11 to a television receiver or the like.

On the other hand, at the base of the first transistor 4 of the adder circuit 3,
A synchronization signal component, which is a pulse output from the synchronization separation circuit 1, is input. Then, a generation synchronization signal having a level and waveform corresponding to this input signal waveform is generated at the connection point between the resistor 8 and the variable resistor 9. The magnitude of this generated synchronization signal is determined by the voltage division ratio between the resistor 8 and the variable resistor 9, and is adjusted by changing the resistance value of the variable resistor 9. Then, at the connection point between the resistor 8 and the variable resistor 9, the generated synchronization signal and the video signal component are added. A regular signal (composite VBS signal) is thereby produced, and this signal is supplied to a television receiver or the like via an output line 11.

That is, by processing the synchronization signal components in the manner described above, it is possible to prevent synchronization disturbances in television receivers and the like.

[Problems to be Solved by the Invention] By the way, since the VH3 signal is modulated and demodulated and input to the above-mentioned replacement circuit, high frequency noise is superimposed on the synchronization signal portion of this signal. Therefore, when the noise reaches the sync separation level of the sync separation circuit 1, the sync separation circuit 1 treats the noise component as a sync signal and processes the sync separation.

In this case, the output pulse from the synchronization separation circuit 1 will be divided into a plurality of small pulses within the normal pulse width, making it impossible to supply a normal output to the addition circuit 3. When the narrow pulse output based on the noise reaching the synchronization separation level is processed by the adder circuit 3 in this way, there is a problem in that synchronization disturbance occurs on the television receiver side.

SUMMARY OF THE INVENTION An object of the present invention is to provide a synchronization signal replacement circuit that can prevent synchronization disturbances caused by noise superimposed on a VBS signal.

[Means for Solving the Problem] In order to achieve the above object, in the synchronization signal replacement circuit of claim 1, a low-pass filter is connected to the input end of the synchronization separation circuit that separates and extracts the synchronization signal component from the VBS signal. , the VH8 signal is applied to the synchronous separation circuit through this filter.

In addition, in order to achieve the same object, the synchronization signal replacement circuit of claim 2 connects a differentiation circuit to the output end of a synchronization separation circuit that separates and extracts the synchronization signal component from the VBS signal, and connects the differentiation circuit to the output end of this circuit. A sink circuit that connects a noise discrimination circuit, receives the pulse output from this discrimination circuit, generates a generated synchronization signal that is synchronized with the above synchronization signal component, and inputs it to the addition circuit.
A signal generator is connected to the output end of the noise discrimination circuit.

[Operation] According to the invention of claim 1, the low-pass filter allows V
Since the high frequency noise superimposed on the BS signal can be removed, the synchronous separation circuit can perform synchronous separation on the VBS signal free of high frequency noise components.

Therefore, malfunction of the switching circuit is prevented.

According to the invention of claim 2, the VH on which high frequency noise is superimposed
The S signal is synchronously separated by a synchronous separation circuit, and the pulse output from this separation circuit is differentiated by a differentiation circuit and input to a noise identification circuit.

A threshold value is determined for the noise discrimination circuit.

Therefore, if there is a waveform component exceeding the threshold value in the differentiated signal waveform, the noise discrimination circuit outputs a pulse. By the way, since the level of high frequency noise is smaller than the above threshold value, high frequency noise can be removed by the above noise identification process. The pulse of the synchronization signal component output by the noise discrimination circuit is given to the sync signal generator. Then, this generator generates a generated synchronization signal that is synchronized with the synchronization signal component and supplies it to the adder circuit. Therefore, malfunction of the switching circuit is prevented.

[Example] Hereinafter, a first example of the present invention will be described with reference to FIG. In addition, in this explanation, since the basic configuration of the switching circuit is the same as that of the above conventional example shown in FIG.
Here, only the differences from the conventional replacement circuit will be explained, and other identical components will be denoted by the same reference numerals and their explanation will be omitted.

In this embodiment, a low-pass filter 21 as a noise removal means is connected to the input end of the synchronous separation circuit 1.
The VBS signal is passed through this filter 21 to the synchronous separation circuit 1.
It is configured to give

Therefore, the VBS signal on which high-frequency noise is superimposed is supplied to the sync separation circuit 1 through the low-pass filter 21. The low-pass filter 21 is a filter circuit that passes low frequencies and cuts wide frequencies, so that high-frequency noise superimposed on the VBS signal is removed.

Therefore, the synchronous separation circuit 1 can perform synchronous separation using the VBSH5 signal without high-frequency noise components.
A pulse of the synchronizing signal component that would cause a malfunction in the switching circuit will not be input to the first transistor 4 of the adder circuit 3.

That is, since pulses of the regular synchronizing signal component can be supplied to the adder circuit 3 as described above, it is possible to prevent synchronization disturbances caused by noise superimposed on the VBS signal on the television receiver side.

A second embodiment of the present invention shown in FIG. 2 will be described.

In this explanation, since the basic separation configuration of the step change circuit is the same as that of the above conventional example shown in FIG. 3, only the differences from the conventional step change circuit will be explained here, and other identical components will be The same reference numerals are given and the explanation thereof will be omitted.

In this second embodiment, a differentiation circuit 32 is connected to the output end of the synchronous separation circuit 1 via a diode 31 in the forward direction. These differentiating circuit 32 and inverter 35 form a noise removing means. The differentiation circuit 32 is a capacitor 33
and a resistor 34, and their connection point serves as an output end. This output terminal has a C as a noise identification circuit.
- A MOS inverter 35 is connected.

This inverter 35 has a threshold value and outputs an output pulse when the differential waveform exceeds this threshold value. The threshold value is set to exactly half the high level and low level of the differential waveform, and this level is higher than the level of high frequency noise that is normally superimposed on the VBS signal (see Figure 2). (See mechanical waveform A; B in the figure indicates the above threshold level.) And, at the output end of the inverter 35, there is a
Signal generator (hereinafter abbreviated as SSG) 36
or connected. The 5SG 36 has a high reset terminal HR, and is reset by receiving a pulse output from the inverter 35 at this terminal HR to generate a generated synchronization signal that is synchronized with the synchronization signal. The output terminal of this 5SG36 is connected to the base of the first transistor 4 of the adder circuit 3. Furthermore, the pedestal clamp circuit 2 and the second transistor 5 of the adder circuit 3
A delay circuit 37 is inserted between the two. This circuit 37 is used to delay the VH3 signal that has passed through the clamp circuit 2 and input it to the transistor 5 in accordance with the processing time in the 5SG 36.

In the second embodiment having such a configuration, the VBS signal on which high frequency noise is superimposed is synchronously separated by the synchronous separation circuit 1. Next, the frequency-separated synchronization signal component is sent to a differentiating circuit 32.
is man-powered.

In this circuit 32, since the capacitor 33 is not charged during a period when the voltage does not change, the output voltage for the synchronizing signal component is extracted only when there is a sudden change at the beginning and end of the pulse. Through such differentiation processing, a signal waveform A as shown in FIG. 2 is outputted from the output end of the differentiation circuit 32 to the inverter 35. Then, the inverter 35 performs noise identification.

In other words, since the signal waveform A includes a waveform component exceeding the threshold value B set for the inverter 35, the inverter 35 outputs the pulse shown by C in FIG. In this case, since the level of high-frequency noise D (see signal waveform A) is smaller than the above threshold value B, the influence of high-frequency noise D can be eliminated, so that only the synchronizing signal component
It is applied to the HR terminal 37 of SG36.

Then, 5S036 is reset and generates a generated synchronization signal that is synchronized with the synchronization signal component. Since this generated synchronization signal is generated by the 5SG36 without being subjected to modulation or demodulation processing, it does not contain any noise components. and,
Such a clean generated synchronization signal is supplied to the base of the first transistor 4 of the adder circuit 3.

As described above, since pulses of the regular synchronizing signal component can be supplied to the adder circuit 3, synchronization disturbances caused by noise superimposed on the VBS signal on the television receiver side can be prevented from occurring.

[Effects of the Invention] Since the present invention has the configuration described above, it has the following effects.

In the synchronization signal switching circuit according to claim 1, V
A low-pass filter is connected to the input end of the synchronization separation circuit that separates and extracts the synchronization signal component from the BS signal, and the VBS signal is supplied to the synchronization separation circuit through this filter, so high frequency noise superimposed on the VBS signal is removed. Therefore, synchronization disturbance caused by noise superimposed on the VBS signal can be prevented.

In the synchronization signal replacement circuit according to claim 2, V
A differentiation circuit is connected to the output end of a synchronous separation circuit that separates and extracts the synchronous signal component from the BS signal, a noise identification circuit is connected to the output end of this circuit, and upon receiving the pulse output from this identification circuit, the synchronous signal component is extracted from the BS signal. By connecting a sync signal generator to the output terminal of the noise discrimination circuit to generate a synchronization signal synchronized with the VBS signal and input it to the adder circuit, the high frequency noise superimposed on the VBS signal is removed and synchronously separated. Since a generated synchronization signal synchronized with the synchronization signal component is generated and replaced, synchronization disturbances caused by noise superimposed on the VBS signal can be prevented.

[Brief explanation of the drawing]

FIG. 1 is a circuit diagram showing a first embodiment of the present invention. FIG. 2 is a circuit diagram showing a second embodiment of the present invention. FIG. 3 is a circuit diagram showing a conventional example. DESCRIPTION OF SYMBOLS 1... Synchronous separation circuit, 2... Pedestal clamp circuit, 3... Addition circuit, 21... Low pass filter,
32... Differentiation circuit, 35... Inverter (noise discrimination circuit), 36... Sink signal generator.

Claims (1)

[Claims] 1. A synchronization separation circuit that separates and extracts synchronization signal components from the VBS signal, a pedestal clamp circuit that fixes the VBS signal to a predetermined potential level, and synchronization from the VBS signal that has passed through this clamp circuit. In addition to removing the signal component and obtaining the video signal component and outputting it, when the synchronization signal component extracted by the synchronization separation circuit is input, a generated synchronization signal corresponding to the same synchronization signal component is generated based on this signal component. In the synchronization signal replacement circuit, which is equipped with an adder circuit that generates the generated synchronization signal and the video signal component and outputs the result, a low-pass filter is connected to the input terminal of the synchronization separation circuit, and the VBS is passed through the filter. A synchronous signal replacement circuit characterized in that the signal is applied to the synchronous separation circuit. 2. A sync separation circuit that separates and extracts the sync signal component from the VBS signal, a pedestal clamp circuit that fixes the VBS signal at a predetermined potential level, and a sync signal component that is removed from the VBS signal that has passed through this clamp circuit to create an image. When the signal component is obtained and output, when the synchronization signal component extracted by the synchronization separation circuit is input, a generated synchronization signal corresponding to the same synchronization signal component is created based on this signal component,
In a synchronization signal replacement circuit equipped with an adder circuit that synthesizes and outputs the generated synchronization signal and the video signal component, a differentiation circuit is connected to the output end of the synchronization separation circuit, and a noise identification circuit is connected to the output end of this circuit. A sink circuit is connected to the circuit, receives the pulse output from the identification circuit, generates a generated synchronization signal that is synchronized with the synchronization signal component, and inputs the generated synchronization signal to the addition circuit.
A synchronous signal replacement circuit characterized in that a signal generator is connected to the output end of the noise identification circuit.