JPH01174072A - Synchronizing signal separator - Google Patents

Synchronizing signal separator

Info

Publication number
JPH01174072A
JPH01174072A JP62331956A JP33195687A JPH01174072A JP H01174072 A JPH01174072 A JP H01174072A JP 62331956 A JP62331956 A JP 62331956A JP 33195687 A JP33195687 A JP 33195687A JP H01174072 A JPH01174072 A JP H01174072A
Authority
JP
Japan
Prior art keywords
signal
potential
luminance signal
output
synchronizing signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62331956A
Other languages
Japanese (ja)
Inventor
Tsuyoshi Maruoka
丸岡 強
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP62331956A priority Critical patent/JPH01174072A/en
Publication of JPH01174072A publication Critical patent/JPH01174072A/en
Pending legal-status Critical Current

Links

Landscapes

  • Television Signal Processing For Recording (AREA)
  • Synchronizing For Television (AREA)

Abstract

PURPOSE:To avoid malfunction even if a synchronizing signal portion of a luminance signal is shrinked by comparing a 2nd luminance signal outputted from a low pass filter cutting off the high frequency component of a 1st luminance signal with a 3rd potential at a comparator and outputting a signal being the result of separating the synchronizing signal of the luminance signal. CONSTITUTION:The luminance signal inputted from an input terminal 1 is fed to an inverse amplifier 3. A peak detection circuit 4 detects the potential or the tip of a synchronizing signal being a peak potential or the signal to be inputted. A detection circuit 5 detects the potential of the pedestal portion of the inputted signal. A low pass filter 6 eliminates the high frequency component such as noise from the input signal and gives the result to a comparator 8. The comparator 8 compares the output signal of the low pass filter 6 with the potential at the tip of the synchronizing signal of the luminance signal and the potential of the pedestal portion and outputs a signal being the result or separating the synchronizing signal of the luminance signal to the output terminal 9. Thus, even if the synchronizing signal portion of the input luminance signal is shrinked, a correct synchronizing signal separation output is obtained and the time delay of the output synchronizing signal is decreased.

Description

【発明の詳細な説明】 産業上の利用分野 本発明は映像信号を記録、再生する磁気記録再生装置に
おいて、映像信号の同期信号を分離する同期信号分離装
置に関するものである。
DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a synchronization signal separation device for separating a synchronization signal of a video signal in a magnetic recording and reproducing device for recording and reproducing video signals.

従来の技術 以下、図面を参照しながら従来の同期信号分離装置につ
いて説明する。
2. Description of the Related Art Hereinafter, a conventional synchronization signal separation device will be described with reference to the drawings.

第2図は従来の同期信号分離装置のブロック図を示すも
のである。第2図において、1は輝度信号入力端子、2
はクランプ回路、3は反転アンプ、4はピーク検出回路
6はローパスフィルタ、8は比較器、9は同期信号出力
端子である。
FIG. 2 shows a block diagram of a conventional synchronization signal separation device. In Fig. 2, 1 is a luminance signal input terminal;
3 is a clamp circuit, 3 is an inverting amplifier, 4 is a peak detection circuit 6 is a low-pass filter, 8 is a comparator, and 9 is a synchronization signal output terminal.

第3図は各部の波形を示したものである。FIG. 3 shows waveforms at various parts.

まず、入力端子1から輝度信号が入力され、クランプ回
路2へ供給される。クランプ回路2では、輝度信号の同
期信号先端部の電位をある一定のクランプ電位にクラン
プした第3図aに示すような信号を反転アンプ3へ出力
する。反転アンプ3は第3図すに示すような信号をロー
パスフィルタ6へ出力する。ローパスフィルタ6は、ノ
イズなどの高域成分を除去し、ピーク検出回路4および
比較器8へ信号を供給する。ピーク検出回路4は、入力
された信号のピーク値である同期信号先端部の電位を検
出し、レベルシフト回路10へ供給する。レベルシフト
回路10は、入力された人力された同期信号先端部の電
位を一定電圧V1だけシフトし、比較器8へ供給する。
First, a luminance signal is input from the input terminal 1 and supplied to the clamp circuit 2. The clamp circuit 2 outputs to the inverting amplifier 3 a signal as shown in FIG. The inverting amplifier 3 outputs a signal as shown in FIG. 3 to the low-pass filter 6. The low-pass filter 6 removes high-frequency components such as noise and supplies a signal to the peak detection circuit 4 and the comparator 8. The peak detection circuit 4 detects the potential at the leading end of the synchronization signal, which is the peak value of the input signal, and supplies it to the level shift circuit 10. The level shift circuit 10 shifts the potential at the tip of the input manually input synchronization signal by a constant voltage V1 and supplies it to the comparator 8.

比較器8は、第3図Cに示すように、ローパスフィルタ
6の出力信号と、レベルシフト回路10より出力される
同期信号先端部の電位をVlだけシフトした電位が入力
され、比較されて、第3図りに示すような、輝度信号の
同期信号を分離した信号を同期信号出力端子9へ出力す
る。
As shown in FIG. 3C, the comparator 8 receives and compares the output signal of the low-pass filter 6 and the potential obtained by shifting the potential at the tip of the synchronizing signal outputted from the level shift circuit 10 by Vl. A signal obtained by separating the synchronization signal of the luminance signal as shown in the third diagram is output to the synchronization signal output terminal 9.

発明が解決しようとする問題点 しかしながら上記のような構成では、ノイズ除去のロー
パスフィルタの影τにより、同期信号分離装置の出力第
3図りは、時間T1遅れる。また、このときに遅れ時間
T1を小さくするために、レベルシフト回路10のレベ
ルシフト量V。
Problems to be Solved by the Invention However, in the above configuration, the third output signal of the synchronizing signal separation device is delayed by a time T1 due to the shadow τ of the low-pass filter for noise removal. Also, in order to reduce the delay time T1 at this time, the level shift amount V of the level shift circuit 10 is adjusted.

をV、<V2となるようにとったときには、例えば、入
力端子1より輝度信号の同期信号部分が縮んだ信号が入
力されたときには、比較器8の入力信号は第3図eのよ
うに、レベルシフト回路10の出力信号の電位が、ロー
パスフィルタ6の出力信号のベデスクルレベルよりも下
がってしまい、比較器8より出力される信号が第3図f
のように、実際の同期信号よりも、幅の広い信号が出力
されてしまうという問題点を有していた。
When V is set such that V<V2, for example, when a signal in which the synchronization signal portion of the luminance signal is compressed is input from the input terminal 1, the input signal of the comparator 8 is as shown in FIG. 3e, The potential of the output signal of the level shift circuit 10 becomes lower than the level of the output signal of the low-pass filter 6, and the signal output from the comparator 8 becomes
This has the problem that a signal with a wider width than the actual synchronization signal is output.

問題点を解決するための手段 上記問題点を解決するために本発明の同期信号分離装置
は、輝度信号の同期信号先端部の電位を一定電位にクラ
ンプするクランプ回路と、該クランプ回路より出力され
る第1の輝度信号の同期信号先端部の電位を検出する第
1の検出回路と、第1の輝度信号のペデスタル部の電位
を検出する第2の検出回路と、第1の検出回路より出力
される第1の電位と第2の検出回路より出力される第2
の電位を入力し、第3の電位を発生する電位発生回路と
、第tの輝度信号の高域周波数成分をしゃ断するローパ
スフィルタと、該ローパスフィルタより出力される第2
の輝度信号と第3の電位とを比較する比較器とを具備す
るという構成を備えたものである。
Means for Solving the Problems In order to solve the above problems, the synchronization signal separation device of the present invention includes a clamp circuit that clamps the potential at the tip of the synchronization signal of the luminance signal to a constant potential, and a a first detection circuit that detects the potential at the tip of the synchronization signal of the first luminance signal; a second detection circuit that detects the potential at the pedestal portion of the first luminance signal; and an output from the first detection circuit. the first potential output from the second detection circuit and the second potential output from the second detection circuit.
a potential generating circuit that inputs the potential of the t-th luminance signal and generates a third potential; a low-pass filter that cuts off the high frequency component of the t-th luminance signal; and a second potential that is output from the low-pass filter.
The third potential includes a comparator that compares the luminance signal of the second potential with the third potential.

作   用 本発明は、上記した構成によって、輝度信号の同期信号
部分が縮んだときにも、同期信号分離装置の出力同期信
号の幅が広くなるように誤動作することがなく、また出
力同期信号の遅れ時間も小さ(することが出来、そのと
きも安定な動作をする。
Effect of the Invention With the above-described configuration, the present invention prevents the synchronization signal separating device from malfunctioning so that the width of the output synchronization signal becomes wider even when the synchronization signal portion of the luminance signal is shortened, and also prevents the output synchronization signal from widening. The delay time is also small, and the operation is stable even at that time.

実施例 以下、本発明の同期信号分離装置の一実施例について図
面を参照しながら説明する。
Embodiment Hereinafter, an embodiment of the synchronization signal separation device of the present invention will be described with reference to the drawings.

第1図は、本発明の一実施例の同期信号分離装置のブロ
ック図を示すものである。第1図において、第2図と同
一符号部分は、第2図と同一または相当部分である。5
は輝度信号のペデスタル部分の電位を検出する検出回路
、7は2つの違なる直流電位より、新たな電位を発生す
る電位発生器である。以上のように構成された同期信号
分離装置について以下その動作を説明する。
FIG. 1 shows a block diagram of a synchronization signal separation device according to an embodiment of the present invention. In FIG. 1, parts with the same reference numerals as those in FIG. 2 are the same or corresponding parts. 5
7 is a detection circuit that detects the potential of the pedestal portion of the luminance signal, and 7 is a potential generator that generates a new potential from two different DC potentials. The operation of the synchronization signal separation device configured as described above will be explained below.

入力端子1より入力された輝度信号は、クランプ回路2
により第3図aのように同期信号先端部分をある一定の
クランプ電位にクランプされた、反転アンプ3に供給さ
れる。反転アンプ3では、入力信号を反転増幅し、第3
図すに示すような信号をピーク検出回路4、検出回路5
、ローパスフィルタ6に供給する。ピーク検出回路4は
人力され信号のビーク電位である同期信号の先端1)6
の電位を検出する。検出回路5は入力された信号のペデ
スタル部の電位を検出する。ボローパスフィルタ6は入
力信号より、ノイズなどの高域周波数成分を除去し、比
較器8へ出力する。電位発生器7は、入力された、輝度
信号の同期信号先端部分の電位とペデスタル部分の電位
をある一定比率でx  : 1−x、(x、<1)で内
分する電位を発■ 生し、比較器8へ出力する。比較器8は第3図qに示す
ようにローパスフィルタ6の出力信号と輝度信号の同期
信号先端部の電位と、ペデスタル部の電位をx  : 
(1−x、)、x、<1の比率で内分する電位とを比較
し、出力端子9へ、第3図りに示すような、輝度信号の
同期信号を分離した信号を出力する。このときに、本同
期信号装置の出力同期信号第3図りの遅れ時間T2を小
さくするために電位発生器7の内部比率X、をX、<X
、、となるようなX2としても、例えば、入力端子1に
入力される輝度信号の同期信号部分が縮んだときにも、
比較器8に入力される信号は、第3図iのようになり、
比較器8より出力される同期信号は第3図jに示すよう
に正しい同期信号が得られ、設動作することがない。ま
た、時間遅れT3もT3くT2となる。
The luminance signal input from input terminal 1 is sent to clamp circuit 2.
As shown in FIG. 3a, the synchronizing signal is supplied to the inverting amplifier 3 whose leading end is clamped to a certain clamp potential. The inverting amplifier 3 inverts and amplifies the input signal, and
The signal shown in the figure is detected by the peak detection circuit 4 and the detection circuit 5.
, and supplied to the low-pass filter 6. The peak detection circuit 4 detects the tip of the synchronizing signal 1) 6, which is the peak potential of the human input signal.
Detects the potential of The detection circuit 5 detects the potential of the pedestal portion of the input signal. The borrow pass filter 6 removes high frequency components such as noise from the input signal and outputs it to the comparator 8. The potential generator 7 generates a potential that internally divides the potential of the synchronizing signal tip portion of the input luminance signal and the potential of the pedestal portion by a certain ratio x: 1-x, (x, < 1). and outputs it to the comparator 8. As shown in FIG. 3q, the comparator 8 converts the output signal of the low-pass filter 6, the potential at the tip of the synchronization signal of the luminance signal, and the potential at the pedestal section into x:
(1-x,), x, is compared with the potential internally divided at a ratio of <1, and a signal obtained by separating the synchronization signal of the luminance signal as shown in the third diagram is outputted to the output terminal 9. At this time, in order to reduce the delay time T2 of the third output synchronizing signal of the present synchronizing signal device, the internal ratio X of the potential generator 7 is set to
For example, even when the synchronization signal part of the luminance signal input to input terminal 1 is shrunk,
The signal input to the comparator 8 is as shown in Figure 3i,
A correct synchronizing signal is obtained from the comparator 8 as shown in FIG. 3j, and no setting operation occurs. Further, the time delay T3 is also T3 minus T2.

発明の効果 以上のように、本発明の同期信号分離装置では、入力輝
度信号の同期信号部分が縮んだときにも、正しく同期信
号分離出力を得ることが出来、かつ、出力同期信号の時
間遅れも小さくすることが出来るというすぐれた効果を
得ることが出来る。
Effects of the Invention As described above, the synchronization signal separation device of the present invention can correctly obtain a synchronization signal separated output even when the synchronization signal portion of the input luminance signal is shrunk, and can reduce the time delay of the output synchronization signal. An excellent effect can be obtained in that the size can also be made smaller.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の同期信号分離装置の一実施例における
ブロック図、第2図は従来の同期信号分離装置のブロッ
ク図、第3図は各部の波形図である。 1・・・・・・入力端子、2・・・・・・クランプ回路
、3・・・・・・反転アンプ、4・・・・・・ピーク検
出回路、5・・・・・・検出回路、6・・・・・・ロー
パスフィルタ、7・・・・・・電位発生器、8・・・・
・・比較器、9・・・・・・出力端子。 代理人の氏名 弁理士 中尾敏男 ほか1名第1図 第2図 第3図
FIG. 1 is a block diagram of an embodiment of the sync signal separation device of the present invention, FIG. 2 is a block diagram of a conventional sync signal separation device, and FIG. 3 is a waveform diagram of each part. 1...Input terminal, 2...Clamp circuit, 3...Inverting amplifier, 4...Peak detection circuit, 5...Detection circuit , 6...Low pass filter, 7...Potential generator, 8...
... Comparator, 9... Output terminal. Name of agent: Patent attorney Toshio Nakao and one other person Figure 1 Figure 2 Figure 3

Claims (1)

【特許請求の範囲】[Claims] 映像信号の輝度信号成分の同期信号先端部の電位を一定
電位にクランプするクランプ回路と、前記クランプ回路
より出力される第1の輝度信号の同期信号先端部の電位
を検出する第1の検出回路と、第1の輝度信号のペデス
タル部の電位を検出する第2の検出回路と、第1の検出
回路より出力される第1の電位と第2の検出回路より出
力される第2の電位を入力し、第3の電位を発生する電
位発生回路と、第1の輝度信号の高域周波数成分をしゃ
断するローパスフィルタと、前記ローパスフィルタより
出力される第2の輝度信号と第3の電位とを比較する比
較器とを備えたことを特徴とする同期信号分離装置。
a clamp circuit that clamps to a constant potential the potential of the synchronization signal tip of the luminance signal component of the video signal; and a first detection circuit that detects the potential of the synchronization signal tip of the first luminance signal output from the clamp circuit. and a second detection circuit that detects the potential of the pedestal portion of the first luminance signal, and a first potential output from the first detection circuit and a second potential output from the second detection circuit. a potential generation circuit that inputs and generates a third potential; a low-pass filter that cuts off high frequency components of the first luminance signal; and a second luminance signal and a third potential that are output from the low-pass filter. A synchronous signal separation device comprising: a comparator for comparing the signals.
JP62331956A 1987-12-28 1987-12-28 Synchronizing signal separator Pending JPH01174072A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62331956A JPH01174072A (en) 1987-12-28 1987-12-28 Synchronizing signal separator

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62331956A JPH01174072A (en) 1987-12-28 1987-12-28 Synchronizing signal separator

Publications (1)

Publication Number Publication Date
JPH01174072A true JPH01174072A (en) 1989-07-10

Family

ID=18249521

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62331956A Pending JPH01174072A (en) 1987-12-28 1987-12-28 Synchronizing signal separator

Country Status (1)

Country Link
JP (1) JPH01174072A (en)

Similar Documents

Publication Publication Date Title
JPH01174072A (en) Synchronizing signal separator
KR0144962B1 (en) A sync signal separation apparatus of hdtv
JP2993018B2 (en) Sync separation circuit
JP2963915B2 (en) Sync separation circuit
JPH01129670A (en) Phase adjusting circuit
JPH04107072A (en) Synchronizing signal separator
JP2775801B2 (en) Video signal processing circuit
JPH08149338A (en) Video signal processor
KR970008091B1 (en) Synchronizing signal separation circuit for composite video signal
KR950005041B1 (en) Image signal wave form set-form circuit
JPH0451779A (en) Synchronizing signal replacing circuit
JPH01296856A (en) Synchronizing signal separating device
KR940000159Y1 (en) Keyed pulse generator for high definition of tv
JPH0213514B2 (en)
JPS61163775A (en) Clamping circuit
JPH0638073A (en) Synchronization separation circuit
KR890000949B1 (en) Synchronizing signal split integrated circuit
KR890003767B1 (en) Synchronizing signal division circuit
JPH05292342A (en) Synchronizing signal separator circuit
JP3030971B2 (en) Synchronous separation device
JPH02280574A (en) Video signal circuit
JPS5947909B2 (en) Synchronous separation device
JPS60197075A (en) Synchronizing signal eliminating device
JPH04107073A (en) Synchronizing signal separator
JPH01274570A (en) Video signal clamp circuit