JPH01274570A - Video signal clamp circuit - Google Patents

Abstract

PURPOSE:To relieve the noise component superimposed on the tip of a horizontal synchronizing pulse from being converted into noise by inverting the noise component of the tip of the horizontal synchronizing pulse in a video signal and adding the result in a clamp circuit. CONSTITUTION:A clamp pulse generating circuit 6 outputs a clamp pulse in response to the timewise location of the horizontal synchronizing pulse inputted to a switch circuit 7. A branch circuit 9 branches a video signal and gives an output to an output terminal 4 and a slice circuit 10. The circuit 10 outputs the synchronizing pulse information at the tip of the horizontal synchronizing pulse to an inverse amplifier 11 and outputs it to a coupling circuit 13 via a high pass filter 12. The circuit 13 adds the output from an HPF 12 to the output of a clamp level generating circuit 8 and outputs the result to the circuit 7. The switch of the circuit 7 is closed at the clamp pulse time from the circuit 6 to apply the signal from the circuit 13 to the circuit 9. Thus, even if noise is superimposed onto the tip of the horizontal synchronizing pulse, the noise component of the signal supplied from the circuit 7 is reduced by the DC voltage deciding the clamp level and the voltage cancelling the noise.

Description

[Detailed description of the invention] [Industrial application field] The present invention relates to video signal clamp circuits.

[Conventional technology]

FIG. 2 is a block diagram of an example of a conventional video signal clamp circuit.

The branch circuit 2 branches the input video signal 1 and outputs it to the output terminal 4 via the horizontal synchronizing signal separation circuit 5 and the capacitor 3. Horizontal synchronization signal separation circuit 5 separates the horizontal synchronization pulse in the video signal and outputs it to clamp pulse generation circuit 6.

The clamp pulse generation circuit 6 generates a clamp pulse according to the time position of the input horizontal synchronization pulse, opens and closes the switch of the switch circuit 7, and uses the DC potential generated by the clamp level generation circuit 8 to synchronize the video signal. It is supplied to the output side of the capacitor 3, that is, the output terminal 4, via the switch circuit 7 and the diode 14 only during a part of the time when the pulse is present.

During the time when the switch circuit 7 is open, the diode 14 is non-conductive and maintains the DC potential supplied during the horizontal synchronization pulse time with a time constant determined by the capacitor 3 and the load resistor 15.

In the video signal from which the DC component has been removed in this way, the horizontal synchronization tip level is fixed at the output level of the clamp level generation circuit 8, and a DC reproduced video signal is obtained at the output terminal 4.

[Problem to be solved by the invention]

The conventional video signal clamp circuit described above is shown in FIG.
), (b), when noise is superimposed on the horizontal synchronizing pulse of the video signal, that is, when the switch circuit 7 closes, for example, in the latter half of the horizontal synchronizing pulse, as shown in FIG.
If there is a potential difference A due to noise superimposed on the tip levels of a) and (b), as a result of fixing the level of the latter half of the horizontal synchronization pulse to a certain constant potential, the level difference at the horizontal synchronization tips will be as shown in Figure 4. As shown in (a) and (b), there is a problem in that the signal is converted into a level difference between line components, resulting in a decrease in the video signal-to-noise ratio.

[Means to solve the problem]

The video signal clamp circuit of the present invention includes means for inverting a noise component at the leading edge of a horizontal synchronizing pulse in the video signal and adding it to the clamp circuit in a video signal clamp circuit that performs direct current reproduction of a video signal by the clamp circuit. have.

〔Example〕

Next, the present invention will be explained with reference to the drawings.

FIG. 1 is a block diagram of one embodiment of the present invention.

The branch circuit 2 branches the input video signal 1 and outputs it to one electrode of the capacitor 3 and the horizontal synchronizing signal separation circuit 5.

Horizontal synchronization signal separation circuit 5 separates the horizontal synchronization pulse in the video signal and outputs it to clamp pulse generation circuit 6.

The clamp pulse generation circuit 6 generates a clamp pulse according to the time position of the input horizontal synchronization pulse to the switch circuit 7.
Output to.

Branch circuit 9 connects a load resistor 15 to its input, branches the input video signal from the other electrode of capacitor 3, and outputs it to output terminal 4 and slice circuit 10.

The slice circuit 10 uses synchronization pulse information at the leading edge of the horizontal synchronization pulse in the video signal (for example, in the case of video signals such as those shown in FIGS. 4(a) and (b), the information shown in FIGS. 5(a) and (b)). signal> is output to the inverting amplifier 11.

The high frequency waveform generator 12 outputs the noise component superimposed on the leading edge of the synchronization pulse information inverted by the inverting amplifier 11 to the coupling circuit 13 .

The coupling circuit 13 adds the output from the high-frequency i-wavelength converter 12 to the output from the clamp level generation circuit 8 and outputs the result to the signal switch circuit 7 .

The switch circuit 7 closes the switch only for the duration of the clamp pulse from the clamp pulse generating circuit 6 and applies the signal from the coupling circuit 13 to the input of the branch circuit 9 via the diode 14.

In this way, even if a video signal with noise superimposed on the leading edge of the horizontal synchronizing pulse shown in FIGS. 3(a) and 3(b) is input, the signal supplied from the switch circuit 7 determines the clamp level. The video signal is converted to the voltage shown in Figure 6 (a) by the DC voltage and the voltage that cancels out the noise at the tip of the horizontal synchronizing pulse.
, (b), the noise component can be reduced.

〔Effect of the invention〕

As explained above, the present invention inverts the noise component superimposed on the tip of the horizontal synchronizing pulse of a video signal and adds it to a clamp circuit that performs DC reproduction. This has the effect of reducing the amount of noise that is converted into noise.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of an embodiment of the present invention, FIG. 2 is a block diagram of an example of a conventional video signal clamp circuit, and FIGS. 3 and 4 are signal waveform diagrams for explaining the operation of the conventional example. 5 and 6 are signal waveform diagrams for explaining the operation of this embodiment. 1...Video signal, 2,9...Branch circuit, 3...
Capacitor, 4... Output terminal, 5... Horizontal synchronizing signal separation circuit, 6... Clamp pulse generation circuit, 7... Switch circuit, 8... Clamp level generation circuit, 1o...
- Slice circuit, 11... Inverting amplifier, 12... High-frequency i-channel converter, 13... Coupling circuit, 14... Diode, 15... Load resistor.

Claims (1)

[Claims] A video signal clamp circuit for performing direct current reproduction of a video signal by a clamp circuit, characterized in that the video signal clamp circuit has means for inverting a noise component at the leading end of a horizontal synchronizing pulse in the video signal and adding it to the clamp circuit. .