JPH0446456B2 - - Google Patents

Info

Publication number
JPH0446456B2
JPH0446456B2 JP59125163A JP12516384A JPH0446456B2 JP H0446456 B2 JPH0446456 B2 JP H0446456B2 JP 59125163 A JP59125163 A JP 59125163A JP 12516384 A JP12516384 A JP 12516384A JP H0446456 B2 JPH0446456 B2 JP H0446456B2
Authority
JP
Japan
Prior art keywords
resin
header
main surface
groove
semiconductor device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP59125163A
Other languages
English (en)
Japanese (ja)
Other versions
JPS615529A (ja
Inventor
Minoru Suda
Masao Yamaguchi
Nobukatsu Tanaka
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP12516384A priority Critical patent/JPS615529A/ja
Publication of JPS615529A publication Critical patent/JPS615529A/ja
Publication of JPH0446456B2 publication Critical patent/JPH0446456B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the groups H01L21/18 - H01L21/326 or H10D48/04 - H10D48/07 e.g. sealing of a cap to a base of a container
    • H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
    • H01L21/565—Moulds
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation
    • H01L2924/1815—Shape

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
JP12516384A 1984-06-20 1984-06-20 絶縁型半導体装置 Granted JPS615529A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12516384A JPS615529A (ja) 1984-06-20 1984-06-20 絶縁型半導体装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12516384A JPS615529A (ja) 1984-06-20 1984-06-20 絶縁型半導体装置

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP1325668A Division JPH02290032A (ja) 1989-12-14 1989-12-14 レジンモールド型半導体装置の製造方法

Publications (2)

Publication Number Publication Date
JPS615529A JPS615529A (ja) 1986-01-11
JPH0446456B2 true JPH0446456B2 (en:Method) 1992-07-30

Family

ID=14903434

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12516384A Granted JPS615529A (ja) 1984-06-20 1984-06-20 絶縁型半導体装置

Country Status (1)

Country Link
JP (1) JPS615529A (en:Method)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6115744U (ja) * 1984-06-30 1986-01-29 ロ−ム株式会社 半導体装置
EP0257681A3 (en) * 1986-08-27 1990-02-07 STMicroelectronics S.r.l. Method for manufacturing plastic encapsulated semiconductor devices and devices obtained thereby
US5197183A (en) * 1991-11-05 1993-03-30 Lsi Logic Corporation Modified lead frame for reducing wire wash in transfer molding of IC packages
US5252783A (en) * 1992-02-10 1993-10-12 Motorola, Inc. Semiconductor package
JP5161688B2 (ja) * 2008-07-30 2013-03-13 オンセミコンダクター・トレーディング・リミテッド 半導体装置および半導体モジュール

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5878654U (ja) * 1981-11-20 1983-05-27 日本電気株式会社 モ−ルド型半導体素子
JPS58187146U (ja) * 1982-06-04 1983-12-12 松下電子工業株式会社 半導体装置

Also Published As

Publication number Publication date
JPS615529A (ja) 1986-01-11

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