JPH0445868B2 - - Google Patents

Info

Publication number
JPH0445868B2
JPH0445868B2 JP23971583A JP23971583A JPH0445868B2 JP H0445868 B2 JPH0445868 B2 JP H0445868B2 JP 23971583 A JP23971583 A JP 23971583A JP 23971583 A JP23971583 A JP 23971583A JP H0445868 B2 JPH0445868 B2 JP H0445868B2
Authority
JP
Japan
Prior art keywords
lock
processing device
input
access request
request
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP23971583A
Other languages
English (en)
Japanese (ja)
Other versions
JPS60132263A (ja
Inventor
Hiroaki Sato
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP23971583A priority Critical patent/JPS60132263A/ja
Publication of JPS60132263A publication Critical patent/JPS60132263A/ja
Publication of JPH0445868B2 publication Critical patent/JPH0445868B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/52—Program synchronisation; Mutual exclusion, e.g. by means of semaphores

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
JP23971583A 1983-12-21 1983-12-21 記憶制御方式 Granted JPS60132263A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP23971583A JPS60132263A (ja) 1983-12-21 1983-12-21 記憶制御方式

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP23971583A JPS60132263A (ja) 1983-12-21 1983-12-21 記憶制御方式

Publications (2)

Publication Number Publication Date
JPS60132263A JPS60132263A (ja) 1985-07-15
JPH0445868B2 true JPH0445868B2 (cg-RX-API-DMAC7.html) 1992-07-28

Family

ID=17048843

Family Applications (1)

Application Number Title Priority Date Filing Date
JP23971583A Granted JPS60132263A (ja) 1983-12-21 1983-12-21 記憶制御方式

Country Status (1)

Country Link
JP (1) JPS60132263A (cg-RX-API-DMAC7.html)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61216050A (ja) * 1985-02-13 1986-09-25 Fujitsu Ltd 主記憶ロツク制御方式

Also Published As

Publication number Publication date
JPS60132263A (ja) 1985-07-15

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