JPH0436114Y2 - - Google Patents

Info

Publication number
JPH0436114Y2
JPH0436114Y2 JP1986131950U JP13195086U JPH0436114Y2 JP H0436114 Y2 JPH0436114 Y2 JP H0436114Y2 JP 1986131950 U JP1986131950 U JP 1986131950U JP 13195086 U JP13195086 U JP 13195086U JP H0436114 Y2 JPH0436114 Y2 JP H0436114Y2
Authority
JP
Japan
Prior art keywords
electrode
chip
wiring
bump
connection wiring
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP1986131950U
Other languages
English (en)
Japanese (ja)
Other versions
JPS6338328U (sv
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1986131950U priority Critical patent/JPH0436114Y2/ja
Publication of JPS6338328U publication Critical patent/JPS6338328U/ja
Application granted granted Critical
Publication of JPH0436114Y2 publication Critical patent/JPH0436114Y2/ja
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/023Redistribution layers [RDL] for bonding areas
    • H01L2224/0235Shape of the redistribution layers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/11Manufacturing methods

Landscapes

  • Wire Bonding (AREA)
  • Lead Frames For Integrated Circuits (AREA)
JP1986131950U 1986-08-28 1986-08-28 Expired JPH0436114Y2 (sv)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1986131950U JPH0436114Y2 (sv) 1986-08-28 1986-08-28

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1986131950U JPH0436114Y2 (sv) 1986-08-28 1986-08-28

Publications (2)

Publication Number Publication Date
JPS6338328U JPS6338328U (sv) 1988-03-11
JPH0436114Y2 true JPH0436114Y2 (sv) 1992-08-26

Family

ID=31030878

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1986131950U Expired JPH0436114Y2 (sv) 1986-08-28 1986-08-28

Country Status (1)

Country Link
JP (1) JPH0436114Y2 (sv)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0834210B2 (ja) * 1988-04-28 1996-03-29 富士電機株式会社 半導体素子の突起電極
KR20140041975A (ko) * 2012-09-25 2014-04-07 삼성전자주식회사 범프 구조체 및 이를 포함하는 전기적 연결 구조체
JP2015228472A (ja) * 2014-06-03 2015-12-17 株式会社ソシオネクスト 半導体装置およびその製造方法

Also Published As

Publication number Publication date
JPS6338328U (sv) 1988-03-11

Similar Documents

Publication Publication Date Title
JP2755252B2 (ja) 半導体装置用パッケージ及び半導体装置
JP3704864B2 (ja) 半導体素子の実装構造
EP0459493B1 (en) A semiconductor device comprising a TAB tape and its manufacturing method
US20110290545A1 (en) Through wiring board and method of manufacturing the same
JPH01238148A (ja) 半導体装置
JPH0436114Y2 (sv)
JP2699726B2 (ja) 半導体装置の実装方法
US20020014346A1 (en) Mounting structure of semiconductor package
JP3394479B2 (ja) 半導体装置
JPH0658924B2 (ja) 半導体デバイスパッケージ及びその製造方法
US6291893B1 (en) Power semiconductor device for “flip-chip” connections
JPH11214432A (ja) 半導体装置およびスペーサ形成方法
JPH0677631A (ja) チップ部品のアルミ基板への実装方法
US6404059B1 (en) Semiconductor device having a mounting structure and fabrication method thereof
JP2636602B2 (ja) 半導体装置
JP3006957B2 (ja) 半導体装置の実装体
JPS595977Y2 (ja) 集積回路の塔載装置
JPH02168640A (ja) 異なる基板間の接続構造
JPS6318335B2 (sv)
JP2979880B2 (ja) 複合リードフレームおよびその製造方法
JP2633745B2 (ja) 半導体装置の実装体
JPH0214536A (ja) フリップチップ実装構造
JP3658156B2 (ja) 実装体及びその製造方法
JP2970085B2 (ja) 半導体装置
JP4084508B2 (ja) 回路基板