JPH0427709B2 - - Google Patents

Info

Publication number
JPH0427709B2
JPH0427709B2 JP57091296A JP9129682A JPH0427709B2 JP H0427709 B2 JPH0427709 B2 JP H0427709B2 JP 57091296 A JP57091296 A JP 57091296A JP 9129682 A JP9129682 A JP 9129682A JP H0427709 B2 JPH0427709 B2 JP H0427709B2
Authority
JP
Japan
Prior art keywords
gate electrode
silicon layer
forming
oxide film
melting point
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP57091296A
Other languages
English (en)
Japanese (ja)
Other versions
JPS58209156A (ja
Inventor
Hideo Oikawa
Oku Kuraki
Tsuneo Mano
Kazuhide Kiuchi
Ban Nakajima
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon Telegraph and Telephone Corp
Original Assignee
Nippon Telegraph and Telephone Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Telegraph and Telephone Corp filed Critical Nippon Telegraph and Telephone Corp
Priority to JP57091296A priority Critical patent/JPS58209156A/ja
Publication of JPS58209156A publication Critical patent/JPS58209156A/ja
Publication of JPH0427709B2 publication Critical patent/JPH0427709B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B20/00—Read-only memory [ROM] devices

Landscapes

  • Formation Of Insulating Films (AREA)
  • Semiconductor Memories (AREA)
JP57091296A 1982-05-31 1982-05-31 半導体装置の製造方法 Granted JPS58209156A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57091296A JPS58209156A (ja) 1982-05-31 1982-05-31 半導体装置の製造方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57091296A JPS58209156A (ja) 1982-05-31 1982-05-31 半導体装置の製造方法

Publications (2)

Publication Number Publication Date
JPS58209156A JPS58209156A (ja) 1983-12-06
JPH0427709B2 true JPH0427709B2 (enrdf_load_stackoverflow) 1992-05-12

Family

ID=14022502

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57091296A Granted JPS58209156A (ja) 1982-05-31 1982-05-31 半導体装置の製造方法

Country Status (1)

Country Link
JP (1) JPS58209156A (enrdf_load_stackoverflow)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0618257B2 (ja) * 1984-04-28 1994-03-09 富士通株式会社 半導体記憶装置の製造方法
JP2588732B2 (ja) * 1987-11-14 1997-03-12 富士通株式会社 半導体記憶装置

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS53108392A (en) * 1977-03-04 1978-09-21 Hitachi Ltd Semiconductor device
JPS55154762A (en) * 1979-05-22 1980-12-02 Chiyou Lsi Gijutsu Kenkyu Kumiai Semiconductor memory
JPS609348B2 (ja) * 1979-12-28 1985-03-09 富士通株式会社 半導体装置の製造方法
JPS56111256A (en) * 1980-01-31 1981-09-02 Chiyou Lsi Gijutsu Kenkyu Kumiai Semiconductor memory device
US4409722A (en) * 1980-08-29 1983-10-18 International Business Machines Corporation Borderless diffusion contact process and structure

Also Published As

Publication number Publication date
JPS58209156A (ja) 1983-12-06

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