JPH0425037A - 半導体素子 - Google Patents

半導体素子

Info

Publication number
JPH0425037A
JPH0425037A JP2126188A JP12618890A JPH0425037A JP H0425037 A JPH0425037 A JP H0425037A JP 2126188 A JP2126188 A JP 2126188A JP 12618890 A JP12618890 A JP 12618890A JP H0425037 A JPH0425037 A JP H0425037A
Authority
JP
Japan
Prior art keywords
bonding
electrode pad
semiconductor device
electrode
area
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2126188A
Other languages
English (en)
Inventor
Shinichi Nagai
信一 永井
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Kyushu Ltd
Original Assignee
NEC Kyushu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Kyushu Ltd filed Critical NEC Kyushu Ltd
Priority to JP2126188A priority Critical patent/JPH0425037A/ja
Publication of JPH0425037A publication Critical patent/JPH0425037A/ja
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02—Bonding areas ; Manufacturing methods related thereto
    • H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L24/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/0212—Auxiliary members for bonding areas, e.g. spacers
    • H01L2224/02122—Auxiliary members for bonding areas, e.g. spacers being formed on the semiconductor or solid-state body
    • H01L2224/02163—Auxiliary members for bonding areas, e.g. spacers being formed on the semiconductor or solid-state body on the bonding area
    • H01L2224/02165—Reinforcing structures
    • H01L2224/02166—Collar structures
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/04042—Bonding areas specifically adapted for wire connectors, e.g. wirebond pads
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/0555—Shape
    • H01L2224/05556—Shape in side view
    • H01L2224/05557—Shape in side view comprising protrusions or indentations
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484—Connecting portions
    • H01L2224/4845—Details of ball bonds
    • H01L2224/48451—Shape
    • H01L2224/48453—Shape of the interface with the bonding area
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484—Connecting portions
    • H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/78—Apparatus for connecting with wire connectors
    • H01L2224/7825—Means for applying energy, e.g. heating means
    • H01L2224/783—Means for applying energy, e.g. heating means by means of pressure
    • H01L2224/78301—Capillary
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01033—Arsenic [As]

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Wire Bonding (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は半導体素子に関し、 ドの形状に関する。
〔従来の技術〕
従来の半導体素子は、 第５図の様に、 特にその電極パラ 各種導電 型の半導体層を組合せて成る能動領域（図示省略）と、
能動領域に接続した配線と、配線５に接続して設けられ
、外部端子と接続するホンティングワイヤか接続される
電極パッド３とを有する構造になっており、外部端子に
ボンデインクワイヤで接続するための電極パッド３は、
その表面か平坦な形状となっていた。
〔発明が解決しようとする課題〕
上述した従来の半導体素子の電極パッドは、外部端子と
接続するためのホンティングワイヤのボール径か小さく
なるとポールと電極の接合面積か小さくなり接合不良を
引き起すという欠点かある。
本発明は上述のような問題点を解決することを目自勺と
したもので′ある。
〔課題を解決するための手段〕
本発明の半導体素子は、その電極バット表面に１つもし
くは複数の凸形状を有している。
〔実施例〕
次に本発明について図面を参照して説明する。
第１図は本発明の一実施例の断面図である。第２図は上
面図である。半導体素子の論理回路（図示省略）の配線
５上に形成された電極パッド３に図の様に凸部３ａを設
ける事によってキャピラリ１てボンティングワイヤ２と
電極パッド３を圧着する接合面積を増やし、接合強度を
増す事ができるため、半導体素子の縮小化に伴う電極パ
ッドの縮小化に対してボンデインク圧着圧を小さくしな
けれはならない場合に発生ずる接合不良を防止できる。
又、キャピラリ１がボンデインクワイヤ２に圧力を負荷
する部位は、第３図の様に環状であるためこの環状の部
位４に凸部の段差部分を配置する事によって効果的に接
合面積を増やし、接合強度を増加させる事かできる。
第４図は本発明の実施例２の断面図である。この実施例
は、凸部を複数化したちのて、接合強度を更に増す事か
可能である。
〔発明の効果〕 以上説明したように本発明は、半導体素子の電極パラ１
へに凸部を設ける事によってボンデインクワイヤと電極
バットの接合面積を増やし、ホンティンク°ワイヤと電
極バットの接合強度を増すことによって接合不良を防止
できる効果がある。
【図面の簡単な説明】
第１図、第４図は、本発明の半導体素子の電極パラ１へ
の断面図、第２図は、第１図の」二面図、第３図は、接
合部位を示す図、第５図は、従来の半導体素子の電極バ
ットの断面図である。 ］・・・キャピラリ、２・・ホンディングワイヤ、３・
・・電極パッド、５・・・配線。

Claims (1)

    【特許請求の範囲】
  1. 　各種導電型の半導体層を組合せて成る能動領域と、能
    動領域に接続した配線と、配線に接続して設けられ、外
    部端子と接続するボンディングワイヤが接続される電極
    パッドとを有する半導体素子において、前記電極パッド
    表面に１つもしくは複数個の凸形状を設けた事を特徴と
    する半導体素子。
JP2126188A 1990-05-16 1990-05-16 半導体素子 Pending JPH0425037A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2126188A JPH0425037A (ja) 1990-05-16 1990-05-16 半導体素子

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2126188A JPH0425037A (ja) 1990-05-16 1990-05-16 半導体素子

Publications (1)

Publication Number Publication Date
JPH0425037A true JPH0425037A (ja) 1992-01-28

Family

ID=14928874

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2126188A Pending JPH0425037A (ja) 1990-05-16 1990-05-16 半導体素子

Country Status (1)

Country Link
JP (1) JPH0425037A (ja)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007134418A (ja) * 2005-11-09 2007-05-31 Matsushita Electric Ind Co Ltd 半導体実装方法

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007134418A (ja) * 2005-11-09 2007-05-31 Matsushita Electric Ind Co Ltd 半導体実装方法

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