JPH04229648A - 所定のエミッタ領域を有するトランジスタおよびその製作方法 - Google Patents

所定のエミッタ領域を有するトランジスタおよびその製作方法

Info

Publication number
JPH04229648A
JPH04229648A JP3210424A JP21042491A JPH04229648A JP H04229648 A JPH04229648 A JP H04229648A JP 3210424 A JP3210424 A JP 3210424A JP 21042491 A JP21042491 A JP 21042491A JP H04229648 A JPH04229648 A JP H04229648A
Authority
JP
Japan
Prior art keywords
emitter electrode
electrode region
region
conductivity type
predetermined
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3210424A
Other languages
English (en)
Japanese (ja)
Inventor
Hiroshi Sakamoto
弘 坂本
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Motorola Solutions Japan Ltd
Original Assignee
Nippon Motorola Ltd
Motorola Japan Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Motorola Ltd, Motorola Japan Ltd filed Critical Nippon Motorola Ltd
Publication of JPH04229648A publication Critical patent/JPH04229648A/ja
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D10/00Bipolar junction transistors [BJT]
    • H10D10/01Manufacture or treatment
    • H10D10/051Manufacture or treatment of vertical BJTs
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/0107Integrating at least one component covered by H10D12/00 or H10D30/00 with at least one component covered by H10D8/00, H10D10/00 or H10D18/00, e.g. integrating IGFETs with BJTs
    • H10D84/0109Integrating at least one component covered by H10D12/00 or H10D30/00 with at least one component covered by H10D8/00, H10D10/00 or H10D18/00, e.g. integrating IGFETs with BJTs the at least one component covered by H10D12/00 or H10D30/00 being a MOS device
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/02Manufacture or treatment characterised by using material-based technologies
    • H10D84/03Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
    • H10P76/40

Landscapes

  • Bipolar Transistors (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
JP3210424A 1990-07-30 1991-07-29 所定のエミッタ領域を有するトランジスタおよびその製作方法 Pending JPH04229648A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US55977790A 1990-07-30 1990-07-30
US559777 1990-07-30

Publications (1)

Publication Number Publication Date
JPH04229648A true JPH04229648A (ja) 1992-08-19

Family

ID=24234978

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3210424A Pending JPH04229648A (ja) 1990-07-30 1991-07-29 所定のエミッタ領域を有するトランジスタおよびその製作方法

Country Status (2)

Country Link
EP (1) EP0469840A2 (OSRAM)
JP (1) JPH04229648A (OSRAM)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2011007699A1 (ja) * 2009-07-13 2011-01-20 ミツミ電機株式会社 半導体装置の製造方法及び半導体集積回路装置

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110676252B (zh) * 2019-09-12 2022-05-13 北京时代民芯科技有限公司 一种抗瞬时辐射加固的集成电路版图结构

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5460579A (en) * 1977-10-24 1979-05-16 Hitachi Ltd Semiconductor device
JPS6010642A (ja) * 1983-06-29 1985-01-19 Mitsubishi Electric Corp 半導体装置の製造方法
JPS6020571A (ja) * 1983-07-15 1985-02-01 Hitachi Ltd 半導体装置
JPS63142672A (ja) * 1986-12-05 1988-06-15 Hitachi Ltd 半導体装置
JPH021931A (ja) * 1988-06-09 1990-01-08 Fujitsu Ltd 半導体装置の製造方法

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0622238B2 (ja) * 1985-10-02 1994-03-23 沖電気工業株式会社 バイポ−ラ型半導体集積回路装置の製造方法
DE3680520D1 (de) * 1986-03-22 1991-08-29 Itt Ind Gmbh Deutsche Verfahren zum herstellen einer monolithisch integrierten schaltung mit mindestens einem bipolaren planartransistor.
EP0278619B1 (en) * 1987-01-30 1993-12-08 Texas Instruments Incorporated Integrated bipolar and CMOS transistor fabrication process

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5460579A (en) * 1977-10-24 1979-05-16 Hitachi Ltd Semiconductor device
JPS6010642A (ja) * 1983-06-29 1985-01-19 Mitsubishi Electric Corp 半導体装置の製造方法
JPS6020571A (ja) * 1983-07-15 1985-02-01 Hitachi Ltd 半導体装置
JPS63142672A (ja) * 1986-12-05 1988-06-15 Hitachi Ltd 半導体装置
JPH021931A (ja) * 1988-06-09 1990-01-08 Fujitsu Ltd 半導体装置の製造方法

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2011007699A1 (ja) * 2009-07-13 2011-01-20 ミツミ電機株式会社 半導体装置の製造方法及び半導体集積回路装置

Also Published As

Publication number Publication date
EP0469840A3 (OSRAM) 1995-02-01
EP0469840A2 (en) 1992-02-05

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