JPH0422061B2 - - Google Patents

Info

Publication number
JPH0422061B2
JPH0422061B2 JP10886383A JP10886383A JPH0422061B2 JP H0422061 B2 JPH0422061 B2 JP H0422061B2 JP 10886383 A JP10886383 A JP 10886383A JP 10886383 A JP10886383 A JP 10886383A JP H0422061 B2 JPH0422061 B2 JP H0422061B2
Authority
JP
Japan
Prior art keywords
bit
combination
accumulation
information
bits
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP10886383A
Other languages
English (en)
Japanese (ja)
Other versions
JPS601957A (ja
Inventor
Shinichi Fukuda
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sony Corp
Original Assignee
Sony Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Corp filed Critical Sony Corp
Priority to JP10886383A priority Critical patent/JPS601957A/ja
Publication of JPS601957A publication Critical patent/JPS601957A/ja
Publication of JPH0422061B2 publication Critical patent/JPH0422061B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B20/00—Signal processing not specific to the method of recording or reproducing; Circuits therefor
    • G11B20/10—Digital recording or reproducing
    • G11B20/14—Digital recording or reproducing using self-clocking codes
    • G11B20/1403—Digital recording or reproducing using self-clocking codes characterised by the use of two levels
    • G11B20/1423—Code representation depending on subsequent bits, e.g. delay modulation, double density code, Miller code
    • G11B20/1426—Code representation depending on subsequent bits, e.g. delay modulation, double density code, Miller code conversion to or from block codes or representations thereof

Landscapes

  • Engineering & Computer Science (AREA)
  • Signal Processing (AREA)
  • Signal Processing For Digital Recording And Reproducing (AREA)
  • Compression, Expansion, Code Conversion, And Decoders (AREA)
  • Dc Digital Transmission (AREA)
JP10886383A 1983-06-17 1983-06-17 情報変換方式 Granted JPS601957A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10886383A JPS601957A (ja) 1983-06-17 1983-06-17 情報変換方式

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10886383A JPS601957A (ja) 1983-06-17 1983-06-17 情報変換方式

Publications (2)

Publication Number Publication Date
JPS601957A JPS601957A (ja) 1985-01-08
JPH0422061B2 true JPH0422061B2 (es) 1992-04-15

Family

ID=14495492

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10886383A Granted JPS601957A (ja) 1983-06-17 1983-06-17 情報変換方式

Country Status (1)

Country Link
JP (1) JPS601957A (es)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2690154B2 (ja) * 1989-09-01 1997-12-10 日本電気ホームエレクトロニクス株式会社 １，５符号変調方法

Also Published As

Publication number Publication date
JPS601957A (ja) 1985-01-08

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