JPH0422060B2 - - Google Patents

Info

Publication number
JPH0422060B2
JPH0422060B2 JP7997183A JP7997183A JPH0422060B2 JP H0422060 B2 JPH0422060 B2 JP H0422060B2 JP 7997183 A JP7997183 A JP 7997183A JP 7997183 A JP7997183 A JP 7997183A JP H0422060 B2 JPH0422060 B2 JP H0422060B2
Authority
JP
Japan
Prior art keywords
bit
combination
conversion
information
accumulation
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP7997183A
Other languages
English (en)
Japanese (ja)
Other versions
JPS59204354A (ja
Inventor
Shinichi Fukuda
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sony Corp
Original Assignee
Sony Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Corp filed Critical Sony Corp
Priority to JP7997183A priority Critical patent/JPS59204354A/ja
Publication of JPS59204354A publication Critical patent/JPS59204354A/ja
Publication of JPH0422060B2 publication Critical patent/JPH0422060B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B20/00—Signal processing not specific to the method of recording or reproducing; Circuits therefor
    • G11B20/10—Digital recording or reproducing
    • G11B20/14—Digital recording or reproducing using self-clocking codes
    • G11B20/1403—Digital recording or reproducing using self-clocking codes characterised by the use of two levels
    • G11B20/1423—Code representation depending on subsequent bits, e.g. delay modulation, double density code, Miller code
    • G11B20/1426—Code representation depending on subsequent bits, e.g. delay modulation, double density code, Miller code conversion to or from block codes or representations thereof

Landscapes

  • Engineering & Computer Science (AREA)
  • Signal Processing (AREA)
  • Signal Processing For Digital Recording And Reproducing (AREA)
  • Dc Digital Transmission (AREA)
JP7997183A 1983-05-07 1983-05-07 情報変換方式 Granted JPS59204354A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7997183A JPS59204354A (ja) 1983-05-07 1983-05-07 情報変換方式

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7997183A JPS59204354A (ja) 1983-05-07 1983-05-07 情報変換方式

Publications (2)

Publication Number Publication Date
JPS59204354A JPS59204354A (ja) 1984-11-19
JPH0422060B2 true JPH0422060B2 (es) 1992-04-15

Family

ID=13705204

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7997183A Granted JPS59204354A (ja) 1983-05-07 1983-05-07 情報変換方式

Country Status (1)

Country Link
JP (1) JPS59204354A (es)

Also Published As

Publication number Publication date
JPS59204354A (ja) 1984-11-19

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