JPH0420635B2 - - Google Patents

Description

[Detailed description of the invention] Technical field and purpose This purpose relates to a pachinko machine in which the opening of a predetermined winning pocket is controlled by the winning conditions of winning balls, and the purpose is to control the opening of a predetermined winning pocket according to the winning conditions of winning balls, and the purpose is to control the opening of a predetermined winning pocket according to the winning conditions of the winning balls. Even if the program that controls the opening of the prize pocket is broken for some reason, the game can be continued using the program data prepared in advance for backup. To provide a pachinko machine capable of preventing troubles.

Embodiment Hereinafter, an embodiment of a pachinko machine embodying the present invention will be described with reference to the drawings.

FIG. 1 is a front view of a pachinko machine 1, in which four seven-segment type numerical displays (hereinafter referred to as LEDs) 3a to 3d are provided in the center of the game board 2, and on both sides and On the bottom side
GO chasers 4a, 4b, and 4c are provided. The center pocket 5 is the lower GO chaser 4.
An opening/closing door 5a provided on the lower side of the center pocket 5 moves to open and close, and when it is open, it is possible to win a pachinko ball, and when it is closed, it is impossible to win a pachinko ball. The four winning lamps (hereinafter referred to as V lamps) 6 are respectively
They are arranged on both sides of the LED 3a and on both sides of the central pocket 5. The push button switch 7 is an operation handle 8 for firing balls of the pachinko machine 1, and a ball tray 9.
etc. are provided on the right side of the front frame 10 where
It is used to control the display operation stop timing of each of the LEDs 3a to 3d.

Next, the LEDs 3a to 3d, the center pocket 5
A control device for driving and controlling the opening/closing door 5a, winning lamp 6, etc. will be explained with reference to FIG.

FIG. 2 shows an electric block circuit diagram of a control device built into a pachinko machine, in which a center pocket winning detection micro switch (hereinafter referred to as pocket winning switch) 11 connects to a winning ball passage (not shown) communicating with the central pocket 5. ) to detect a pachinko ball that has won a prize in the center pocket 5. A chuck car winning detection micro switch (hereinafter referred to as a chuck car winning switch) 12 is provided in a winning ball path (not shown) communicating with each of the GO chuck cars 4a to 4c, and detects a pachinko ball that has won a prize in the GO chuck cars 4a to 4c. .

The switch detection circuit 13 detects each winning switch 1.
Input the detection signals SG1, SG2 of 1 and 12 and the on signal SG3 of the push button switch 7, and
This circuit removes noise and shapes the waveforms of SG1 to SG3 and outputs them to the next stage control circuit 14, and is specifically constructed of a circuit as shown in FIG.
The clock circuit 15 outputs a clock signal SG4 having a 2 MHz pulse waveform to the control circuit 14 at the next stage.
The reset circuit 16 inputs the pulse signal from the clock circuit 15 and resets the clock to 4.2m based on the pulse signal.
The reset signal SG5 is sent to the next stage control circuit 14 every second.
Output to. The clock circuit 15 and the reset circuit 16 are specifically constructed as shown in FIG. Power supply circuit 17 is 9V
A 5V DC power source is generated from the AC power source, and a 24V DC power source is generated from the 24V AC power source, and is supplied to each circuit as an operating power source.Specifically, it consists of the circuit shown in Figure 7. ing.

The control circuit 14 is a central processing unit (CPU) and receives detection signals SG1 and SG2 from the detection circuit 13.
and on signal SG3, and clock signal SG4 from clock circuit 15 and reset circuit 16, respectively.
and reset signal SG5 are input, and each of these signals
Arithmetic processing operations are performed in response to SG1 to SG5. A read-only memory (hereinafter referred to as ROM) 18 stores a control program. The readable and rewritable memory (hereinafter referred to as RAM) 19 is composed of 4 bits for each address, and has a program storage area (addresses 000 to 70F) that stores operating programs.
and a data storage area (addresses 800 to BF1) for storing various data as shown in FIG. This data storage area stores the same contents as the main data as backup data if the main data storage area (addresses 800 to 81D) and its main data are corrupted for some reason and incorrect contents are written. The first backup data storage area (addresses 980 to 991) and the second
Backup data storage area (BE0 to BF1
It consists of the street address).

The display drive circuit 20 controls each of the LEDs 3a to 3 based on the display control signal SG6 from the control circuit 14.
Specifically, it is constructed of a circuit shown in FIG. 4. The speaker drive circuit 21 receives the sound control signal from the control circuit 14.
Based on the SG7, a speaker 22 provided on the back side of the game board 2 of the pachinko machine 1 is made to sound, and is specifically constructed of a circuit shown in FIG.

The solenoid drive circuit 23 is configured to actuate and control a solenoid 24 provided on the back surface of the game board 2 to open and close the opening/closing door 5a of the central pocket 5 based on the excitation control signal SG8 from the control circuit 14. Specifically, it is composed of a circuit shown in FIG. The lamp drive circuit 25 is adapted to control the lighting of the V lamp 6 provided on the game board 2 based on the lighting control signal SG9 from the control circuit 14, and specifically, it is a circuit shown in FIG. It is configured.

Next, the operation of the pachinko machine configured as described above will be explained with reference to flowcharts of the arithmetic processing operations in the control circuit 14 shown in FIGS. 9 to 15.

When the power is turned on now, the control circuit 14 starts operating according to the flowchart shown in FIG.
The control circuit 14 stores the start data (RCHK1) with the contents of (05AH) in this embodiment at addresses 800 and 801 of the RAM 19, and the end data (RCHK1) with the contents of "0A5H" in this embodiment at addresses 81C and 81D.
2) is written (start/end data check). In this case, since nothing is written to each address when the power is turned on, the control circuit 14 next
In this embodiment, the backup 2 start data (BKUPD
2) is written (backup 2 start data check). Then, since it is not written in the same manner as above, the control circuit 14
Next, in this example, "05AH" is added to addresses 980 and 981.
Determine whether backup start data (BKUPD) with the contents of has been written (backup start data check). Then, as described above, since the data has not been written, the control circuit 14 moves to a routine (initialization routine) for initializing the main data.

When proceeding to the initial setting routine, the control circuit 14 first performs data in the main data storage area of the RAM 19.
Clear various data from address 808 to address 80F.
Next, the control circuit 14 selects the LED 3 at address 80C from the value of the 6-bit refresh counter in the circuit 14, which is randomly set at the same time as the power is turned on.
Left LED data (LED
0), middle LED data (LED1) for displaying numerical values on the LEB3b at address 80D, LED at address 80E
The right LED data (LED2) for displaying a numerical value on LED 3c and the upper LED data (LED3) for displaying a numerical value on the LED 3d at address 80F are obtained. That is, the control circuit 14 uses the contents of bits 5 and 6 of the 6-bit refresh counter to control the left LED data, the contents of bits 4 and 5 to control the middle LED data, and the contents of bits 4 and 5 to control the middle LED data. Use the contents of 3 to change the right LED data, and use the contents of bits 0 and 1 to change the upper right LED data.
Create each LED data and store it at each predetermined address.

In this embodiment, in this initial setting, each data is subjected to arithmetic processing in advance so that all of the LEDs 3a to 3d do not display "7".

When the initial setting routine is completed, the control circuit 14 next determines whether there is an abnormality in the main data (main data abnormality check). That is,
The control circuit 14 determines whether each of the LED data and the contents of the fever flag (FVRF) at address 80A (contents of "0FH" during fever, "0" otherwise) are abnormal, and if abnormal, program operation is performed. and reset signal SG from reset circuit 16.
5 is input, and if there is no abnormality, the next checksum calculation and store routine is executed.

Moving to the checksum calculation and store routine, the control circuit 14 first adds each data value in the main storage area (addresses 802 to 80F), and stores the added value (checksum) in the checksum data (addresses 810 and 811 of the RAM 19). CHKSM).

Next, the control circuit 14 performs a start and end data set routine, that is, sets the start data with the contents of "05AH" to the addresses 800 and 801, and
After writing end data with the contents of "0A5H" to addresses 81C and 81D, the backup data creation routine is executed. Then, in the backup data creation routine, the control circuit 14
backs up the start data of addresses 800 and 801 to addresses 980 and 981 (BKUPD)
Also, the main data at addresses 802 to 80F is stored as backup data (BCKUP) in the first backup data storage area at addresses 982 to 98F, and the checksum data at addresses 810 and 811 are stored at addresses 990 and 991. Write processing is performed as backup checksum data (BCHKSM).

Next, the control circuit 14 executes the backup 2 data creation routine and stores the above data at addresses BE0 and BE1.
Backup start data for addresses 800 and 801 2
As start data (BKUPD2), address BE2 to BEF of the second backup data storage area
The main data from addresses 802 to 80F is stored as backup 2 data (BCKUP2), and further
After writing the checksum data at addresses 810 and 811 to addresses BF0 and BF1 as backup 2 checksum data (BCKSM2), the next operation is stopped until the reset signal SG5 is input from the reset circuit 16.

Eventually, when the first reset signal SG5 is output from the reset circuit 16 which has started operating together with the clock circuit 15 which operates at the same time as the power is turned on, the control circuit 14 is reset again and performs the start-end check again. In this case, since the start data and end data have already been stored, it is next determined whether the checksum data described above is correct (checksum check).

This check sum check is 802 of RAM19.
Add each data value from address to address 80F, and the value is
Check whether it matches the checksum data at addresses 810 and 811. If they match, the process moves to the start and end data clear routine to be described later; on the other hand, if the contents of the main data in the RAM 19 are corrupted due to some reason (such as noise) and they do not match, the backup 2 start data check is performed. . In that case, since the backup 2 start data with the content "05AH" has already been stored at addresses BE0 and BE1 as described above, the control circuit 14 next determines whether the backup 2 data described above is correct ( Backup 2 Check Sum Check).

The control circuit 14 adds each data value at addresses BE2 to BEF and determines whether the added value matches the backup 2 checksum data at addresses BF0 and BF1. If they match, it is determined that the contents of the backup 2 data are not corrupted, and
After the main data is rewritten to the contents of the backup 2 data, the process moves to the start and end data set routine described above. On the other hand, if the contents of the backup 2 data are corrupted for some reason and do not match the backup 2 data, the control circuit 1
Step 4 performs the backup start data check described above.

In this case, since the backup start data has already been stored as described above, the control circuit 14 determines whether the backup data described above is correct (backup check sum check). The control circuit 14 is operated in the same manner as described above.
The data at addresses 982 to 98F are added, and it is determined whether the added value matches the contents of the backup check sum data at addresses 990 and 991.

If they do not match, it is determined that the backup data is also corrupted, and the process proceeds to the initial setting routine described above.On the other hand, if they match, it is determined that the backup data is normal, and the main data is replaced with the backup data. After rewriting the contents, the process moves to the start and end set routine described above.

The arithmetic processing operation of the control circuit 14 described above is always executed when the main data in the RAM 19 is corrupted for some reason, so even if the main data is corrupted for some reason, the correct backup data can be immediately restored. Since the compensation is provided, unnecessary troubles will not occur during the game.

It should be noted that when the control circuit 14 receives the reset signal SG5 from the reset circuit 16, even if it is in the middle of performing the processing operation, it is reset and the processing operation is performed again from the beginning, so the processing operation is performed as soon as the reset signal SG5 is input. All operations are completed between the output of SG5 and the output of the next reset signal SG5.

When the main data is normal and the reset signal SG5 is output from the reset circuit 16,
After performing the start/end data check and checksum check, the control circuit 14 moves to a start/end data clear routine.
Start data for addresses 800 and 801 and 81C and 81
Clear the end data of D. Next, control circuit 1
4 performs timer value calculation processing and adds 4.2m to the contents of the first timer data (TIMER1) at addresses 804 and 805.
sec, and 1072.2 (=4.2) to the contents of the second timer data (TIMER2) at addresses 802 and 803.
msec×256) Add “-1” every msec.
By this first and second timer data, 275 (=
You can set the time up to 1072.2msec x 256)sec,
Opening time (6 seconds) of the opening/closing door 5a of the central pocket 5 other than fiber, opening time (30 seconds) of the opening/closing door 5a of the central pocket 5 during fiber, opening/closing in case of successive wins in the GO chaser 6. The time (2 seconds) for the numbers on LEDs 3a to 3d to start rotating after the door 5a closes and the GO chatter 4a
~4c When a prize is won, the numbers on LEDs 3a to 3d start rotating, and the time until the numbers automatically stop when the push button switch 7 is not pressed (12
seconds), etc.

The control circuit 14 then adds "1" to the contents of the fourth timer data (TIMER4) at address 81A every 4.2 msec.
, the fifth timer data (TIMER5) at address 819
"1" every 67 (=4.2msec x 16) msec in the content of
Add. The fourth and fifth timer data are random numbers, displays on the LEDs 3a to 3d, and switches 7,
This is used to set the input timing of 11 and 12.

Next, the control circuit 14 moves to the SW input processing operation, and after first clearing the contents of the SW flag (SWF) at address 813, the switch detection circuit 13 sends a detection signal to each of the switches 7, 11, and 12 every 8.4 msec. Detect the presence or absence of SG1 to SG3. When the detection signal SG2 from the checker prize switch 12 is received, bit 4 is set to "1", and when the on signal SG3 from the push button switch 7 is received, bit 3 is set to "1", and the pocket prize switch 11 is set to "1". When the detection signal SG1 from the
After determining whether SG1 to SG3 are true detection signals other than noise or the like, the contents are stored in the SW valid flag (SWU) at address 812.

Next, the control circuit 14 moves to LED display processing operation,
Numbers based on each LED data stored at addresses 80C to 80F are displayed on the LEDs 3a to 3d. Then, based on the fourth timer data at address 81A, control is performed so that the displays of the LEDs 3a to 3d are not displayed at the same time.

Next, the control circuit 14 moves to the solenoid, sound, and lamp output processing operation, and the solenoid 2 at addresses 806 and 807
4. Read output data (OUTD) for driving the speaker 22, lamp 6, etc., and drive the solenoid 24 and speaker 2 based on the data.
2 and the lamp 6 are driven or not driven. Next, the control circuit 14 determines whether a pachinko ball has won a prize in the GO chasers 4a to 4c (GO input check). In the GO input check, the control circuit 14 reads the contents of the SW flag (SWF) at address 813, and when it is "1", adds "1" to the contents of the winning number data (GONUM) at address 809, and then
If it is "0", a command check is performed immediately.
In this case, there is no prize, so move immediately to command check.

Command check is LED rotation check,
It consists of LED STOP check, LED judgment check, one shot check, fiber check, and delay check, and each check is performed based on the contents of the command data (JAPAD) at address 808. When the command data content is "0", the solenoid, sound, and lamp outputs are immediately turned off.
Processing: LED rotation processing when "1", LED STOP processing when "2", LED judgment processing when "3", one shot processing when "4", fiber judgment processing when "5", and "6" Delay processing is executed respectively. The content of this data becomes "1" if there is a prize in the GO chaser 4a to 4c, and each time the above-mentioned processes are sequentially performed, "1" is added to specify the next processing operation, and "6" is added. When the delay processing of `` is completed, the content is set to ``0'' again and the player waits for the next prize winning.

Currently, there is no prize winning and the command data content is "0".
At this time, the control circuit 14 moves to the solenoid, sound, and lamp output OFF processing operation, and after holding the solenoid 24, speaker 22, and lamp 6 not to be driven until a winning occurs, the winning ball is checked next. This check is performed based on the winning number data at address 809 performed in the GO input addition processing operation, and in this state it is "0", so after executing the main data abnormality check, checksum calculation, store routine, etc., the game stops. Then it waits for the next reset signal SG5.

Thereafter, this processing operation is repeated until the GO chasers 4a to 4c win a prize.

Next, a case where a pachinko ball wins a prize in any of the GO chasers 4a to 4c will be explained.

If a prize is won during the processing operation, the control circuit 14
detects the detection signal SG2 from the chucker winning switch 12 in the SW input processing operation, sets the content of bit 3 of the SW flag to "1", and then sets the content of the winning number data to "1". and,
Next, the content of the command data is set to "1".

Based on this command data, the control circuit 14 executes the LED rotation processing operation shown in FIG.
First, the control circuit 14 outputs a drive signal to the speaker drive circuit 21 to make the speaker 22 sound, and also outputs a drive signal to the lamp drive circuit 25 to cause the lamp 6 to blink. At this time, the contents of the LED rotation flag (LEDMF) at address 814 are all set to "1", and the numerical displays of LEDs 3a to 3d are rotated.

Next, the control circuit 14 reads the contents of the LED rotation flag and performs an LED rotation check. In this case, the contents of the flag are all "1" and the rotation is being displayed.
The third timer data (TIMER3) at address 81B is set and "1" is added every 4.2 msec, and the display changes (rotates) every 50 msec based on the contents. Next, the control circuit 14 performs a stop SWON check, that is, determines whether or not the push button switch 7 has been turned on, based on the contents of bit 3 of the SW flag.

If the switch 7 is not turned on, a check (STOPTIME check) is made to see if 12 seconds have passed since the prize was won based on the first and second timer data, and if 12 seconds have still elapsed. If not, after executing the data abnormality check, checksum calculation, store routine, etc., it stops and waits for the next reset signal SG5.
Conversely, when the pushbutton switch 7 is pressed and the contents of bit 3 of the SW flag become "1", or when the 12 seconds have elapsed, each LED 3a to 3d is turned off.
Determine the stop time of the rotating display, and use the stop time data of addresses 815 to 818 (LSTP
0, LSTP1, LSTP2, LSTP3), increment the command data to "2" to start the next LEDSTOP process, and then execute the main data abnormality check, checksum calculation, store routine, etc. It stops and waits for the next reset signal SG5.

When the reset signal SG5 is output in the state of command data "2", the control circuit 14 performs the command shown in FIG. 11 by the command check.
Execute LEDSTOP processing. Checks the LED rotation based on the contents of the rotation flag, and
When the LEDs 3a to 3d reach the rotation stop time, immediately check LEDSTOP, and if they are rotating in the opposite direction, check whether the flag is "1" or not, and then rotate the display of LEDs 3a to 3d by one, respectively. Execute check at LEDSTOP.

Based on the stop time data, if the rotation stop time has not been reached, the control circuit 14 immediately executes the above-described main data abnormality check, stops, and waits for the next reset signal. On the other hand, when the stop time is reached, the stop time data is decremented, and then it is checked whether all the LEDs 3a to 3d have stopped, and the LED rotation flag is shifted to "0", and then the next LED judgment process is performed. To start, increment the command data to "3", execute the above-mentioned main data abnormality check, etc., stop, and send the next reset signal SG5.
have.

Next, in the command check, the control circuit 14
executes the LED determination processing operation shown in FIG.
First, check whether all four LEDs 3a to 3d are displaying "7". When all "7" are displayed, the fiber flag (FVRF) at address 80A is set to "1" and the second timer data is set to 30 seconds.
The speaker 22 and solenoid 24 are driven for 30 seconds. Therefore, during this time, the central pocket 5 is held open and the speaker 22 continues to sound.

On the other hand, if all LEDs 3a to 3d are not "7", then check whether LEDs 3a to 3d are all numbers other than "7", and if they are all numbers other than "7", the control circuit 14 sets the second timer data to 6 seconds, then the speaker 22
And the solenoid 24 is driven for 6 seconds. Therefore, in this case, the central pocket 5 is held open for 6 seconds and the speaker 22 is turned on.

Furthermore, in other cases, after setting the second timer data to 0.6 seconds, the speaker 22 and solenoid 24 are driven for 0.6 seconds. Therefore, in this case, the central pocket 5 is held open for 0.6 seconds and the speaker 22 is turned on.

After driving the speaker 22 and solenoid 24 under each of these conditions, the command data is incremented to "4" and the above-mentioned main data abnormality check etc. is executed again in order to start the next line shot process. It then stops and waits for the next reset signal SG5.

Next, in the command check, the control circuit 14
executes the one-shot processing operation shown in FIG. First, the control circuit 14 performs a fiber check based on the contents of the fiber flag. When the fever flag is "0", it is checked whether the 6 seconds or 0.6 seconds set in the second timer data has been reached (timer completion check), and if the time has not elapsed, the main data abnormality check is performed. etc., then stops and waits for the next reset signal SG5.

Also, when the elapsed time has elapsed, set the command data to "5" in order to start the next fever continuation judgment process.
Increment to 1, execute the main data abnormality check, etc. described above, stop, and then issue the next reset signal.
Waiting for SG5.

On the other hand, when it is determined that a fever is occurring based on the content of the fever flag "1", the control circuit 14
After resetting the display of each LED 3a to 3d to "7" and blinking the lamp 6, it is checked whether a pachinko ball has landed in the center pocket 5 or not. This check is for bit 2 of the SW flag.
is determined to be "1" based on the detection signal SG1. Then, when the detection signal SG1 is not output, the timer completion check is executed.

Moreover, when the detection signal SG1 is output,
Check whether the lamp 6 is lit, and if it is lit, check the timer completion check.
Conversely, if it is not lit, this processing operation is 10
It is checked whether it is the 10th time or not, and when it is 10 times or more, the lamp 6 is turned on and the process moves to a timer completion check. In this timer completion check, it is checked whether the opening stop time has been reached, and when it is determined that the opening stop time has been reached, a processing operation is executed to start the fiber continuation processing.

Next, in the command check, the control circuit 14
executes the fiber continuation determination processing operation shown in FIG. First, it is checked whether the lamp 6 is lit, and if it is not lit, the fiber flag is reset. If it is lit, the fiber flag is set, and then the lamp 6, speaker 22, and solenoid 24 are driven. make it stop. Next, the control circuit 14 sets the second timer data to 2 seconds, increments the command data to "6", executes the main data abnormality check, etc., and then stops in order to start the next delay process. Wait for the next reset signal SG5.

Next, in the command check, the control circuit 14
executes the delay processing operation shown in FIG.
First, the lamp 6, speaker 22 and solenoid 24
At the same time, it is checked whether the timer data has timed up or not. If the timer data has not timed up, it immediately performs an abnormality check, etc., and stops, and waits for the next reset signal SG5. Also, when the time has expired, it is checked whether or not fiber is in effect based on the contents of the fiber flag.

Then, if it is not in fever, the command data is set to "0", and if it is in fever, it sets the second timer data to 30 seconds, drives the speaker 22 and lamp 6 again, and then repeats the one-shot process. To start, set the content of the command data to "4". Therefore, if a prize is won in the center pocket 5 during a fever, the center pocket 5 will remain open for 30 seconds.

Then, when the command data becomes "0" and a command check is performed, the aforementioned GO input memory check is performed again. That is,
If the GO chasers 4a to 4c win a prize during the processing operation, and the winning number data is added by that number, first, the content "1" of the winning number data is decremented and the LED rotation flag is set. Next, the control circuit 14 sends the second timer data.
After setting it to 12 seconds, set the command data to ``1'' to start the LED rotation process again. Therefore, the arithmetic processing operation is thereafter executed again in the same manner as described above until the content of the winning number data becomes "0".

In this way, in this embodiment, when the control circuit 14 executes the arithmetic processing operation based on each data for the pachinko game, the control circuit 14 performs a calculation operation every 4.2 msec.
Then, check whether each data has been corrupted due to some reason such as noise, and if it is corrupted, the first data stored in advance for backup is checked.
Since the control circuit 14 executes arithmetic processing operations based on the second backup data, the game is not disabled during the game, and unnecessary trouble with the players can be prevented.

In this embodiment, two sets of data for backup (backup data and backup 2 data) are prepared to ensure against accidents, but these may be combined into one set. In addition, in this example, each
The pachinko machine that controls the opening time of the opening/closing door 5a based on the display status of the LEDs 3a to 3d has been described.
The present invention may be modified as appropriate without departing from the spirit of the present invention, such as by applying this to pachinko machines with other game types.

As described in detail above, the present invention includes a chuck car winning switch 12 that detects a pachinko ball that has entered the chuck car 4, a central pocket 5 that is equipped with an opening/closing door 5a, and allows a pachinko ball to win only when the door 5a is opened. A solenoid 24 that opens and closes the opening/closing door 5a, and a solenoid 24 provided in the data storage area of the RAM 19 under predetermined conditions based on a detection signal from the chucker winning switch 12.
a first memory 19 storing main data for driving and controlling 4; reading the main data from the first memory 19 based on the detection signal;
Based on the main data, the solenoid 24
In a pachinko machine equipped with a drive control circuit 14 that drives the RAM 1, a reset circuit 16 outputs a reset signal at predetermined time intervals, and a
a second memory 19 which is provided in the data storage area of 9 and stores data having the same contents as the main data during normal operation as backup data; Furthermore, a data abnormality detection control circuit 14 is provided which determines whether the main data is normal or not, and when it is not normal, rewrites the main data with the contents of the backup data. Even if the data used to execute the game is corrupted, the occurrence of the data corruption accident can be detected as appropriate each time a periodic reset signal is input, and the data can be immediately backed up using the backup data stored in advance. Therefore, in the event of destruction of pachinko machine control data, backup processing can be carried out quickly before a situation occurs that would lead to a system failure of the control function of the entire pachinko machine, which would lead to the interruption of the player's playing. Since the second memory that stores data is provided in the same RAM data storage area as the first memory that stores main data, the configuration for backup data preservation can be simplified and the power supply etc. can be shared. This has the effect of reducing the physical and economic costs of the entire pachinko machine.

[Brief explanation of drawings]

Fig. 1 is a front view of a pachinko machine embodying this invention, Fig. 2 is an electric block circuit diagram, Fig. 3 is a circuit diagram showing a switch detection circuit, a clock circuit, a reset circuit, and a control circuit. Display drive circuit diagram, Figure 5 is a speaker drive circuit diagram, Figure 6 is a circuit diagram showing a solenoid drive circuit and lamp drive circuit, Figure 7 is a power supply circuit diagram, and Figure 8 is a map diagram showing the memory contents of RAM. , FIGS. 9 to 15 are flowcharts for explaining the operation of the control circuit. Pachinko machine...1, Numerical display (LED)...
3a to 3d, GO chaser...4a to 4c, center pocket...5, center pocket winning detection micro switch (pocket winning switch)...11,
Cheer car winning detection micro switch (chuck car winning switch)...12, control circuit...14,
Reset circuit...16, ROM...18, RAM
...19, Speaker...22, Solenoid...2
4.

Claims (1)

[Scope of Claims] 1. A player winning switch 12 that detects a pachinko ball that has entered the player 4; a center pocket 5 that includes an opening/closing door 5a and allows winning of a pachinko ball only when the door 5a is opened; Solenoid 2 that opens and closes the door 5a
4, a first memory 19 that is provided in a data storage area of the RAM 19 and stores main data for driving and controlling the solenoid 24 under predetermined conditions based on the detection signal from the chucker winning switch 12; A pachinko machine comprising a drive control circuit 14 that reads the main data from a first memory 19 based on the detection signal and drives the solenoid 24 based on the main data, wherein a reset signal is generated at predetermined intervals. a reset circuit 16 that outputs a
a second memory 19 that stores data having the same contents as the main data during normal operation as backup data; and a second memory 19 that receives the reset signal and checks whether the main data is normal or not each time the reset signal is input. 1. A pachinko machine comprising: a data abnormality detection control circuit 14 that determines whether the main data is normal and rewrites the main data with the contents of the backup data. 2. The backup data is data that has the same content as the main data during normal operation and is stored in the second memory 19 as two sets of first backup data and second backup data. The pachinko machine described in item 1.