JPH06102103B2 - Pachinko machine - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a pachinko machine, and more particularly to a pachinko machine having a variable display.

[0002]

2. Description of the Related Art A pachinko machine equipped with an electric prize winning device such as an opening / closing door, which is a so-called accessory, has been developed in order to improve the service to players and expand the customer base to enjoy the game. The contents of the game are diversified by this accessory, and the healthy enjoyment of the player can be increased. In addition, this kind of pachinko machine is provided with a variable display and a winning device that operates when the display content of the variable display is stopped in a specific mode.

The variable display forms a kind of game device in a game board of a pachinko game machine. This indicator is
It is activated on the basis of a ball winning in the GO chucker arranged in the game board, and operates so as to constantly change the display content. The variable display operation for changing the display is stopped by a manual stop operation or a lapse of a specific time by a timer. Then, when the variable display operation is stopped, the subsequent display contents are stopped until the next activation. Here, if the content of the stop display is a predetermined specific mode, the winning device such as the opening / closing door operates to temporarily give a special benefit to the player. Therefore, every player is equally given the opportunity to obtain a great winning profit.

[0004]

However, in order to make full use of the advantages of the pachinko machine with an accessory as described above, the stop display contents of the variable display must be surely randomized. For example, if the stop display content can be intentionally controlled by the timing of a manual stop operation, a fair and impartial service cannot be provided, and the pachinko machine's sound entertainment property is impaired.

Therefore, it is necessary to introduce an unspecified constituent element that randomizes the stop display content in the variable display. However, when the randomizing unspecified component is introduced, the probability of occurrence of the above-mentioned specific mode (per hit) is certainly constant according to macroscopic statistics over an infinite sample period. It may come in line with the rate. However, the probability that the specific aspect actually occurs within a relatively short finite sample period during which the player is playing is actually highly variable, and for example, the specific aspect occurs continuously. In many cases, such a situation occurs that the service does not occur or does not occur at all, which is a factor that cannot provide fair and impartial service.

The present invention has been made to solve the above problems, and an object thereof is to provide a display result on a variable display with sufficient randomness with a simple and simple structure. , Providing a pachinko machine capable of averaging the probability of hitting within a relatively short finite game time and thereby providing fair and fair service to players.

[0007]

In order to solve the above problems, the present invention provides a variable display having a plurality of variable display sections,
Rotational display data updating means for periodically updating the display contents of the variable display on the basis of the clock signal of the CPU, and start means for instructing activation of the variable display based on the ball winning to the GO chucker. In a pachinko machine configured to give a predetermined profit to a player when the variable display is stopped in a specific manner, the display content determined by the stop of the variable display is based on a clock signal. By setting the time data given by the time data storage means that is timed and created and the unspecified time data storage means that is created irregularly, the stop confirmation of the rotation display update operation is randomly controlled. That is the gist.

[0008]

Therefore, according to the present invention, the display contents determined by stopping the variable display are the time data storage means that is timed and created based on the clock signal and the unspecified time that is created irregularly. It is set by the time data given by the data storage means. As a result, even in a relatively short sample period, it is possible to bring the probability of occurrence of a particular winning form close to a predetermined value. Therefore, while maintaining the randomness, it is possible to average the probabilities that a specific aspect actually appears and to achieve fairness and fairness of service to the players.

[0009]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of a pachinko machine embodying the present invention will be described below with reference to the drawings. FIG. 1 is a front view of a pachinko machine 1. In the center of the game board 2, four seven-segment type numerical indicators (hereinafter,
LEDs 3a to 3d are provided, and
GO chuckers 4a, 4b, 4c on both sides and the lower side
Is provided. The central pocket 5 is provided on the lower side of the lower GO chucker 4c, and an opening / closing door 5a provided in the central pocket 5 opens and closes so that a pachinko ball can be won when it is open and a pachinko ball when it is closed. The ball cannot be won. Four prize winning lamps (hereinafter referred to as V lamps) 6 are arranged on both sides of the upper LED 3a and both sides of the central pocket 5, respectively. The push button switch 7 is provided on the right side of the front frame 10 on which the ball firing operation handle 8, ball receiving tray 9 and the like of the pachinko machine 1 are provided, and is used for controlling the display operation stop timing of the LEDs 3a to 3d. To be

Next, a control device for driving and controlling the LEDs 3a to 3d, the opening / closing door 5a of the central pocket 5, the prize lamp 6 and the like will be described with reference to FIG. FIG. 2 shows an electric block circuit diagram of a control device built in the pachinko machine, and a central pocket prize detection micro switch (hereinafter referred to as pocket prize switch) 11 is a prize ball passage (not shown) communicating with the central pocket 5. Located in the central pocket 5
Detects the pachinko ball that won the prize. A chucker winning detection micro switch (hereinafter referred to as a chucker winning switch) 12 is provided in a winning ball passage (not shown) communicating with each of the GO chuckers 4a to 4c.
Detect the pachinko balls that have won a to 4c.

The switch detection circuit 13 inputs the detection signals SG1 and SG2 of the respective winning switches 11 and 12 and the ON signal SG3 of the push button switch 7, and the respective signals SG1 thereof.
Is a circuit for removing noise from SG3 and shaping the waveform, and outputting the result to the control circuit 14 at the next stage. Clock circuit 15 is 2 MH
The clock signal SG4 having a pulse waveform of z is output to the control circuit 14 at the next stage. The reset circuit 16 is the clock circuit 15
Pulse signal from the control circuit 1 of the next stage based on the pulse signal from the reset signal SG5 every 4.2 msec.
Output to 4. Power supply circuit 17 is 5V from 9V AC power supply
The DC power source of 24V is also made from the 24V AC power source, and is supplied to each circuit as the operating power source.

The control circuit 14 is a central processing unit (CPU), and detects signals SG1 and SG2 from the detection circuit 13.
And the ON signal SG3, or the clock circuit SG4 and the reset signal SG5 from the clock circuit 15 and the reset circuit 16, respectively, and the arithmetic processing operation is performed in response to these signals SG1 to SG5. Read-only memory (hereinafter,
A control program (ROM) 18 is stored. A readable / rewritable memory (hereinafter, referred to as RAM) 19 is composed of 4 bits for each address, and has a program storage area (addresses 000 to 70) for storing an operation program.
Address F) and a data storage area (address 800 to BF1) for storing various data as shown in FIG. This data storage area is the main data storage area (8
A first backup data storage area (addresses 980 to 991) that stores the same contents as the main data as backup data, respectively, when the contents 00 to 81D) and its main data are corrupted for some reason and incorrect contents are written. Address) and a second backup data storage area (BEO address to BF1 address).

The display drive circuit 20 is responsive to the display control signal SG6 from the control circuit 14 to drive the LEDs 3a-3.
d is driven and controlled. The speaker drive circuit 21 sounds the speaker 22 provided on the back surface of the game board 2 of the pachinko machine 1 based on the sound control signal SG7 from the control circuit 14.

The solenoid drive circuit 23 controls the operation of the solenoid 24 provided on the back surface of the game board 2 based on the excitation control signal SG8 from the control circuit 14 to open and close the opening / closing door 5a of the central pocket 5. There is. The lamp drive circuit 25 similarly controls the lighting of the V lamp 6 provided on the game board 2 based on the lighting control signal SG9 from the control circuit 14.

Next, the operation of the pachinko machine configured as described above will be described with reference to the flow charts of the arithmetic processing operations in the control circuit 14 shown in FIGS. Now, when the power is turned on, the control circuit 14 starts its operation according to the flowchart shown in FIG. The control circuit 14 is a RAM 19
In the case of the present embodiment, the start data (RCHK1) having the content of "05AH" is added to the addresses 800 and 801 of 81C and 8C.
In the case of the present embodiment, it is determined whether or not the end data (RCHK2) having the content of "0A5H" is written in the address 1D (start end data check). In this case, when the power is turned on, nothing is written in each address, so that the control circuit 14 outputs BE0,
In the case of the present embodiment, it is determined whether or not the backup 2 start data (BKUPD2) having the content of "05AH" is written in the address BE1 (backup 2 start data check). Then, since it is not written in the same manner as described above, the control circuit 14 next judges whether or not the backup start data (BKUPD) having the content of "05AH" in the case of the present embodiment is written in the addresses 980 and 981 ( Check the backup start data). Since it is not written in the same manner as described above, the control circuit 14 is a routine for initializing main data (initializing routine).
Move on to.

Moving to the initialization routine, the control circuit 14
First, 80 in the main data storage area of the RAM 19
Clear various data from address 8 to 80F. Next, the control circuit 14 sets the left LED data (LED0) for displaying a numerical value on the LED 3a at the address 80C and the value at the address 80D from the values of the 7-bit refresh counters set in the circuit 14 at random when the power is turned on. L
Medium LED data (LE for displaying numerical value on ED3b
D1), right LED data (LED2) for displaying a numerical value on the LED3c at the address 80E, upper LED data (L for displaying a numerical value on the LED3d at the address 80F)
ED3) is calculated. That is, the control circuit 14 utilizes the contents of bits 5 and 6 of the 7-bit refresh counter for the left LED data, the contents of bits 4 and 5 for the middle LED data, and the bits 2 and 3 of the same. The right LED data is created by using the contents of No. 1 and the upper LED data is created by using the contents of bit 0 and bit 1, and stored in each predetermined address.

In this embodiment, in this initial setting, each data is pre-calculated so that all the LEDs 3a to 3d do not display "7". The content of the refresh counter is incremented by "1" every time the control circuit 14 issues one instruction for performing various arithmetic processing operations.

When the initialization routine ends, the arithmetic control circuit 14 next determines whether or not the main data is abnormal (main data abnormality check). That is, the control circuit 14 determines the contents of the LED data and the fever flag (FVRF) at the address 80A (“0F during fever”).
H ", otherwise" 0 ") is abnormal, and if abnormal, stop the program operation, wait for the input of the reset signal SG5 from the reset circuit 16, and if not abnormal, next The checksum calculation and the store routine are executed.

In the checksum calculation and store routine, the control circuit 14 first adds each data value in the main storage area (addresses 802 to 80F), and the added value (checksum) is assigned to the RAMs 810 and 811. The checksum data (CHKSM) is stored in.

Next, the control circuit 14 starts the start and end data setting routine, that is, the start data having the contents of "05AH" at the addresses 800 and 801 and the 81.
After writing the end data having the content of “0A5H” to the addresses C and 81D, the backup data creation routine is executed. Then, in the backup data creation routine, the control circuit 14 sets the start data at addresses 980 and 981 as backup start data (BKUPD) at addresses 980 and 981, and sets the start data at addresses 982 to 98F in the first backup data storage area.
The main data at addresses 02 to 80F are used as backup data (BCKUP), and the checksum data at addresses 81C and 81D are written as backup checksum data (BCKUP) at addresses 982 and 983.

Next, the control circuit 14 executes the backup 2 data creation routine, and the above-mentioned 80 is given to the addresses BE0 and BE1.
The start data at addresses 0 and 801 are used as backup 2 start data (BKUPD2), and 802 is stored at addresses BE2 to BEF in the second backup data storage area.
The main data at addresses 80 to 80F is written as backup 2 data (BKUPD2), the checksum data at addresses 81C and 81D is written as backup 2 checksum data (BCKSM2) at addresses BF0 and BF1, and then the reset circuit 16 is used. The next operation is stopped until the reset signal SG5 is input.

Eventually, the reset circuit 1 starts operating together with the clock circuit 15 which operates at the same time when the power is turned on.
When the first reset signal SG5 is output from 6, the control circuit 14 resets again and performs the start end check again. In this case, since the start data and the end data have already been stored respectively, the above-mentioned check is performed. Determines whether the sum data is correct (checksum check).

In this checksum check, each data value of the addresses 802 to 80F of the RAM 19 is added and it is checked whether or not the value matches the checksum data of the addresses 810 and 811. If they match, the routine goes to the start and end data clear routine described later,
On the contrary, if the contents of the main data in the RAM 19 are damaged due to some cause (for example, noise) and do not match, the backup 2 start data check is performed. And
In this case, since the backup 2 start data having the content of "05AH" has already been stored in the addresses BE0 and BE1 as described above, the control circuit 14 next determines whether the above-mentioned backup 2 data is correct (backup 2 Checksum check).

The control circuit 14 adds the data values at the addresses BE2 to BEF and determines whether the added value matches the backup 2 checksum data at the addresses BF0 and BF1. If they match, it is determined that the contents of the backup 2 data are not damaged, the main data is rewritten with the contents of the backup 2 data, and then the above-described start and end data set routine is performed. On the other hand, if the contents of the backup 2 data are also destroyed due to some reason and they do not match the backup 2 data, the control circuit 14 performs the backup start data check described above.

In this case, since the backup start data has already been stored as described above, the control circuit 14 checks whether the above-mentioned backup data is correct (backup checksum check). The control circuit 14 uses the same method as described above to address 982-9.
Add each data of 8F address, and the added value is 990,9
It is determined whether or not it matches the contents of the backup checksum data at address 91.

If they do not match, it is determined that the backup data is also broken and the routine goes to the above-mentioned initialization routine. On the contrary, if they match, the backup data is judged to be normal, and the main data is replaced with the backup data. After rewriting the contents, the process goes to the start and end set routines described above.

Since the arithmetic processing operation of the control circuit 14 described above is always executed when the main data of the RAM 19 is damaged for some reason, correct backup data is immediately obtained even if the main data is damaged for some reason. Since this is compensated, unnecessary trouble does not occur during the game.

When the reset signal SG5 from the reset circuit 16 is input, the control circuit 14 is reset and the processing operation is performed again from the beginning even if the processing operation is being performed. Reset signal S
All are finished while G5 is output and the next reset signal SG5 is output.

When the reset signal SG5 is output from the reset circuit 16 when the main data is normal,
After performing the start end data check and the checksum check, the control circuit 14 moves to a start and end data clear routine to clear the start data at addresses 800 and 801, and the end data at 81C and 81D.

Next, the control circuit 14 carries out a timer value calculation process, and the first timer data (TIM) at addresses 804 and 805 is calculated.
"-1" is added to the contents of ER1) every 4.2 msec and 8
Second timer data at address 02,803 (TIMER2)
1072.2 (= 4.2 msec x 256) m
"-1" is added every sec. According to the first and second timer data, 275 (= 1072.2 msec ×
The time up to 256) msec can be set, the opening time of the opening / closing door 5a of the central pocket 5 other than the fever (6 seconds), the opening time of the opening / closing door 5a of the central pocket 5 in the fever (30 seconds), GO continuously. LEDs 3a to 3 after the opening / closing door 5a is closed when there is a prize in the chucker 6
The time (2 seconds) when the number of d starts and GO chucker 4
It is used to set the start time (12 seconds) for automatically stopping the numbers when the numbers of the LEDs 3a to 3d start to turn around and the push button switch is not pushed because there is a prize in a to 4c. .

Next, the control circuit 14 adds "1" to the contents of the fourth timer data (TIMER4) at the address 81A every 4.2 msec, and the fifth timer data (which constitutes the upper bit of the fourth timer data at the address 819). "1" is added to the contents of TIMER5) every 67 (= 4.2 msec × 16) msec. This fourth timer data is the control circuit 1
4 and the contents of the refresh counter in each LE
Used to set the time required to stop the rotation of each LED 3a to 3d from the time when the numbers D3a to 3d start to rotate and the push button switch 7 is not pressed for 12 seconds or when the button switch 7 is pressed. To do. Therefore, the time data storage means of the present invention is constituted by the fourth and fifth timer data stored in the ROM 19.

Next, the control circuit 14 shifts to the SW input processing operation, first clears the contents of the SW flag (SWF) at the address 813, and then, from the switch detection circuit 13 to each of the switches 7, 11 and 8 every 8.4 msec. 12 detection signals SG
The presence or absence of 1 to SG3 is detected. Then, when there is a detection signal SG2 from the chucker prize switch 12,
When there is a detection signal SG3 from the push button switch 7, "1" is set in the bit 4, "1" is set in the bit 3, and when there is a detection signal SG1 from the pocket winning switch 11, the bit 2 is set to "1". Are respectively written to determine whether the detection signals SG1 to SG6 are true detection signals other than noise or the like, and then the contents are stored in the SW valid flag (SWU) at the address 812.

Next, the control circuit 14 shifts to the LED display processing operation, and each LE stored in the addresses 80C to 80F.
The numbers based on the D data are displayed on the LEDs 3a to 3d. Then, based on the fourth timer data at the address 81A, the respective displays of the LEDs 3a to 3d are controlled so as not to be displayed in synchronization with each other.

Next, the control circuit 14 shifts to a solenoid, sound, and lamp output processing operation, reads output data (OUTD) for driving the solenoid 24, the speaker 22, the lamp 6, etc. at the addresses 806, 807, and outputs the data. Based on the solenoid 24, the speaker 22 and the lamp 6
Is driven or not driven.

Next, the drive circuit 14 uses the GO chuckers 4a to 4a.
It is determined whether a pachinko ball has won in 4c (GO input check). In the GO input check, the control circuit 14 reads the contents of the SW flag at the address 813,
When it is "1", "1" is added to the content of the winning number data at the address 809, and when it is "0", the command check is immediately performed. In this case, there is no winning, so immediately move to command check.

The command check is the LED rotation check,
It consists of LEDSTOP check, LED judgment check, one-shot check, fever check, and delay check. Command data at address 808 (JMPA
Each check is performed based on the contents of D). And
When the content of the command data is "0", the solenoid, sound, and lamp output are turned off immediately, and when it is "1", the LED is turned on.
Rotation processing, LEDSTOP processing when "2", "3"
The LED determination process is executed at the time of, the one-shot process is executed at the time of "4", the fever judgment process is executed at the time of "5", and the delay process is executed at the time of "6".

The data content becomes "1" if the GO chuckers 4a to 4c have won, and is incremented by "1" to specify the next processing operation each time the above-mentioned processings are sequentially performed. , When the delay process of "6" is completed, the content is set to "0" again and the next prize is waited.

Now, when there is no prize and the content of the command data is "0", the control circuit 14 shifts to the solenoid, sound and lamp output OFF processing operation and does not drive the solenoid 24, the speaker 22 and the lamp 6 until the prize is won. After holding, the prize ball is checked next. This check is performed based on the winning number data at the address 809 performed in the GO input addition processing operation, and in this state is "0", so after executing the main data abnormality check, checksum calculation, store routine, etc., It stops and waits for the next reset signal SG5.

Thereafter, this processing operation is repeated until a prize is won in the GO chuckers 4a to 4c. Next, a case where a pachinko ball wins any of the GO chuckers 4a to 4c will be described.

If there is a winning during the processing operation, the control circuit 14 detects the detection signal SG2 from the chucker winning switch 12 in the SW input processing operation, sets the content of bit 3 of the SW flag to "1", Next, the content of the winning number data is set to "1". Then, next, the content of the command data is set to "1".

Based on this command data, the control circuit 1
4 executes the LED rotation processing operation shown in FIG. First,
The control circuit 14 outputs a drive signal to the speaker drive circuit 21 to cause the speaker 22 to ring and a lamp drive circuit 25.
A driving signal is output to the lamp 6 to cause the lamp 6 to blink. At this time, the contents of the LED rotation flag (LEDMF) at the address 814 are all set to "1" and the numerical display of the LEDs 3a to 3d is rotated.

Next, the control circuit 14 reads the contents of the LED rotation flag and checks the LED rotation. In this case, the contents of the flag are all "1" and the rotation is being displayed. Therefore, the third timer data at address 81B is set. The display is changed (rotated) every 4.2 msec. That is, this control circuit 1
4, the RAM 19 and the display drive circuit 20 constitute the rotation display data updating means of the present invention.

Next, the control circuit 14 judges the presence / absence of a stop SW ON check, that is, the ON operation of the push button switch 7, based on the contents of bit 3 of the SW flag. And
If the switch 7 is not turned on, it is checked based on the first and second timer data whether or not 12 seconds have passed since a prize was won (STOPTIME check).
When 12 seconds have not yet passed, the above-mentioned data abnormality check, checksum calculation, and store routine are executed, and then the operation is stopped and the next reset signal SG5 is waited for.

On the contrary, when the push button switch 7 is pressed, the above S
When the content of the bit 3 of the W flag becomes "1" or when the 12 seconds have passed, the stop time of the rotation display of the LEDs 3a to 3d is determined.

This stop time is 4.2 mse at 81A.
Fourth timer data (TIME) that is incremented by "1" for each c
R4) and the contents of the 7-bit refresh counter, which is incremented by "1" for each instruction, are created by exclusive OR.

That is, in the case of the present embodiment, as shown in FIG. 11, the contents of bits 7 and 6 of the address 81A and the contents of bits 6 and 5 of the refresh counter are exclusive-ORed and the value is obtained. The bits 6 and 5 of the 8-bit register provided in the control circuit 14 are exclusive ORed with the contents of bits 5 and 4 of the address 81A and the contents of bits 5 and 4 of the refresh counter. Store in 5 and 4, respectively. Similarly, the contents of bits 3 and 2 of address 81A and the contents of bits 3 and 2 of the refresh counter are exclusive-ORed and the value is stored in bits 3 and 2 of the register.
Further, the contents of the bits 1 and 0 of the address 81A and the contents of the bits 1 and 0 of the refresh counter are exclusive ORed and the value is stored in the bits 1 and 0 of the register.

Then, the contents of bits 7 and 6 of the register are added by "4" to obtain 8 as left LED stop data (LSTP0) for stopping the rotation display of the left LED 3a.
It is stored in address 15, the contents of bits 5 and 4 of the register are added by "4" and stored in address 816 as middle LED stop data (LSTP1) for stopping the rotation display of the middle LED 3b. 3,2
"4" is added to the content of the right LED stop data (LSTP2) for stopping the rotation display of the right LED 3c.
Is stored in the address 817, and the contents of the bits 1 and 0 of the register are added by "4", and the upper LED stop data (L
It is stored at address 818 as STP3).

That is, for example, each LE that is rotated and displayed.
When the display of D3a to 3d is 3,7,7,5, when the push button switch 7 is pressed or when the 12 seconds have elapsed, the value of the fourth timer data at that time is "0B8".
If the value of the refresh counter is "H" and the value of the refresh counter is "55H", the exclusive OR is calculated and stored in each register as shown in FIG. At this time, the content of each 2 bits of the register becomes "0231". Next, by adding "4" to the contents of each of these 2 bits, the left LED stop data is "4", the middle LED stop data is "6", the right LED stop data is "7", and the upper LED stop data. The data becomes "5", and the stop time is determined. Therefore, the refresh counter constitutes the unspecified time data storage means of the present invention.

When the exclusive OR is obtained between the fourth timer data and the refresh counter, when the contents of both 2 bits are "0", the corresponding LED stop data is immediately obtained without taking the exclusive OR. 8 ”. Therefore, each LED stop data is a random value (random number) of "4" to "8".

Stop data (LSTP0, LSTP1, LSTP2, LSTP) is assigned to addresses 815 to 818.
After setting 3), the command data is incremented to "2" to start the next LEDSTOP processing, and then the main data abnormality check, checksum calculation and store routines described above are executed and stopped, and the next Wait for the reset signal SG5.

When the command data is "2",
When the reset signal SG5 is output, the control circuit 14 executes the LEDSTOP processing shown in FIG. 6 by the command check.

The LEDSTOP processing is the same as the above-mentioned steps 814 to 818.
Each stop data of the address is performed by subtracting "1" every 50 msec from the left LED stop data of the address 814 to the upper LED stop data of the address 818. In this case, when the left LED stop data at address 814 is subtracted and the content becomes "0", the next 8
LED stop data in the 15th address is subtracted,
Finally, the upper LED stop data at address 818 is subtracted. Then, when the respective stop data sequentially become "0", the LEDs 3a to 3 of the rotation flag (LEDMF).
The content of the flag corresponding to d is set to "0", and the rotation of the corresponding LEDs 3a to 3d is stopped based on this "0".

That is, for example, as described above, the left LED
Stop data is "4", middle LED stop data is "6", right LED stop data is "7", and upper LE
When the D stop data is "5", the left LED stop data is first subtracted every 50 msec. And 2
When 00 (= 4 × 50) msec has passed, the left LED stop data becomes “0” and the left LE of the rotation flag is set.
The flag corresponding to D3a becomes "0", and the control circuit 14
Stops the rotation of the left LED 3a based on the content of "0" of the flag.

Next, the control circuit 14 starts the operation of subtracting "1" from the middle LED stop data every 50 msec from the time when the left LED 3a is stopped. And 300 (= 6 ×
50) After the lapse of msec, the middle LED stop data becomes "0" and the flag corresponding to the middle LED 3b of the rotation flag becomes "0". Then, the control circuit 14 determines the middle LED 3b based on the content of "0" of the flag. To stop the rotation of.

Thereafter, the same calculation process is performed, and the right LED 3c is 350 (= 7 × 50) ms after the rotation of the middle LED 3b is stopped.
When ec elapses, the rotation stops and the upper LED 3d is LE on the same right side.
The rotation stops when 250 (= 5 × 50) msec elapses after the rotation of D3c stops.

Therefore, even if the push button switch 7 is pressed or the 12 seconds have passed, each LED stop data is set based on the fourth timer data and the fresh counter whose contents change from time to time. Even when the push button switch 7 is always pressed at the same timing or when 12 seconds have passed, the rotation stop time of the LEDs 3a to 3d is different each time. As a result, the simplification of the game can be prevented, and the disadvantageous button operation to the game hall manager is not performed.

When the rotation of all the LEDs 3a to 3d is stopped, the control circuit 15 sets the command data to "3" in order to start the next LED determination processing based on that the contents of the rotation flags are all "0". To the
The main data abnormality check or the like is executed again and the operation is stopped to wait for the next reset signal SG5.

Next, in the command check, the control circuit 14 executes the LED determination processing operation shown in FIG. First, it is checked whether all four LEDs 3a to 3d display "7". When all "7" are displayed, the fever flag (FVR at address 80A) is displayed.
F) is set to "1" and the second timer data is set to 30 seconds, and then the speaker 22 and the solenoid 2
4 is driven for 30 seconds. Therefore, during that time, the central pocket 5 is held in an open state and the speaker 22 continues to ring.

On the other hand, if all the LEDs 3a to 3d are not "7", then it is checked whether the LEDs 3a to 3d have a number other than "7". If they have a number other than "7", The control circuit 14 outputs the second timer data to 6
After setting to seconds, the speaker 22 and the solenoid 24 are driven for 6 seconds. Therefore, in this case, the central pocket 5 is held open for 6 seconds and the speaker 2
Ring two.

In other cases, after setting the second timer data to 0.6 seconds, the speaker 22 and the solenoid 24 are driven for 0.6 seconds. Therefore, in this case, the central pocket 5 is held open for 0.6 seconds and the speaker 22 is sounded.

Under each of these conditions, the speaker 22,
After driving the solenoid 24, in order to start the next one-shot process, the command data is incremented to "4", the above-mentioned main data abnormality check is executed again, and the operation is stopped and waits for the next reset signal. .

Next, in the command check, the control circuit 14 executes the one-shot processing operation shown in FIG. First, the control circuit 14 performs a fever check based on the content of the fever flag. And the fever flag "0"
At the time of, it is checked whether 6 seconds or 0.6 seconds set by the second timer data has been reached (timer completion check), and when the time has not passed, the main data abnormality check described above is executed. It stops and waits for the next reset signal SG5.

Further, when the time elapses, in order to start the next fever continuation determination processing, the command data is incremented to "5", the above-mentioned main data abnormality check is executed and stopped, and the next reset signal SG5 is waited for. .

On the other hand, when it is determined that the fever is in progress based on the content of the fever flag "1", the control circuit 14 resets the display of each of the LEDs 3a to 3d to "7" and causes the lamp 6 to blink and then moves to the center. Check if a pachinko ball has been won in pocket 5. This check is determined by setting bit 2 of the SW flag to "1" based on the detection signal SG1. Then, when the detection signal SG1 is not output, the timer completion check is executed.

When the detection signal SG1 is output, it is checked whether or not the lamp 6 is lit, and if it is lit, the timer completion check is carried out. Conversely, if it is not lit, this processing is carried out. It is checked whether or not the operation is the 10th time, and when it is 10 times or more, the lamp 6 is turned on, and then the timer completion check is performed. Then, in this timer completion check, it is checked whether or not the opening stop time has been reached, and when it is determined that the opening stop time has been reached, a processing operation is executed to start the fever continuation processing.

Next, in the command check, the control circuit 14 executes the fever continuation determination processing operation shown in FIG. First, it is checked whether or not the lamp 6 is lit, and if it is not lit, the fever flag is reset, and if it is lit, the fever flag is set, and then the driving of the lamp 6, the speaker 22 and the solenoid 24 is stopped. Let Next, the control circuit 14 sets the second timer data to 2 seconds and then starts the next delay process.
The command data is incremented to "6", the main data abnormality check and the like are executed and stopped, and the next reset signal SG5 is waited for.

Next, in the command check, the control circuit 14 executes the delay processing operation shown in FIG. First, the lamp 6, the speaker 22, and the solenoid 24 are stopped, and it is checked whether or not the timer data has timed up. If not, an abnormality check or the like is immediately executed to stop and the next reset signal SG
Wait 5 Also, when the time is up, it is checked whether or not the fever is in progress based on the contents of the fever flag.

If the fever is not in progress, the command data is set to "0". If the fever is in progress, the second timer data is set to 30 seconds and the speaker 22 and the lamp 6 are driven again. In order to start the one-shot processing, the content of the command data is set to "4". Therefore, when the central pocket 5 is won during the fever, the central pocket 5 continues to be open for 30 seconds.

When the command data has the content of "0" and the command check is performed, the GO input storage check described above is performed again. That is, when there are winnings in the GO chuckers 4a to 4c during the processing operation, and the winning number data is added by that number, the content "1" of the winning number data is decremented and the LE is also added.
Set the D rotation flag.

Next, the control circuit 14 sets the second timer data to 1
After setting to 2 seconds, command data “1” is set to start the LED rotation processing again. Therefore, after that, the arithmetic processing operation is executed again until the content of the winning number data becomes "0" as in the above.

As described above, in this embodiment, each of the LEDs 3a to 3a is
Even if the push button switch 7 is pressed to stop the rotation when d is rotating, the fourth timer data whose contents change from time to time is displayed on the basis of the contents of the refresh counter and the rotation stop time of each of the LEDs 3a to 3d. Is decided, the player always pushbutton switch 7 at the same timing.
Each time the LED is pressed, the LEDs 3a to 3d stop differently. Therefore, simplification of the game can be prevented, and disadvantageous button operation for the game hall manager will not be performed.

Moreover, the contents displayed when the LEDs 3a to 3d are stopped are set by the fourth timer data, which is timed and created based on the clock signal, and the refresh counter, which is created irregularly. Even in a relatively short sample period, it is possible to bring the probability of occurrence of a particular stop mode that is a hit close to a predetermined value. Therefore, while maintaining the randomness, it is possible to average the probability that the occurrence of the hit actually occurs, and to achieve fairness and fairness of the service to the player.

It should be noted that in the above-mentioned embodiment, LE as a display device is used.
Although the numbers are displayed on D3a to 3d, the numbers may be replaced with various display modes such as pictures, characters, and symbols.
Also, in the above embodiment, four LEDs 3a to 3 are used as indicators.
Although d is used, the number may be one or a plurality other than four.

[0074]

As described in detail above, the display content determined by stopping the variable display is time data storage means that is timed and created based on the clock signal, and unspecified that is created irregularly. According to the present invention, which is set by the time data given by the time data storage means and is used to randomly control the stop confirmation of the rotation display update operation, the display result on the variable display can be obtained with a simple and simple structure. Sufficient randomness can be given, and the probability of hits can be averaged within a relatively short finite game time, so fair and fair service to players can be achieved. It has an excellent effect.

[Brief description of drawings]

FIG. 1 is a front view of a pachinko machine showing an embodiment of the present invention.

FIG. 2 is likewise an electric block circuit diagram.

FIG. 3 is likewise a map showing the contents stored in the RAM.

FIG. 4 is likewise a flow chart for explaining the operation of the control circuit.

FIG. 5 is likewise a flow chart for explaining the operation of the control circuit.

FIG. 6 is likewise a flow chart for explaining the operation of the control circuit.

FIG. 7 is likewise a flow chart for explaining the operation of the control circuit.

FIG. 8 is likewise a flow chart for explaining the operation of the control circuit.

FIG. 9 is likewise a flow chart for explaining the operation of the control circuit.

FIG. 10 is likewise a flow chart for explaining the operation of the control circuit.

FIG. 11 is an explanatory diagram similarly illustrating a case where LED stop data is created based on a refresh counter and fourth timer data.

FIG. 12 is an explanatory diagram similarly illustrating a case where LED stop data is created based on a refresh counter and fourth timer data.

[Explanation of Codes] 3a to 3d ... Numerical value display (LE
D) 4a to 4d ... GO chucker, 14 ... Control circuit (refresh counter) forming unspecified time data storage means, 14, 19 ... Control circuit and RAM (TIMER3) forming rotation display data updating means, 19 ... RAMs (TIMER4, 5) constituting time data storage means.

Claims (1)

[Claims] 1. A variable display unit having a plurality of variable display units, and rotation display data updating means for periodically updating the display content of the variable display unit based on a clock signal from a CPU.
The variable display is provided with start means for instructing activation based on a ball winning to the GO chucker, and is configured to give a predetermined profit to the player when the variable display is stopped in a specific mode. In a pachinko machine, the variable display is stopped and the display content is determined by time data storage means that is timed and created based on the clock signal and unspecified time data storage means that is created irregularly. The pachinko machine is characterized in that it is set by the time data that is set, and that the stop confirmation of the rotation display update operation is controlled randomly.