JPH0419575B2 - - Google Patents

Info

Publication number
JPH0419575B2
JPH0419575B2 JP60012158A JP1215885A JPH0419575B2 JP H0419575 B2 JPH0419575 B2 JP H0419575B2 JP 60012158 A JP60012158 A JP 60012158A JP 1215885 A JP1215885 A JP 1215885A JP H0419575 B2 JPH0419575 B2 JP H0419575B2
Authority
JP
Japan
Prior art keywords
register
instruction
vector
write
pipeline
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP60012158A
Other languages
English (en)
Japanese (ja)
Other versions
JPS61170830A (ja
Inventor
Aiichiro Inoe
Juji Oinaga
Katsumi Oonishi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP60012158A priority Critical patent/JPS61170830A/ja
Publication of JPS61170830A publication Critical patent/JPS61170830A/ja
Publication of JPH0419575B2 publication Critical patent/JPH0419575B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
    • G06F9/30036—Instructions to perform operations on packed data, e.g. vector, tile or matrix operations
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3824—Operand accessing
    • G06F9/3826—Bypassing or forwarding of data results, e.g. locally between pipeline stages or within a pipeline stage

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Mathematical Physics (AREA)
  • Advance Control (AREA)
  • Complex Calculations (AREA)
JP60012158A 1985-01-25 1985-01-25 レジスタ参照方法 Granted JPS61170830A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP60012158A JPS61170830A (ja) 1985-01-25 1985-01-25 レジスタ参照方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60012158A JPS61170830A (ja) 1985-01-25 1985-01-25 レジスタ参照方法

Publications (2)

Publication Number Publication Date
JPS61170830A JPS61170830A (ja) 1986-08-01
JPH0419575B2 true JPH0419575B2 (cs) 1992-03-30

Family

ID=11797647

Family Applications (1)

Application Number Title Priority Date Filing Date
JP60012158A Granted JPS61170830A (ja) 1985-01-25 1985-01-25 レジスタ参照方法

Country Status (1)

Country Link
JP (1) JPS61170830A (cs)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0746350B2 (ja) * 1988-02-15 1995-05-17 工業技術院長 ベクトル計算機

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5829549B2 (ja) * 1980-12-23 1983-06-23 富士通株式会社 レジスタ干渉制御方式
JPS59154548A (ja) * 1983-02-22 1984-09-03 Hitachi Ltd 記憶制御方式

Also Published As

Publication number Publication date
JPS61170830A (ja) 1986-08-01

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