JPH04192430A - ダイボンド方法 - Google Patents

ダイボンド方法

Info

Publication number
JPH04192430A
JPH04192430A JP2324227A JP32422790A JPH04192430A JP H04192430 A JPH04192430 A JP H04192430A JP 2324227 A JP2324227 A JP 2324227A JP 32422790 A JP32422790 A JP 32422790A JP H04192430 A JPH04192430 A JP H04192430A
Authority
JP
Japan
Prior art keywords
semiconductor device
semiconductor element
substrate
adhesive
adhesive agent
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2324227A
Other languages
English (en)
Inventor
Hideyuki Ichiyama
一山　秀之
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP2324227A priority Critical patent/JPH04192430A/ja
Publication of JPH04192430A publication Critical patent/JPH04192430A/ja
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484—Connecting portions
    • H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
    • H01L2224/48465—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8319—Arrangement of the layer connectors prior to mounting
    • H01L2224/83192—Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on another item or body to be connected to the semiconductor or solid-state body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8338—Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/83385—Shape, e.g. interlocking features
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/91—Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
    • H01L2224/92—Specific sequence of method steps
    • H01L2224/922—Connecting different surfaces of the semiconductor or solid-state body with connectors of different types
    • H01L2224/9222—Sequential connecting processes
    • H01L2224/92242—Sequential connecting processes the first connecting process involving a layer connector
    • H01L2224/92247—Sequential connecting processes the first connecting process involving a layer connector the second connecting process involving a wire connector

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Die Bonding (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。

Description

【発明の詳細な説明】 〔産業上の利用分野〕 この発明は、半導体素子を基体上の所定位置にダイボン
ドする半導体素子ダイボンド方法に関するものである。
〔従来の技術〕
第３図は従来のダイボンド方法による半導体装置を示す
断面図であり、図において、（１）は半導体素子、（２
）は半導体素子を搭載する基体、（３）は半導体素子（
１）と基体を固着する接着剤である。
次に動作について説明する。第３図に示すように、基体
（２）の所定位置に塗布された接着剤（３）上に半導体
素子（１）を載せ、更に基体（２）ことオーブン炉ある
いは、熱板上に保持することで接着剤の硬化反応を促進
し、半導体素子（１）を基体（２）上に固着する。これ
は次の第４図に示すワイヤーボンディング工程で、半導
体素子（１）上の電極（４）と外部リード端子（５）を
金やアルミニウム等の金属細線（６）で結線する時や、
更にワイヤーボンディング工程の後てエポキシ樹脂等て
モールディングする際に半導体素子（１）と基体（２）
が充分固着していないと、半導体素子（１）が動いて基
体（２）から外れたり、モールディング中に金属細線が
断線したり等、半導体装置として組立てた後の致命的な
不良になるので、半導体素子（１）と基体（２）は充分
な強度で固着されている必要がある。
このため、ダイボンド方法によれば、半導体素子（１）
と基体（２）との充分な接着強度を得るために、接着剤
（３）を多量に基体（２）上に塗布することが必要であ
る。しかしあまりに多量になると接着剤（２）塗布後の
基体（２）上に半導体素子（１）を載せ固着させると、
半導体素子（１）の側面部分に接着剤（３）が這い上が
り極端な例では半導体素子（１）表面にまで接着剤が到
達し回路を短絡させるという場合もあり塗布量のコント
ロールが難しい。また、接着剤（３）は加熱する事で硬
化するが、その際に硬化収縮をし、更に硬化物となった
後でも半導体素子（例えばシリコン）（１）に比へ熱膨
張率が１０倍程度大きいので、半導体装置として組立て
た後でも熱膨張率の差による応力が発生し、半導体素子
（１）表面を圧縮する。
〔発明が解決しようとする課題〕
従来のグイボンド方法は以上のように行われるので、半
導体装置として組立てた後でも熱膨張率の差による応力
が発生し、半導体素子の表面を圧縮するという問題点か
あった。
この発明は上記のような問題点を解消するためになされ
たもので、半導体素子と基体との接着強度を充分キープ
したままで、半導体素子側面へ接着剤が這い上ることが
なく、半導体素子表面への応力の影響を少なくすること
がてきるタイボッＩζ方法を得ることを目的とする。
〔課題を解決するための手段〕
この発明に係わるダイボンド方法は、半導体素子の中央
部付近に接する基体部分が凸起部になっており、半導体
素子の外周部に行くに従って傾斜がついて、半導体素子
中央部付近より外周部付近の方が、半導体素子と基体と
の間隔が大きくなるようにしたものである。
〔作用〕
この発明によるダイボンド方法は半導体素子の中央部付
近より外周部の方が半導体素子と基体の間隔が大きいた
め、接着剤が多過ぎる場合でも半導体素子の側面へは這
い上がらず、半導体素子へかかる応力は小さい。
〔実施例〕
以下、この発明の一実施例を図について説明する。第１
図において、（２）は半導体素子（１）と対向する面の
中央部付近に周辺が傾斜した凸起部を有する基体である
。
次に動作について説明する。第１図のものは、半導体素
子（１）の中央部付近に接する基体（２）部分が凸起部
になっており、第２図に示す様にこの凸起部に接着剤（
３）を塗布する。その後半導体素子（１）を上方から基
体（２）上に載せ、所定量のボッデルり荷重をかけてグ
イボンドする。この時、接着剤（３）は未硬化であるた
め、粘性、流動性があり半導体素子（１）の中央部から
外周部へと拡がって行く。そして、過剰量の接着剤（３
）は基体（２）と半導体素子（１）の間隔が中央部より
大きくなっている外周部へと流れ込み半導体素子（１）
の側面へ接着剤の這い上がりを防止できる。
〔発明の効果〕
以上のように、この発明によれば、半導体素子側面へ接
着剤が這い上がるのを防止出来るので、信頼性の高い半
導体装置が得られる。また、接着剤の塗布量のコントロ
ールを厳しくする必要がないので、歩留りの向上も期待
できる効果がある。
【図面の簡単な説明】
第１図はこの発明の一実施例によるダイボンド方法で製
造した半導体装置を示す断面側面図、第２図は製造工程
の途中を示す側面模式図、第３図は従来のダイボンド方
法で製造した半導体装置を示す断面側面図、第４図はワ
イヤーポンデイ、ゲさ第１た状態を示す断面側面図であ
る。図において、（１）は半導体素子、（２）は基体、
（３）は接着剤である。 なお、図中、同一符号は同一、又は相当部分を示す。

Claims (1)

    【特許請求の範囲】
  1. 　Ｓｉ等の半導体材料の表面に回路を形成し機能をもっ
    た半導体素子をリードフレーム等の基体の所定の位置に
    固着するダイボンド方法において、半導体素子の中央部
    付記と外周部付近では、基体と上記半導体素子との間隔
    が異なっており、外周部付近の方が間隔が中央部付近よ
    り所定の値大きくなるようにしたとするダイボンド方法
    。
JP2324227A 1990-11-26 1990-11-26 ダイボンド方法 Pending JPH04192430A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2324227A JPH04192430A (ja) 1990-11-26 1990-11-26 ダイボンド方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2324227A JPH04192430A (ja) 1990-11-26 1990-11-26 ダイボンド方法

Publications (1)

Publication Number Publication Date
JPH04192430A true JPH04192430A (ja) 1992-07-10

Family

ID=18163460

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2324227A Pending JPH04192430A (ja) 1990-11-26 1990-11-26 ダイボンド方法

Country Status (1)

Country Link
JP (1) JPH04192430A (ja)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP3333883A1 (en) * 2016-12-08 2018-06-13 IMEC vzw A method for transferring and placing a semiconductor device on a substrate

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP3333883A1 (en) * 2016-12-08 2018-06-13 IMEC vzw A method for transferring and placing a semiconductor device on a substrate

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