JPH0416017B2 - - Google Patents

Info

Publication number
JPH0416017B2
JPH0416017B2 JP59094841A JP9484184A JPH0416017B2 JP H0416017 B2 JPH0416017 B2 JP H0416017B2 JP 59094841 A JP59094841 A JP 59094841A JP 9484184 A JP9484184 A JP 9484184A JP H0416017 B2 JPH0416017 B2 JP H0416017B2
Authority
JP
Japan
Prior art keywords
semiconductor substrate
bumps
alignment
pattern recognition
bonding
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP59094841A
Other languages
English (en)
Japanese (ja)
Other versions
JPS60239050A (ja
Inventor
Yasunori Senkawa
Takamichi Maeda
Masao Hayakawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sharp Corp
Original Assignee
Sharp Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sharp Corp filed Critical Sharp Corp
Priority to JP59094841A priority Critical patent/JPS60239050A/ja
Publication of JPS60239050A publication Critical patent/JPS60239050A/ja
Publication of JPH0416017B2 publication Critical patent/JPH0416017B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H10W46/00
    • H10W46/601

Landscapes

  • Wire Bonding (AREA)
JP59094841A 1984-05-11 1984-05-11 半導体基板の位置合わせ方法 Granted JPS60239050A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP59094841A JPS60239050A (ja) 1984-05-11 1984-05-11 半導体基板の位置合わせ方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59094841A JPS60239050A (ja) 1984-05-11 1984-05-11 半導体基板の位置合わせ方法

Publications (2)

Publication Number Publication Date
JPS60239050A JPS60239050A (ja) 1985-11-27
JPH0416017B2 true JPH0416017B2 (enExample) 1992-03-19

Family

ID=14121261

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59094841A Granted JPS60239050A (ja) 1984-05-11 1984-05-11 半導体基板の位置合わせ方法

Country Status (1)

Country Link
JP (1) JPS60239050A (enExample)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CA2096551A1 (en) * 1992-05-22 1993-11-23 Masanori Nishiguchi Semiconductor device

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4992548A (enExample) * 1973-01-10 1974-09-04

Also Published As

Publication number Publication date
JPS60239050A (ja) 1985-11-27

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Legal Events

Date Code Title Description
LAPS Cancellation because of no payment of annual fees