JPH04152577A - 可変容量ダイオード装置 - Google Patents

可変容量ダイオード装置

Info

Publication number
JPH04152577A
JPH04152577A JP2277537A JP27753790A JPH04152577A JP H04152577 A JPH04152577 A JP H04152577A JP 2277537 A JP2277537 A JP 2277537A JP 27753790 A JP27753790 A JP 27753790A JP H04152577 A JPH04152577 A JP H04152577A
Authority
JP
Japan
Prior art keywords
variable capacitance
capacitance diode
diode device
wire
high frequency
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2277537A
Other languages
English (en)
Other versions
JP2824329B2 (ja
Inventor
Takeshi Kasahara
健 笠原
Haruhiko Taguchi
田口　治彦
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toko Inc
Original Assignee
Toko Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toko Inc filed Critical Toko Inc
Priority to JP27753790A priority Critical patent/JP2824329B2/ja
Priority to US07/775,034 priority patent/US5220193A/en
Publication of JPH04152577A publication Critical patent/JPH04152577A/ja
Application granted granted Critical
Publication of JP2824329B2 publication Critical patent/JP2824329B2/ja
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
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  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Wire Bonding (AREA)
  • Semiconductor Integrated Circuits (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は、高周波直列抵抗Ｒ３の小さい高周波用同調素
子として好適な可変容量ダイオード装置に関するもので
ある。
〔従来の技術〕
従来、高周波用に適した同調素子用の可変容量ダイオー
ド装置では、最大容量が０．１〜１５ＰＦ程度のもので
あり、そのＰＮ接合の面積は極めて小さなものとなる。
通常、一つの可変容量ダイオード装置に対して一本の金
線等のワイヤーがワイヤーボンデングされている為に、
高周波用にあっては、そのワイヤーの直径が太いものが
使用できず、細いものが使用されている。
〔発明が解決しようとする課題〕
従来、高周波用に適した同調素子用の可変容量ダイオー
ド装置では、接合面積が小さく、ワイヤーの直径も細い
ものとなる為に、その結果として高周波電流の表皮効果
に基づいて高周波直列抵抗Ｒ３が大きくなり、同調の為
の性能指数Ｑが劣化する欠点がある。
本発明は、上述の如き問題点を改善する為になされたも
ので、その主な目的は、高周波直列抵抗Ｒ８を低減した
可変容量ダイオード装置を提供するにある。
〔課題を解決する為の手段〕
本発明の可変容量ダイオード装置は、一のチップに、複
数の可変容量ダイオード素子が形成され、それらの少な
くとも二個以上の可変容量ダイオード素子の夫々の電極
からリードフレームに、一素子に対して少なくとも一本
のワイヤーで接続されて共通接続されていることを特徴
とするものである。
〔作用〕
本発明は、所定の容量の可変容量ダイオード装置を二つ
以上の可変容量ダイオード素子で形成することによって
、高周波電流の流れる面積を拡大して高周波直列抵抗Ｒ
ｓを低減したものである。
〔実施例〕
第１図は、本発明に係る高周波用の可変容量ダイオード
装置の平面図であり、第２図が、その破断線（Ｘ−Ｙ）
に沿った断面図である。
第２図に於いて、半導体基板１の主表面にＮ導電型のエ
ピタキシャル層２が形成されている。エピタキシャル層
２に複数のＮ４電型の拡散層３が形成され、それらの拡
散層３の主表面露呈部からＰ導電型の拡散層を拡散層３
を覆うように拡散して夫々にＰＮ接合を形成して、可変
容量ダイオード素子り、、Ｄ２−が形成する。５は、二
酸化シリコン膜等の絶縁膜である。各素子Ｄ　＋　、　
Ｄ　ｚ　’一の主表面露呈部に、アルミニューム等の電
極６が形成され、電極６等のワイヤー７に金線７がボン
ディングされる。
第３図は、リードフレームにマウントされた本発明の可
変容量ダイオード装置の一実施例を示す斜視図である。
リード８．の先端のタブリード８２にチップがマウント
され、チップに形成された各素子ＤＩ、ＤＺ、Ｄ３の電
極とり一部９１の先端のタブリード９２に夫々ワイヤー
７で接続され、可変容量ダイオード素子Ｄ＋　、Ｄｚ　
、Ｄｚのアノードがタブリード９□で共通接続されてい
る。
第３図の可変容量ダイオード装置の等価回路は、第４図
のように表すことができる。
タブリード９□を端子９で等価的に表し、ワイヤー７を
端子７．゛乃至７．゛と抵抗ｒ、乃至ｒ１１、可変容量
ダイオード素子り、乃至Ｄ３をＣ８乃至Ｃ３、可変容量
ダイオード素子り、乃至Ｄ３の底部の半導体基体１とエ
ピタキシャル層２等による抵抗成分をｒ２１乃至ｒＺ３
、タブリード８□を端子８目乃至８１３と夫々等価的に
表している。
第３図に示されているように可変容量ダイオード素子り
、、Ｄ２．Ｄ３を第４図に基づいて説明すると、可変容
量ダイオード素子り、、Ｄ、、Ｄ３の容量を天々Ｃ＋、
　Ｃｚ、　Ｃ”ｒ　とすると、その合成された最大容量
Ｃ６は、次式のように表される。
Ｃ０＝Ｃ＋　”Ｃ２＋Ｃ３−−−”−−−−−−・（１
）一方、高周波直列抵抗Ｒ３は、端子７　、ｌ乃至７３
゛と８　＋＋乃至８，３間の夫々の抵抗成分子　１１＋
乃至ｒ１３とｒ２１乃至ｒ２３による合成抵抗をＲ１乃
至Ｒ３とすると、その合成抵抗Ｒ０は、次式のように表
される。
１／ＲＯ＝　１／、Ｒ１＋　１／ＲＺ　＋　１／Ｒ３−
（２１（２）式の合成抵抗Ｒ０が略高周波直列抵抗Ｒ３
Ｉに相当する。
即ち、第５図に示した従来の可変容量ダイオード装置の
等価回路によると、その高周波直列抵抗Ｒ５２は、 １　／Ｒｓｚ−１／Ｒｏ＋　＋１　／ＲＯ２−−−−−
−−−（３１と表すことができる。
本発明の可変容量ダイオード装置の高周波直列抵抗Ｒ３
Ｉと従来の可変容量ダイオード装置の高周波直列抵抗Ｒ
５Ｚの関係は、 Ｒｏ＋　−ｒ　＋＋　−ｒ　Ｉｚ−ｒ　１３　−−−−
一−−−（４１ＲＯ２＝　ｒ　ｚ＋＝　ｒ　ｚｚ−ｒ　
ｚ：＋　　−””−””−”（５１であるので、 Ｒ５Ｉ　　　く　　　Ｒ３□　　　　　−−一一一一−
−−−−−−−−−−−（６）の関係となる。
上述のように本発明の可変容量ダイオード装置は、一つ
のチップに複数個形成された可変容量ダイオード素子Ｄ
１．Ｄ２．Ｄ３　−　　のうち三素子以上の素子を並列
接続することによって、（１）式に基づいて所定の容量
の可変容量ダイオード素子が形成されると共に、（６）
式の関係から明らかなように高周波直列抵抗を小さくす
ることができる。
更に、本発明の可変容量ダイオード装置によれば、ワイ
ヤー７の外周の表面積は複数のワイヤーで形成可能であ
るので拡大される。従って、それらの金線に流れる高周
波電流は、−本の金線より多く流すことができるので、
可変容量ダイオード装置の高周波直列抵抗を小さくする
ことが可能である。その結果として、本発明の可変容量
ダイオード装置を、同調回路に用いれば、同調の為の性
能指数Ｑを大きくすることが可能である。
熱論、ＰＮ接合の面積の異なる可変容量ダイオード素子
を形成して、それらの素子を並列接続して所定の容量の
可変容量ダイオード装置を形成することも可能である。
〔効果〕
本発明の可変容量ダイオード装置は、一つのチップに複
数個の可変容量ダイオード素子が形成されたものであっ
て、その内の幾つかの素子を並列接続して所定の容量の
一個の可変容量ダイオード装置を形成するものである。
本発明の可変容量ダイオード装置は、各素子に少なくと
も対応した数のワイヤーにより可変容量ダイオード装置
を形成して、可変容量ダイオード装置の高周波直列抵抗
Ｒ５を低減して同調の為の性能指数Ｑを高めることが可
能であって、高周波同調用の可変容量ダイオード素子と
して極めて効果的である。
又、本発明の可変容量ダイオード装置は、可変容量ダイ
オード素子を並列に組み合わせることによって、所望の
最大容量の可変容量ダイオード装置が容易に形成できる
利点を有する。
【図面の簡単な説明】
第１図は、本発明に係る可変容量ダイオード装置の一実
施例の素子平面図、第２図は、第１図のＸＹ線に沿った
断面図、第３図は、リードフレームにマウントされた可
変容量ダイオード装置の斜視図、第４図は、本発明に係
る可変容量ダイオード装置の等価回路図、第５図は、従
来の可変容量ダイオード装置の等価回路図である。 に半導体基板、２：エビタキシャル層、３：Ｎ導電型の
拡散層２４：Ｐ導電型の拡散層、５：絶縁膜、６：導電
膜、７：ワイヤー、８＋、Ｌ　　：リード ８□、９□ ：ダブリード。

Claims (1)

    【特許請求の範囲】
  1. （１）一の半導体基体に複数の可変容量ダイオード素子
    が形成され、該半導体基体の裏面の共通電極を第１のリ
    ードフレームに接続し、且つ前記複数の可変容量ダイオ
    ード素子の少なくとも二個以上の可変容量ダイオード素
    子の夫々の電極と第２のリードフレーム間を、一素子に
    対して少なくとも一つのワイヤーで接続して、前記少な
    くとも二個以上の可変容量ダイオード素子を一つの可変
    容量ダイオードとしたことを特徴とする可変容量ダイオ
    ード装置。
JP27753790A 1990-10-16 1990-10-16 可変容量ダイオード装置 Expired - Fee Related JP2824329B2 (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP27753790A JP2824329B2 (ja) 1990-10-16 1990-10-16 可変容量ダイオード装置
US07/775,034 US5220193A (en) 1990-10-16 1991-10-11 Variable-capacitance diode device with common electrode

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP27753790A JP2824329B2 (ja) 1990-10-16 1990-10-16 可変容量ダイオード装置

Publications (2)

Publication Number Publication Date
JPH04152577A true JPH04152577A (ja) 1992-05-26
JP2824329B2 JP2824329B2 (ja) 1998-11-11

Family

ID=17584937

Family Applications (1)

Application Number Title Priority Date Filing Date
JP27753790A Expired - Fee Related JP2824329B2 (ja) 1990-10-16 1990-10-16 可変容量ダイオード装置

Country Status (2)

Country Link
US (1) US5220193A (ja)
JP (1) JP2824329B2 (ja)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5311158A (en) * 1992-07-09 1994-05-10 Rockwell International Corporation High power tuning device using layered varactors
JP2860272B2 (ja) * 1995-06-23 1999-02-24 東光株式会社 可変容量ダイオード装置およびその製造方法
DE19631389A1 (de) * 1995-08-29 1997-03-06 Hewlett Packard Co Monolithischer spannungsvariabler Kondensator
JP2001250962A (ja) * 2000-03-07 2001-09-14 Toko Inc ダイオード

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6173342A (ja) * 1984-09-19 1986-04-15 Hitachi Ltd 電子部品

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DE1292755B (de) * 1964-03-26 1969-04-17 Siemens Ag Verfahren zum serienmaessigen Sockeln und Gehaeuseeinbau von Halbleiterbauelementen
US3374537A (en) * 1965-03-22 1968-03-26 Philco Ford Corp Method of connecting leads to a semiconductive device
US3893147A (en) * 1973-09-05 1975-07-01 Westinghouse Electric Corp Multistate varactor
US4023053A (en) * 1974-12-16 1977-05-10 Tokyo Shibaura Electric Co., Ltd. Variable capacity diode device
JPS57103366A (en) * 1980-12-18 1982-06-26 Clarion Co Ltd Variable-capacitance device
GB2104725B (en) * 1981-07-17 1986-04-09 Clarion Co Ltd Variable capacitance device
US5017950A (en) * 1989-01-19 1991-05-21 Toko, Inc. Variable-capacitance diode element having wide capacitance variation range

Patent Citations (1)

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Publication number Priority date Publication date Assignee Title
JPS6173342A (ja) * 1984-09-19 1986-04-15 Hitachi Ltd 電子部品

Also Published As

Publication number Publication date
US5220193A (en) 1993-06-15
JP2824329B2 (ja) 1998-11-11

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