JPH0414941Y2 - - Google Patents
Info
- Publication number
- JPH0414941Y2 JPH0414941Y2 JP1984065769U JP6576984U JPH0414941Y2 JP H0414941 Y2 JPH0414941 Y2 JP H0414941Y2 JP 1984065769 U JP1984065769 U JP 1984065769U JP 6576984 U JP6576984 U JP 6576984U JP H0414941 Y2 JPH0414941 Y2 JP H0414941Y2
- Authority
- JP
- Japan
- Prior art keywords
- substrate
- resistor
- conductive pattern
- resistance value
- led
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 239000000758 substrate Substances 0.000 claims description 26
- 239000011347 resin Substances 0.000 claims description 5
- 229920005989 resin Polymers 0.000 claims description 5
- 238000000034 method Methods 0.000 description 12
- 238000010586 diagram Methods 0.000 description 5
- 238000004519 manufacturing process Methods 0.000 description 3
- 239000000523 sample Substances 0.000 description 3
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 2
- 238000005488 sandblasting Methods 0.000 description 2
- 238000009966 trimming Methods 0.000 description 2
- 239000004593 Epoxy Substances 0.000 description 1
- 239000003082 abrasive agent Substances 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 230000001678 irradiating effect Effects 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- 229920001296 polysiloxane Polymers 0.000 description 1
- 238000004382 potting Methods 0.000 description 1
- 239000000843 powder Substances 0.000 description 1
- 229910001925 ruthenium oxide Inorganic materials 0.000 description 1
- WOCIAKWEIIZHES-UHFFFAOYSA-N ruthenium(iv) oxide Chemical compound O=[Ru]=O WOCIAKWEIIZHES-UHFFFAOYSA-N 0.000 description 1
- 238000007790 scraping Methods 0.000 description 1
- 238000005507 spraying Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
Description
【考案の詳細な説明】
（産業上の利用分野）
本考案は、抵抗値が修正可能な抵抗内蔵型のチ
ツプ型の発光ダイオード（以下LEDと略称する）
に関するものである。[Detailed description of the invention] (Field of industrial application) This invention is a chip-type light emitting diode (hereinafter abbreviated as LED) with a built-in resistor whose resistance value can be adjusted.
It is related to.
（従来の技術）
従来のLEDを第１図に示す。図に示すように、
２本のリードのうち一方のリード６の端部に
LEDチツプ７を取り付け、このLEDチツプ７と
他方のリード６の端部とを金属細線８により接続
し、さらに透光性樹脂９により被覆したものであ
る。(Prior art) Figure 1 shows a conventional LED. As shown in the figure,
At the end of lead 6, one of the two leads.
An LED chip 7 is attached, this LED chip 7 and the end of the other lead 6 are connected by a thin metal wire 8, and further covered with a translucent resin 9.
このようなLEDは、高さ寸法が大きい為、薄
形化を指向した機器類への使用には不向きであ
り、又リード付きである為、自動マウント機を使
用する場合には、リード６の形状を整えるリード
フオーミング工程が必要であつた。 Since such LEDs have a large height, they are not suitable for use in equipment that aims to be thin, and they also come with leads, so when using an automatic mounting machine, it is necessary to use the lead 6. A lead forming process was required to adjust the shape.
そこで、特開昭55−107283号公報に示されてい
るようなリードが無く、自動マウントが可能なチ
ツプ型のLEDが提案され、実用化されている。 Therefore, a chip-type LED that does not have leads and can be automatically mounted, as shown in Japanese Patent Laid-Open No. 55-107283, has been proposed and put into practical use.
しかしながら、この様なチツプ型のLEDを使
用した場合でも、電流制限用の抵抗を取り付ける
には、回路基板上のパターンに抵抗を取り付け、
このパターンを介してLEDに接続することが必
要であつた。 However, even when using a chip-type LED like this, in order to install a current-limiting resistor, it is necessary to attach the resistor to the pattern on the circuit board.
It was necessary to connect to the LED through this pattern.
この為、実開昭54−29653号公報及び実開昭59
−18454号公報に示されているように、LEDの基
板の表面側にLEDチツプと共に抵抗体を印刷し
たものが提案されていた。 For this reason, Utility Model Application No. 54-29653 and Utility Model Application No. 59
As shown in Japanese Patent No. 18454, an LED was proposed in which a resistor was printed along with an LED chip on the front surface of an LED substrate.
（考案が解決しようとする課題）
上記従来のチツプ型のLEDのように、LEDチ
ツプが載置されている面と同一の面上に抵抗体を
配置すると、基板等の寸法が規格化されている
為、抵抗体とLEDチツプとが極めて接近するこ
とになり、LEDチツプを発光され、輝度を測定
しながら抵抗体の抵抗値を調整することが出来な
かつた。(Problem to be solved by the invention) If the resistor is placed on the same surface as the surface on which the LED chip is placed, as in the conventional chip-type LED mentioned above, the dimensions of the board etc. will be standardized. As a result, the resistor and the LED chip were placed in close proximity to each other, making it impossible to adjust the resistance value of the resistor while measuring the brightness of the LED chip.
又、一般に抵抗体はその形状寸法により定格電
力が定められているが、基板等の寸法が規格化さ
れている為、LEDチツプが載置されている面と
同一面上に定格電力を満足する抵抗体を配置する
だけの面積がなかつた。 In addition, the rated power of a resistor is generally determined by its shape and dimensions, but since the dimensions of the board etc. are standardized, the rated power can be satisfied by placing it on the same surface as the LED chip. There was not enough area to place a resistor.
本考案の目的は、薄型・安価かつ自動マウント
による量産化可能な抵抗内蔵型のチツプ型LED
において輝度の調整を抵抗値の調整にて行ない、
輝度のバラツキを小さくし、さらに抵抗体の配置
をLEDチツプが載置されている面と異なる面に
行ない、余裕のある定格電力を持つた抵抗体と
し、優れた品質のLEDを提供することにある。 The purpose of this invention is to create a chip-type LED with a built-in resistor that is thin, inexpensive, and can be mass-produced by automatic mounting.
Adjust the brightness by adjusting the resistance value,
We reduced the variation in brightness, placed the resistor on a surface different from the surface on which the LED chip is mounted, and created a resistor with a generous rated power to provide LEDs of excellent quality. be.
（課題を解決するための手段）
本考案のLEDは、絶縁及び耐熱性を有し、か
つそれぞれ異なる側面に形成された第１、第２及
び第３のスルーホールを有する基板と、その表面
及び第１のスルーホール内に形成された第１の導
電パターンと、この導電パターンから独立すると
共に互いに独立して基板表面に形成され、第２及
び第３のスルーホールを介して基板の裏面にまで
まわり込んで形成されている第２及び第３の導電
パターンと、第２の導電パターンの基板表面側の
端部上にボンデイングされ、かつ第１の導電パタ
ーンにワイヤボンデイングされた発光ダイオード
チツプと、第２及び第３の導電パターンの基板裏
面側の端部間に形成され、かつ発光ダイオードチ
ツプの輝度特性に応じて抵抗値が調整された抵抗
体と、発光ダイオードチツプを被覆する透明樹脂
と、から構成されている。(Means for Solving the Problems) The LED of the present invention includes a substrate having first, second, and third through holes that are insulating and heat resistant and formed on different sides, and the surface and A first conductive pattern formed in the first through hole, and a first conductive pattern formed on the surface of the substrate independently of this conductive pattern and independently of each other, and extending to the back surface of the substrate via the second and third through holes. second and third conductive patterns formed to extend around the substrate; a light emitting diode chip bonded onto an end of the second conductive pattern on the substrate surface side and wire-bonded to the first conductive pattern; a resistor formed between the ends of the second and third conductive patterns on the back side of the substrate and having a resistance value adjusted according to the brightness characteristics of the light emitting diode chip; and a transparent resin covering the light emitting diode chip; It consists of
（作用）
本考案のLEDにおいて、LEDチツプは基板の
表面側に取り付けられ、また抵抗体は基板の裏面
側に設けられている。この様にLEDチツプと抵
抗体をそれぞれ異なる面に設けることにより、抵
抗体を基板の裏面上に広く設けることができ、規
定された定格電力を満足する抵抗体を設けること
が可能になる。又、抵抗体の抵抗値を修正する際
にも、LEDチツプの輝度を測定しながら作業す
ることが可能になる。(Function) In the LED of the present invention, the LED chip is attached to the front side of the substrate, and the resistor is provided to the back side of the substrate. By providing the LED chip and the resistor on different surfaces in this manner, the resistor can be widely provided on the back surface of the substrate, and it is possible to provide the resistor that satisfies the specified power rating. Also, when correcting the resistance value of the resistor, it is possible to work while measuring the brightness of the LED chip.
（実施例）
以下、第２図乃至第５図に基づいて本考案の実
施例を説明する。(Example) Hereinafter, an example of the present invention will be described based on FIGS. 2 to 5.
第２図Ａ及びＢは、本考案の一実施例に係る
LEDの表裏を示す斜視図である。 Figures 2A and B relate to an embodiment of the present invention.
FIG. 3 is a perspective view showing the front and back sides of an LED.
１は絶縁性・耐熱性を有するアルミナからなる
基板であり、そのそれぞれ異なる側面には第１、
第２及び第３のスルーホール１ａ，１ｂ，１ｃが
設けられている。 1 is a substrate made of insulating and heat-resistant alumina, and each of its different sides has a first,
Second and third through holes 1a, 1b, and 1c are provided.
２ａ，２ｂ，２ｃは基板１の表裏面に導電性ペ
ーストを印刷することにより形成された第１、第
２及び第３の導電パターンである。この第１、第
２及び第３の導電パターン２ａ，２ｂ，２ｃは、
それぞれ独立しており、第１及び第３の導電パタ
ーン２ａ，２ｃは基板１の第１及び第３のスルー
ホール１ａ，１ｃ内にまで形成されて電極として
使用され、さらに少なくとも第２及び第３の導電
パターン２ｂ，２ｃは第２及び第３のスルーホー
ル１ｂ，１ｃを介して基板１の裏面側までまわり
込むように形成されている。 2a, 2b, and 2c are first, second, and third conductive patterns formed by printing conductive paste on the front and back surfaces of the substrate 1. These first, second and third conductive patterns 2a, 2b, 2c are
The first and third conductive patterns 2a, 2c are formed inside the first and third through holes 1a, 1c of the substrate 1 and are used as electrodes, and the first and third conductive patterns 2a, 2c are formed inside the first and third through holes 1a, 1c of the substrate 1 and are used as electrodes. The conductive patterns 2b, 2c are formed so as to extend to the back side of the substrate 1 via the second and third through holes 1b, 1c.
３は第２の導電パターン２ｂの基板１の表面側
の端部上にダイボンデイング方式によりマウン
ト・接着され、第１の導電パターン２ａにAu又
はAlの細線によりワイヤボンドされているLED
チツプである。 Reference numeral 3 denotes an LED which is mounted and adhered to the end of the second conductive pattern 2b on the surface side of the substrate 1 by a die bonding method, and is wire-bonded to the first conductive pattern 2a with a thin Au or Al wire.
It's a chip.
４は第２の導電パターン２ｂ，２ｃの基板１の
裏面側の端部間に酸化ルテニウム等の抵抗ペース
トを印刷することにより形成された電流制限用の
抵抗体である。 4 is a current limiting resistor formed by printing a resistive paste such as ruthenium oxide between the ends of the second conductive patterns 2b and 2c on the back side of the substrate 1.
５はLEDチツプ３及び細線の保護と光学レン
ズの役割を果たすエポキシ・シリコン等の透明樹
脂であり、ポツテイング又は印刷方式により成形
される。 Reference numeral 5 denotes a transparent resin such as epoxy silicone which serves to protect the LED chip 3 and thin wires and to function as an optical lens, and is molded by potting or printing method.
第３図は本実施例におけるLEDの等価回路を
示す図である。 FIG. 3 is a diagram showing an equivalent circuit of the LED in this example.
抵抗体４は、予め定められた抵抗値になるよう
に印刷されているが、量産プロセスの中では±10
％位のバラツキが生じる。又、LEDチツプ３も
量産プロセスの中では輝度にバラツキが生じる。 The resistor 4 is printed to have a predetermined resistance value, but in the mass production process it is ±10
There will be a variation of about %. Further, the LED chips 3 also have variations in brightness during the mass production process.
この為、同一工程を経て製造したLEDであつ
ても、これを複数並べて使用するような場合、輝
度のバラツキにより明暗が生じることがあつた。 For this reason, even if LEDs are manufactured through the same process, when multiple LEDs are used side by side, brightness and darkness may occur due to variations in brightness.
この様なLED間の輝度のバラツキを小さくす
る方法としては、電流制限用の抵抗値を修正する
ことがあげられる。 One way to reduce such variations in brightness between LEDs is to modify the current limiting resistance value.
抵抗値ＲはＲ＝ρ・Ｌ／Ｗという式で表わされ
る様に抵抗が一定の固有抵抗係数ρを持つ場合、
長さＬに比例し、幅Ｗに反比例する。そこで抵抗
値を高い方向に調整する手段として、幅Ｗを何等
かの方法により狭くすることが応用されている。 The resistance value R is expressed by the formula R=ρ・L/W, and when the resistor has a constant specific resistance coefficient ρ,
It is proportional to the length L and inversely proportional to the width W. Therefore, as a means of adjusting the resistance value in a higher direction, narrowing the width W by some method has been applied.
このように厚膜抵抗体の抵抗値を調整する具体
的な方法としては、サンドブラスト法とレーザー
トリミング法が一般に利用されている。 Sandblasting and laser trimming are generally used as specific methods for adjusting the resistance value of thick film resistors.
第４図Ａは、サンドブラスト法により抵抗値調
整を行なつた例を示す図であるが具体的に説明す
ると、極細のノズル孔より微細な研磨材（アルミ
ナ粉末等）をエアーにて抵抗体４に吹き付け、抵
抗体の一部を削り取ることにより、抵抗体幅Ｗを
狭くし、抵抗値を高くする。 FIG. 4A is a diagram showing an example of adjusting the resistance value using the sandblasting method. To explain specifically, a fine abrasive material (alumina powder, etc.) is applied to the resistor by using air through an extremely fine nozzle hole. By spraying it on the resistor and scraping off a part of the resistor, the resistor width W is narrowed and the resistance value is increased.
又、第４図Ｂに示すレーザートリミング法は、
レーザー光を抵抗体４に照射し、抵抗体の一部を
スリツト状に焼き取ることにより、抵抗体幅Ｗを
狭くし抵抗値を高くする方法である。 Moreover, the laser trimming method shown in FIG. 4B is
This is a method of irradiating the resistor 4 with a laser beam and burning out a part of the resistor in the form of a slit, thereby narrowing the resistor width W and increasing the resistance value.
尚、このような方法により抵抗値を修正する場
合には、導電パターン２ｂ，２ｃ間に抵抗測定器
を接続することにより、抵抗値を希望する値に対
して±２％という高精度で修正することができ
る。 In addition, when correcting the resistance value by such a method, by connecting a resistance measuring device between the conductive patterns 2b and 2c, the resistance value can be corrected with high accuracy of ±2% from the desired value. be able to.
第５図に抵抗値修正の作業工程の一例を示す。 FIG. 5 shows an example of the work process for correcting the resistance value.
はじめに、治具２１に載置されたLED１０の
電極部分にプロープ針１１を当接し、このプロー
プ針１１を介して電流を印加し、発光させる。 First, the probe needle 11 is brought into contact with the electrode portion of the LED 10 placed on the jig 21, and a current is applied through the probe needle 11 to cause it to emit light.
この時の輝度は治具２１の中に組み込まれた輝
度センサー１３によつて検出され、予め設定され
た値よりも輝度が高い場合、抵抗体４を修正する
ことにより抵抗値を大きくし、輝度を低下させ
る。 The brightness at this time is detected by the brightness sensor 13 built into the jig 21, and if the brightness is higher than a preset value, the resistance value is increased by modifying the resistor 4, and the brightness is increased. decrease.
尚、本実施例における説明では、カソード側に
抵抗体４が接続されているが、アノード側へ接続
することも当然可能なことである。 In the description of this embodiment, the resistor 4 is connected to the cathode side, but it is naturally possible to connect it to the anode side.
（考案の効果）
本考案によれば、LEDチツプと抵抗体をそれ
ぞれ基板の表裏面に設けている為、抵抗体を基板
裏面上に大きく形成することができる。この為、
抵抗体の定格電力をより大きくすることができ、
又抵抗値の調節・修正範囲も広げることができ
る。(Effects of the invention) According to the invention, since the LED chip and the resistor are respectively provided on the front and back surfaces of the substrate, the resistor can be formed large on the back surface of the substrate. For this reason,
The rated power of the resistor can be increased,
Furthermore, the range of resistance value adjustment and correction can be expanded.
又、抵抗体は裏面側に配置されている為、
LEDチツプの輝度の測定を自由に行なうことが
できるので、抵抗値の修正作業が容易にでき、品
質や性能の向上とともに製造コストの低減もでき
る。 Also, since the resistor is placed on the back side,
Since the brightness of LED chips can be measured freely, resistance values can be easily corrected, improving quality and performance and reducing manufacturing costs.
第１図は従来の発光ダイオードを示す図、第２
図Ａ，Ｂは本考案の一実施例に係る発光ダイオー
ドの表裏を示す斜視図、第３図は本考案の発光ダ
イオードの等価回路を示す図、第４図Ａ，Ｂは抵
抗値修正後の抵抗体を示す図、第５図は抵抗値修
正の作業工程の一例を示す図である。
１……基板、２ａ，２ｂ，２ｃ……第１、第２
及び第３の導電パターン、３……発光ダイオード
チツプ、４……抵抗体、５……透明樹脂、１０…
…発光ダイオード、１１……プロープ針、１３…
…センサー。
Figure 1 shows a conventional light emitting diode, Figure 2 shows a conventional light emitting diode.
Figures A and B are perspective views showing the front and back sides of a light emitting diode according to an embodiment of the present invention, Figure 3 is a diagram showing an equivalent circuit of the light emitting diode of the present invention, and Figures 4 A and B are after the resistance value has been corrected. FIG. 5, which is a diagram showing a resistor, is a diagram showing an example of a work process for correcting a resistance value. 1...Substrate, 2a, 2b, 2c...1st, 2nd
and third conductive pattern, 3... light emitting diode chip, 4... resistor, 5... transparent resin, 10...
...Light emitting diode, 11...Probe needle, 13...
…sensor.
Claims (1)
面に形成された第１、第２及び第３のスルーホー
ルを有する基板と、 該基板の表面及び前記第１のスルーホール内に
形成された第１の導電パターンと、 該第１の導電パターンから独立すると共に互い
に独立して前記基板表面に形成され、前記第２及
び第３のスルーホールを介して前記基板の裏面に
までまわり込んで形成されている第２及び第３の
導電パターンと、 前記第２の導電パターンの前記基板表面側の端
部上にボンデイングされ、かつ前記第１の導電パ
ターンにワイヤボンデイングされた発光ダイオー
ドチツプと、 前記第２及び第３の導電パターンの前記基板裏
面側の端部間に形成され、かつ前記発光ダイオー
ドチツプの輝度特性に応じて抵抗値が調整された
抵抗体と、 前記発光ダイオードチツプを被覆する透明樹脂
と、 からなることを特徴とする発光ダイオード。[Claims for Utility Model Registration] A substrate having first, second, and third through holes that are insulating and heat resistant and formed on different side surfaces, and a surface of the substrate and the first through hole. a first conductive pattern formed in the hole; and a second conductive pattern formed on the surface of the substrate independently from the first conductive pattern and independently of each other, and connected to the back surface of the substrate through the second and third through holes. second and third conductive patterns formed around the second conductive pattern; bonded onto the end of the second conductive pattern on the substrate surface side and wire-bonded to the first conductive pattern; a light emitting diode chip; a resistor formed between the ends of the second and third conductive patterns on the back side of the substrate and having a resistance value adjusted according to the brightness characteristics of the light emitting diode chip; A light emitting diode comprising: a transparent resin covering a diode chip;
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1984065769U JPS60179057U (en) | 1984-05-04 | 1984-05-04 | light emitting diode |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1984065769U JPS60179057U (en) | 1984-05-04 | 1984-05-04 | light emitting diode |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS60179057U JPS60179057U (en) | 1985-11-28 |
| JPH0414941Y2 true JPH0414941Y2 (en) | 1992-04-03 |
Family
ID=30598059
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1984065769U Granted JPS60179057U (en) | 1984-05-04 | 1984-05-04 | light emitting diode |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS60179057U (en) |
Families Citing this family (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2007080877A (en) * | 2005-09-09 | 2007-03-29 | Matsushita Electric Works Ltd | Color tone correcting method of led light source |
| JP2009277705A (en) * | 2008-05-12 | 2009-11-26 | Koa Corp | Package light-emitting component and method of manufacturing the same |
| JP5726409B2 (en) * | 2009-07-01 | 2015-06-03 | シャープ株式会社 | Light emitting device and method for manufacturing light emitting device |
| JP5623062B2 (en) | 2009-11-13 | 2014-11-12 | シャープ株式会社 | Light emitting device and manufacturing method thereof |
| JP2011151268A (en) | 2010-01-22 | 2011-08-04 | Sharp Corp | Light-emitting device |
| JP2013048163A (en) * | 2011-08-29 | 2013-03-07 | Seiwa Electric Mfg Co Ltd | Semiconductor light-emitting element, light-emitting device and semiconductor light-emitting element manufacturing method |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5429653B2 (en) * | 1971-08-31 | 1979-09-25 | ||
| JPS5918454B2 (en) * | 1980-04-21 | 1984-04-27 | 住友重機械工業株式会社 | Homogenized mixed storage method for dust mainly consisting of blast furnace dust and steelmaking furnace dust |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5429653U (en) * | 1977-07-29 | 1979-02-27 | ||
| JPS5918454U (en) * | 1982-07-27 | 1984-02-04 | 株式会社シチズン電子 | leadless light emitting diode |
-
1984
- 1984-05-04 JP JP1984065769U patent/JPS60179057U/en active Granted
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5429653B2 (en) * | 1971-08-31 | 1979-09-25 | ||
| JPS5918454B2 (en) * | 1980-04-21 | 1984-04-27 | 住友重機械工業株式会社 | Homogenized mixed storage method for dust mainly consisting of blast furnace dust and steelmaking furnace dust |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS60179057U (en) | 1985-11-28 |
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