JPH04111751U - Package cage for storing semiconductor elements - Google Patents

Package cage for storing semiconductor elements

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Publication number
JPH04111751U
JPH04111751U JP1991022539U JP2253991U JPH04111751U JP H04111751 U JPH04111751 U JP H04111751U JP 1991022539 U JP1991022539 U JP 1991022539U JP 2253991 U JP2253991 U JP 2253991U JP H04111751 U JPH04111751 U JP H04111751U
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JP
Japan
Prior art keywords
metal
insulating frame
semiconductor element
frame
external lead
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JP1991022539U
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Japanese (ja)
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JP2543153Y2 (en
Inventor
舟橋明彦
厚地孝雄
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京セラ株式会社
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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/161Cap
    • H01L2924/1615Shape
    • H01L2924/16195Flat cap [not enclosing an internal cavity]

Landscapes

  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
  • Packaging Frangible Articles (AREA)

Abstract

(57)【要約】 (修正有) 【目的】金属基体、絶縁枠体及び金属製蓋体とから成る
容器の気密封止を完全となし、容器内部に収容する半導
体素子を長期間にわたり正常、且つ安定に作動させるこ
とができる半導体素子収納用パッケージを提供すること
にある。 【構成】絶縁枠体2 の矩形状孔部2aの各辺延長線上の領
域を除く表面に外部リードピン7 を取着した。絶縁枠体
2 に金属製蓋体11をシームウエルド法により溶接する
際、シームウエルド装置のローラ電極の摺接が自由とな
り、金属製蓋体11を絶縁枠体2 上に正確、且つ確実に溶
接することが可能となる。
(57) [Summary] (with amendments) [Purpose] Completely air-tightly seal a container consisting of a metal base, an insulating frame, and a metal lid, and ensure that the semiconductor elements housed inside the container function normally for a long period of time. Another object of the present invention is to provide a semiconductor element storage package that can operate stably. [Structure] External lead pins 7 are attached to the surface of the insulating frame 2 except for areas on the extension lines of each side of the rectangular hole 2a. insulation frame
When welding the metal cover 11 to the insulating frame 2 by the seam welding method, the roller electrode of the seam welding device can slide freely, making it possible to accurately and reliably weld the metal cover 11 onto the insulating frame 2. It becomes possible.

Description

【考案の詳細な説明】[Detailed explanation of the idea]

【0001】0001

【産業上の利用分野】[Industrial application field]

本考案は半導体素子、特に半導体集積回路素子を収容するための半導体素子収 納用パッケージの改良に関するものである。 The present invention is a semiconductor element housing for accommodating semiconductor elements, especially semiconductor integrated circuit elements. This concerns improvements to the delivery package.

【0002】0002

【従来の技術】[Conventional technology]

近時、情報処理装置の高性能化、高速度化に伴い、これを構成する半導体素子 も高密度、高集積化が急激に進んでいる。そのため半導体素子の単位面積、単位 体積当たりの発熱量が増大し、半導体素子を正常、且つ安定に作動させるために はその熱をいかに効率的に除去するかが課題となっている。 Recently, as the performance and speed of information processing devices have increased, the semiconductor elements that make up these devices have become more sophisticated. In addition, high density and high integration are rapidly progressing. Therefore, the unit area of the semiconductor element, the unit In order to increase the amount of heat generated per volume and allow semiconductor devices to operate normally and stably. The challenge is how to efficiently remove that heat.

【0003】 従来、半導体素子の発生する熱の除去方法としては図2に示すように上面中央 部に半導体素子23が載置される載置部21a を有した金属基体21上に、前記載置部 21a を囲繞するようにして矩形状の孔部を有する絶縁枠体22をロウ付け接合した 構造の半導体素子収納用パッケージを準備し、金属基体21の半導体素子載置部21 a に半導体素子23を載置固定して半導体素子23が発生する熱を金属基体21に吸収 させるとともに該吸収した熱を大気中に放出することによって行われている。0003 Conventionally, as shown in Figure 2, the method for removing heat generated by semiconductor elements is to The mounting portion 21a is placed on a metal base 21 having a mounting portion 21a on which a semiconductor element 23 is placed. An insulating frame 22 having a rectangular hole is soldered to surround the frame 21a. A package for storing a semiconductor element with a structure is prepared, and the semiconductor element mounting part 21 of the metal base 21 is prepared. The semiconductor element 23 is placed and fixed on a, and the heat generated by the semiconductor element 23 is absorbed into the metal base 21. This is done by releasing the absorbed heat into the atmosphere.

【0004】 尚、前記半導体素子収納用パッケージにおいては絶縁枠体22の上面に多数の外 部リードピン24が等間隔に取着されており、該外部リードピン24を外部電気回路 に接続することによって内部に収容した半導体素子23は外部電気回路と電気的に 接続されることとなる。0004 In addition, in the package for storing semiconductor elements, there are many external parts on the top surface of the insulating frame 22. The external lead pins 24 are installed at equal intervals, and the external lead pins 24 are connected to the external electric circuit. By connecting the semiconductor element 23 housed inside, the semiconductor element 23 is electrically connected to the external electric circuit. It will be connected.

【0005】 また前記パッケージ内への半導体素子23の収容は金属基体21の半導体素子載置 部21a 上に半導体素子23を載置固定し、しかる後、絶縁枠体22の矩形状孔部周辺 に予めロウ付けしておいた金属枠体25に金属製蓋体26をシームウエルド法により 溶接し、半導体素子23を内部に気密に封止することによって行われる。[0005] Further, the accommodation of the semiconductor element 23 in the package is carried out by placing the semiconductor element on the metal base 21. The semiconductor element 23 is placed and fixed on the part 21a, and then the area around the rectangular hole of the insulating frame 22 is The metal lid body 26 is attached to the metal frame body 25 which has been brazed in advance by the seam welding method. This is done by welding and hermetically sealing the semiconductor element 23 inside.

【0006】[0006]

【考案が解決しようとする課題】[Problem that the idea aims to solve]

しかしながら、この従来の半導体素子収納用パッケージおいては、絶縁枠体22 の上面に多数の外部リードピン24が等間隔に取着されているため金属基体21の半 導体素子載置部21a 上に半導体素子23を固定した後、絶縁枠体22に金属製蓋体26 をシームウエルド法により溶接し、半導体素子23を内部を気密に封止する際、シ ームウエルド装置のローラ電極が外部リードピン24に接触してその動きが制限さ れ、金属製蓋体26を絶縁枠体22上に確実、強固に溶接することができず、その結 果、半導体素子収納用パッケージ内部の気密封止が不完全となり、内部に収容す る半導体素子23を長期間にわたり正常、且つ安定に作動させることができないと いう欠点を有していた。 However, in this conventional package for storing semiconductor elements, the insulating frame 22 Since a large number of external lead pins 24 are attached at equal intervals on the top surface, half of the metal base 21 After fixing the semiconductor element 23 on the conductive element mounting part 21a, the metal cover 26 is attached to the insulating frame 22. When the semiconductor element 23 is welded using the seam welding method and the inside of the semiconductor element 23 is hermetically sealed, the The roller electrode of the arm weld device contacts the external lead pin 24 and its movement is restricted. Therefore, the metal cover 26 could not be reliably and firmly welded onto the insulating frame 22, and the resultant As a result, the airtight seal inside the package for storing semiconductor devices becomes incomplete, and the If it is not possible to operate the semiconductor device 23 normally and stably for a long period of time, It had a drawback.

【0007】[0007]

【課題を解決するための手段】[Means to solve the problem]

本考案は半導体素子が載置される載置部を有する金属基体上に、上面に多数個 の外部リードピンが取着された矩形状の孔部を有する絶縁枠体を接合させた構造 の半導体素子収納用パッケージであって、前記外部リードピンは矩形状孔部の各 辺延長線上の領域を除く絶縁枠体上面に取着されていることを特徴とするもので ある。 The present invention is based on a metal base having a mounting part on which a semiconductor element is mounted, and a large number of semiconductor chips mounted on the top surface. A structure in which an insulating frame body with a rectangular hole to which an external lead pin is attached is joined. In this package for storing semiconductor elements, the external lead pins are connected to each of the rectangular holes. It is characterized by being attached to the top surface of the insulating frame excluding the area on the side extension line. be.

【0008】[0008]

【実施例】【Example】

次に本考案を添付図面に示す実施例に基づき詳細に説明する。 Next, the present invention will be described in detail based on embodiments shown in the accompanying drawings.

【0009】 図1 及び図2 は本考案の半導体素子収納用パッケージの一実施例を示し、1 は 金属基体、2は絶縁枠体である。[0009] Figures 1 and 2 show an embodiment of the semiconductor device storage package of the present invention; The metal base 2 is an insulating frame.

【0010】 前記金属基体1 はその上面中央部に半導体素子3 を載置固定するための凸状の 載置部1aが設けてあり、該載置部1a上には半導体素子3 が接着材を介し取着され る。0010 The metal base 1 has a convex shape in the center of its upper surface for mounting and fixing the semiconductor element 3. A mounting section 1a is provided, and a semiconductor element 3 is attached to the mounting section 1a via an adhesive. Ru.

【0011】 前記金属基体1 は銅−タングステン合金から成り、半導体素子3 が発生する熱 を直接吸収するとともに該吸収した熱を大気中に放出する作用を為す。[0011] The metal substrate 1 is made of a copper-tungsten alloy, and the metal substrate 1 is made of a copper-tungsten alloy, and is It has the function of directly absorbing heat and releasing the absorbed heat into the atmosphere.

【0012】 尚、前記金属基体1 を構成する銅−タングステン合金はその熱伝導率が150W/m .Kと高く、そのため半導体素子3 が発生する熱を極めて良好に伝達吸収すること ができる。0012 The copper-tungsten alloy constituting the metal substrate 1 has a thermal conductivity of 150 W/m. .K, which allows it to transfer and absorb heat generated by semiconductor elements extremely well. I can do it.

【0013】 また前記金属基体1 を構成する銅−タングステン合金は、例えばタングステン の粉末( 約10μm)を1000Kg/cm 2 の圧力で加圧成形するとともにこれを還元雰囲 気中、約2300℃の温度で焼成して多孔質のタングステン焼結体を得、次に1100ど 温度で加熱溶融させた銅を前記タングステン焼結体の多孔部分に毛管現象を利用 して含浸させることによって形成される。[0013] The copper-tungsten alloy constituting the metal substrate 1 is prepared by, for example, molding tungsten powder (approximately 10 μm) under pressure at a pressure of 1000 Kg/cm 2 and at a temperature of approximately 2300° C. in a reducing atmosphere. It is formed by firing to obtain a porous tungsten sintered body, and then impregnating the porous portions of the tungsten sintered body with copper heated and melted at a temperature of 1100° C. using capillary action.

【0014】 更に前記金属基体1 を構成する銅−タングステン合金はその熱膨張係数が6.0 ×10-6/ ℃であり、後述するアルミナセラミックス等の電気絶縁材料より成る絶 縁枠体2 と熱膨張係数が近似することから金属基体1 上に絶縁枠体2 をロウ付け 取着したとしても両者間には熱応力が発生することはなく、金属基体1 上に絶縁 枠体2 を極めて強固に取着することが可能となる。Furthermore, the copper-tungsten alloy constituting the metal base 1 has a thermal expansion coefficient of 6.0 × 10 -6 /°C, which is similar to that of the insulating frame 2 made of an electrically insulating material such as alumina ceramics, which will be described later. are similar, so even if insulating frame 2 is brazed and mounted on metal base 1, thermal stress will not occur between the two, and insulating frame 2 can be extremely firmly mounted on metal base 1. It becomes possible to do so.

【0015】 前記金属基体1 はまたその上面外周端に金属基体1 の上面に設けた凸状の載置 部1aを囲繞するようにして矩形状の孔部2aを有する絶縁枠体2 が取着されており 、金属基体1 と絶縁枠体2 とで半導体素子3 を収容するための空所が形成される 。[0015] The metal base 1 also has a convex mounting provided on the upper surface of the metal base 1 at the outer peripheral edge of the upper surface. An insulating frame 2 having a rectangular hole 2a is attached so as to surround the portion 1a. , a space for accommodating a semiconductor element 3 is formed by the metal base 1 and the insulating frame 2. .

【0016】 前記絶縁枠体2 はアルミナセラミックス等の電気絶縁材料から成り、例えばア ルミナ(Al 2 O 3 ) 、マグネシア(MgO) 、カルシア(CaO) 等の原料粉末に適当な 有機溶剤、溶媒を添加混合して泥漿状となすとともにこれをドクターブレード法 を採用することによってセラミックグリーンシート( セラミック生シート) を形 成し、しかる後、前記セラミックグリーンシートに適当な打ち抜き加工を施すと ともに複数枚積層し、高温( 約1600℃) で焼成することによって製作される。The insulating frame 2 is made of an electrically insulating material such as alumina ceramics, and is made by adding an appropriate organic solvent or solvent to a raw material powder such as alumina (Al 2 O 3 ), magnesia (MgO), or calcia (CaO). A ceramic green sheet (ceramic green sheet) is formed by mixing the mixture to form a slurry and applying a doctor blade method to the mixture.Then, the ceramic green sheet is subjected to an appropriate punching process and a plurality of sheets are laminated. Manufactured by firing at high temperatures (approximately 1600℃).

【0017】 また前記絶縁枠体2 はその下面にタングステン、モリブデン等の高融点金属粉 末から成るメタライズ金属層4 が被着されており、該メタライズ金属層4 と金属 基体1 とを銀ロウ等のロウ材5 を介しロウ付けすることによって金属基体1 上に 取着される。[0017] Further, the insulating frame 2 has high melting point metal powder such as tungsten or molybdenum on its lower surface. A metallized metal layer 4 consisting of a The metal base 1 is soldered onto the metal base 1 by brazing the base 1 with a soldering material 5 such as silver solder. attached.

【0018】 尚、この場合、金属基体1 と絶縁枠体2 とはその各々の熱膨張係数が近似する ことから両者間には剥離につながるような熱応力を発生することはない。[0018] In this case, the metal base 1 and the insulating frame 2 have similar coefficients of thermal expansion. Therefore, thermal stress that could lead to peeling is not generated between the two.

【0019】 前記絶縁枠体2 はまた孔部2a周辺から上面にかけてタングステン、モリブデン 等の高融点金属粉末から成るメタライズ配線層6 が設けてあり、該メタライズ配 線層6 は半導体素子3 の電極を外部リードピン7 に接続する作用を為し、その一 端に外部リードピン7 が、また他端に半導体素子3 の電極に接続されたボンディ ングワイヤ8 が各々取着される。[0019] The insulating frame 2 is also coated with tungsten and molybdenum from around the hole 2a to the top surface. A metallized wiring layer 6 made of high melting point metal powder such as The wire layer 6 serves to connect the electrode of the semiconductor element 3 to the external lead pin 7, and one of the An external lead pin 7 is connected to one end, and a bonder is connected to the electrode of the semiconductor element 3 at the other end. The connecting wires 8 are respectively attached.

【0020】 前記メタライズ配線層6 はタングステン等の高融点金属粉末に適当な有機溶剤 、溶媒を添加混合して得た金属ペーストを絶縁枠体2 となるセラミックグリーン シート上に従来周知のスクリーン印刷法を採用し所定パターンに印刷塗布してお くことによって絶縁枠体2 の孔部2a周辺から上面かけて導出するように形成され る。[0020] The metallized wiring layer 6 is made of an organic solvent suitable for high melting point metal powder such as tungsten. The metal paste obtained by adding and mixing a solvent is made into ceramic green, which becomes the insulating frame 2. The sheet is printed and coated in a predetermined pattern using the well-known screen printing method. By doing so, the insulating frame 2 is formed so as to extend from around the hole 2a to the top surface. Ru.

【0021】 また前記メタライズ配線層6 に取着される外部リードピン7 は内部に収容する 半導体素子3 の各電極を外部電気回路に接続する作用を為し、コバール金属(Fe- Ni-Co 合金) や42アロイ(Fe-Ni合金) 等の金属を棒状に加工したものが使用され る。[0021] Further, external lead pins 7 attached to the metallized wiring layer 6 are housed inside. It serves to connect each electrode of the semiconductor element 3 to an external electric circuit, and is made of Kovar metal (Fe- Metals such as Ni-Co alloy (Ni-Co alloy) or 42 alloy (Fe-Ni alloy) are used. Ru.

【0022】 前記外部リードピン7 は図2 に示す如く、矩形状孔部2aの各辺延長線上の領域 を除く絶縁枠体2 の上面に取着されており、これによって後述する矩形状孔部2a の周辺に金属製蓋体11をシームウエルド法により溶接する際、シームウエルド装 置のローラ電極が外部リードピン7 に接触することは殆どなく、金属製蓋体11を 絶縁枠体2 に確実、且つ強固に取着させることができる。[0022] As shown in FIG. 2, the external lead pin 7 is located in an area on the extension line of each side of the rectangular hole 2a. It is attached to the upper surface of the insulating frame 2 except for the rectangular hole 2a, which will be described later. When welding the metal lid body 11 around the seam welding method, the seam welding The roller electrode at the position almost never contacts the external lead pin 7, and the metal lid It can be securely and firmly attached to the insulating frame 2.

【0023】 尚、前記外部リードピン7 の外表面にニッケル、金等から成る良導電性で、且 つ耐蝕性に優れた金属をメッキにより1.0 乃至20.0μm 厚みに層着させておくと 外部リードピン7 と外部電気回路との電気的接続が良好となるとともに外部リー ドピン7 の酸化腐食が有効に防止される。従って、外部リードピン7 の外表面に はニッケル、金等から成る金属をメッキにより1.0 乃至20.0μm 厚みに層着させ ておくことが好ましい。[0023] Note that the outer surface of the external lead pin 7 is made of nickel, gold, etc. and has good conductivity. By plating a metal with excellent corrosion resistance to a thickness of 1.0 to 20.0 μm, The electrical connection between the external lead pin 7 and the external electric circuit is improved, and the external lead pin 7 is Oxidation corrosion of dopin 7 is effectively prevented. Therefore, the outer surface of external lead pin 7 is made by plating metals such as nickel and gold to a thickness of 1.0 to 20.0 μm. It is preferable to keep it.

【0024】 また前記絶縁枠体2 はその孔部2a周辺にメタライズ金属層9 を介して金属枠体 10が取着されており、該金属枠体10には金属製蓋体11がシームウエド法により溶 接され、これによって金属基体1 、絶縁枠体2 及び金属製蓋体11とから成る容器 が気密に封止される。[0024] Further, the insulating frame 2 is provided with a metallized metal layer 9 around the hole 2a. 10 is attached to the metal frame 10, and a metal lid 11 is welded to the metal frame 10 by seam welding. A container comprising a metal base 1, an insulating frame 2 and a metal lid 11 is hermetically sealed.

【0025】 前記金属枠体10はコバール金属や42アロイ等の金属から成り、金属製蓋体10を 絶縁枠体2 に取着する際に下地金属部材として作用し、絶縁枠体2 の孔部2a周辺 に予め被着させておいたメタライズ金属層9 に銀ロウ等のロウ材を介しロウ付け することによって絶縁枠体2 の孔部2a周辺に取着される。[0025] The metal frame 10 is made of metal such as Kovar metal or 42 alloy, and the metal lid 10 is made of metal such as Kovar metal or 42 alloy. When attached to the insulating frame 2, it acts as a base metal member, and the area around the hole 2a of the insulating frame 2 The metallized metal layer 9 previously deposited on the metal layer 9 is soldered using a soldering material such as silver solder. By doing so, it is attached around the hole 2a of the insulating frame 2.

【0026】 尚、前記メタライズ金属層9 はタングステン、モリブデン等の高融点金属粉末 から成り、タングステン粉末等の高融点金属粉末に適当な有機溶剤、溶媒を添加 混合して得た金属ペーストを絶縁枠体2 の孔部2a周辺に従来周知のスクリーン印 刷法より印刷塗布するとともにこれを高温で焼き付けることによって絶縁枠体2 の孔部2a周辺に被着される。[0026] The metallized metal layer 9 is made of high melting point metal powder such as tungsten or molybdenum. It consists of adding an appropriate organic solvent or solvent to high melting point metal powder such as tungsten powder. The metal paste obtained by mixing is applied to the area around the hole 2a of the insulating frame 2 using a well-known screen mark. The insulating frame 2 is made by applying printing using the printing method and baking it at high temperature. is applied around the hole 2a.

【0027】 かくして本考案の半導体素子収納用パッケージによれば金属基体1 の半導体素 子載置部1a上に半導体素子3 を接着材を介し取着するとともに半導体素子3 の各 電極をメタライズ配線層6 にボンディングワイヤ8 を介して電気的に接続し、し かる後、絶縁枠体2 の孔部2a周辺に取着させた金属枠体10に金属製蓋体11をシー ムウエルド法により溶接し、金属基体1 、絶縁枠体2 及び金属製蓋体11から成る 容器の内部を気密に封止することによって最終製品としての半導体装置となる。[0027] Thus, according to the semiconductor device storage package of the present invention, the semiconductor device on the metal base 1 is The semiconductor device 3 is attached onto the child mounting portion 1a via an adhesive, and each of the semiconductor devices 3 is The electrode is electrically connected to the metallized wiring layer 6 via the bonding wire 8, and then After that, the metal lid 11 is sealed to the metal frame 10 attached around the hole 2a of the insulating frame 2. Welded using the Muweld method, it consists of a metal base 1, an insulating frame 2, and a metal lid 11. By airtightly sealing the inside of the container, the final product is a semiconductor device.

【0028】 尚、前記金属製蓋体11の金属枠体10への溶接は金属枠体10上に金属製蓋体11を 載置するとともに該金属製蓋体11の外周部にシームウエルド装置のローラ電極を 摺接させながら約150A程度の高電流を印加し、金属製蓋体11と金属枠体10の各々 の接合部を瞬間的に溶融させることによって行われる。この場合、絶縁枠体2 の 矩形状孔部2aの各辺延長線上の領域には外部リードピン7 が存在しないためシー ムウエルド装置のローラ電極はその摺接が自由となり、その結果、金属製蓋体11 を金属枠体10に正確、且つ確実に溶接することが可能となり、金属基体1 、絶縁 枠体2 及び金属製蓋体11から成る容器の気密封止はその信頼性が極めて高いもの となる。[0028] Note that the metal lid 11 is welded to the metal frame 10 by welding the metal lid 11 onto the metal frame 10. At the same time, a roller electrode of a seam welding device is placed on the outer periphery of the metal lid 11. A high current of approximately 150 A is applied to each of the metal lid body 11 and the metal frame body 10 while making sliding contact. This is done by instantaneously melting the joints. In this case, insulating frame 2 There is no external lead pin 7 in the area on the extension line of each side of the rectangular hole 2a, so there is no seal. The roller electrode of the muweld device can slide freely, and as a result, the metal lid 11 can be accurately and reliably welded to the metal frame 10, and the metal base 1 and the insulation The hermetic sealing of the container consisting of the frame 2 and the metal lid 11 is extremely reliable. becomes.

【0029】[0029]

【考案の効果】[Effect of the idea]

本考案の半導体素子収納用パッケージによれば、外部リードピンを絶縁枠体の 矩形状孔部の各辺延長線上の領域を除く表面に取着したことから絶縁枠体に金属 製蓋体をシームウエルド法により溶接する際、シームウエルド装置のローラ電極 の摺接が自由となり、その結果、金属製蓋体を絶縁枠体上に正確、且つ確実に溶 接することが可能となり、金属基体、絶縁枠体、金属製蓋体から成る容器の気密 封止を極めて信頼性の高いものとなすことができる。従って、本考案の半導体素 子収納用パッケージによれば内部に収容する半導体素子を長期間にわたり常に正 常、且つ安定に作動させることが可能となる。 According to the semiconductor device storage package of the present invention, the external lead pins are connected to the insulating frame. Since it was attached to the surface excluding the area on the extension line of each side of the rectangular hole, there was no metal in the insulating frame. When welding lids using the seam welding method, the roller electrode of the seam welding device As a result, the metal cover can be accurately and reliably welded onto the insulating frame. This allows for airtightness of containers consisting of a metal base, insulating frame, and metal lid. The sealing can be made extremely reliable. Therefore, the semiconductor element of the present invention According to the child storage package, the semiconductor elements housed inside are kept in good condition for a long period of time. It becomes possible to operate constantly and stably.

【図面の簡単な説明】[Brief explanation of drawings]

【図1】本考案の半導体素子収納用パッケージの一実施
例を示す断面図である。
FIG. 1 is a cross-sectional view showing an embodiment of a semiconductor device storage package of the present invention.

【図2】図1に示すパッケージの平面図である。FIG. 2 is a plan view of the package shown in FIG. 1;

【図3】従来の半導体素子収納用パッケージの断面図で
ある。
FIG. 3 is a cross-sectional view of a conventional semiconductor device storage package.

【符号の説明】[Explanation of symbols]

1・・・金属基体 2・・・絶縁枠体 2a・・矩形状孔部 7・・・外部リード端子 10・・金属枠体 11・・金属製蓋体 1...metal base 2...Insulating frame 2a...Rectangular hole 7...External lead terminal 10...Metal frame 11...Metal lid body

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 【請求項1】半導体素子が載置される載置部を有する金
属基体上に、上面に多数個の外部リードピンが取着され
た矩形状の孔部を有する絶縁枠体を接合させた構造の半
導体素子収納用パッケージであって、前記外部リードピ
ンは矩形状孔部の各辺延長線上の領域を除く絶縁枠体上
面に取着されていることを特徴とする半導体素子収納用
パッケージ。
Claims: 1. A semiconductor device having a structure in which an insulating frame having a rectangular hole having a plurality of external lead pins attached to its upper surface is bonded to a metal base having a mounting portion on which a semiconductor element is mounted. 1. A package for accommodating semiconductor elements, wherein the external lead pins are attached to the upper surface of the insulating frame excluding areas on extension lines of each side of the rectangular hole.
JP1991022539U 1991-03-13 1991-03-13 Package for storing semiconductor elements Expired - Lifetime JP2543153Y2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1991022539U JP2543153Y2 (en) 1991-03-13 1991-03-13 Package for storing semiconductor elements

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1991022539U JP2543153Y2 (en) 1991-03-13 1991-03-13 Package for storing semiconductor elements

Publications (2)

Publication Number Publication Date
JPH04111751U true JPH04111751U (en) 1992-09-29
JP2543153Y2 JP2543153Y2 (en) 1997-08-06

Family

ID=31908025

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1991022539U Expired - Lifetime JP2543153Y2 (en) 1991-03-13 1991-03-13 Package for storing semiconductor elements

Country Status (1)

Country Link
JP (1) JP2543153Y2 (en)

Also Published As

Publication number Publication date
JP2543153Y2 (en) 1997-08-06

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