JP2690666B2 - Manufacturing method of semiconductor device storage package - Google Patents

Manufacturing method of semiconductor device storage package

Info

Publication number
JP2690666B2
JP2690666B2 JP23351492A JP23351492A JP2690666B2 JP 2690666 B2 JP2690666 B2 JP 2690666B2 JP 23351492 A JP23351492 A JP 23351492A JP 23351492 A JP23351492 A JP 23351492A JP 2690666 B2 JP2690666 B2 JP 2690666B2
Authority
JP
Japan
Prior art keywords
metallized
external lead
brazing material
pads
semiconductor element
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP23351492A
Other languages
Japanese (ja)
Other versions
JPH0685137A (en
Inventor
廉可 國松
正行 馬郡
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Kyocera Corp
Original Assignee
Kyocera Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kyocera Corp filed Critical Kyocera Corp
Priority to JP23351492A priority Critical patent/JP2690666B2/en
Publication of JPH0685137A publication Critical patent/JPH0685137A/en
Application granted granted Critical
Publication of JP2690666B2 publication Critical patent/JP2690666B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【産業上の利用分野】本発明は半導体素子を収容するた
めの半導体素子収納用パッケージの製造方法に関するも
のである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a semiconductor device housing package for housing a semiconductor device.

【0002】[0002]

【従来技術】従来、LSI等の半導体素子を収容するた
めの半導体素子収納用パッケージは、アルミナセラミッ
クス等の電気絶縁材料から成り、上面略中央部に半導体
素子を収容する空所を形成するための凹部及び該凹部周
辺から上面外周部に導出する複数のメタライズ配線層を
有する四角形状の絶縁基体と、前記メタライズ配線層に
電気的に接続された外部リード端子と、蓋体とから構成
され、前記絶縁基体の凹部底面に半導体素子をガラス、
樹脂、半田等の接着剤を介して取着固定するとともに該
半導体素子の各電極をメタライズ配線層にボンディング
ワイヤーを介して接続させ、最後に前記絶縁基体の上面
に蓋体をガラス、樹脂、半田等の封止材を介して接合さ
せ絶縁基体と蓋体とから成る容器内部に半導体素子を気
密に封止することによって最終製品としての半導体装置
となる。
2. Description of the Related Art Conventionally, a semiconductor element housing package for housing a semiconductor element such as an LSI is made of an electrically insulating material such as alumina ceramics, and is used to form a space for housing a semiconductor element in a substantially central portion of an upper surface. A rectangular insulating substrate having a recess and a plurality of metallized wiring layers extending from the periphery of the recess to the outer periphery of the upper surface; external lead terminals electrically connected to the metallized wiring layer; and a lid. The semiconductor element is glass on the bottom surface of the recess of the insulating substrate,
The electrodes are attached and fixed through an adhesive such as resin or solder, and each electrode of the semiconductor element is connected to a metallized wiring layer through a bonding wire. Finally, a lid is attached to the upper surface of the insulating substrate by glass, resin, or solder. A semiconductor device as a final product is obtained by hermetically sealing a semiconductor element inside a container made up of an insulating substrate and a lid by bonding them via a sealing material such as.

【0003】前記半導体素子収納用パッケージにおいて
は通常、絶縁基体の上面外周部にメタライズ配線層と電
気的に接続されたメタライズパッドが所定間隔で周列状
に設けられており、該メタライズパッドに外部リード端
子を銀ロウを等のロウ材を介して接合することにより外
部リード端子がメタライズ配線層に電気的に接続される
こととなる。
In the above-mentioned package for accommodating semiconductor elements, usually, metallized pads electrically connected to the metallized wiring layer are provided on the outer peripheral portion of the upper surface of the insulating substrate in a peripheral shape at a predetermined interval, and the metallized pads are externally provided. The external lead terminals are electrically connected to the metallized wiring layer by joining the lead terminals with a brazing material such as silver solder.

【0004】また、前記絶縁基体のメタライズパッドに
外部リード端子をロウ材を介して接合させるには、先
ず、絶縁基体のメタライズパッド上に銀ロウ等のロウ材
を方形環状にスクリーン印刷法により印刷塗布するとと
もに該ロウ材上で各メタライズパッドに対応する位置に
各外部リード端子を載置位置合わせし、しかる後、これ
を約900℃の温度に加熱し、ロウ材を溶融させてメタ
ライズパッドと外部リード端子をロウ付固着させること
によって行われる。
In order to join the external lead terminals to the metallized pad of the insulating substrate via the brazing material, first, a brazing material such as silver brazing is printed in a square ring shape on the metallized pad of the insulating substrate by a screen printing method. The external lead terminals are placed and aligned on the brazing material at positions corresponding to the metallizing pads on the brazing material, and then heated to a temperature of about 900 ° C. to melt the brazing material to form a metallizing pad. This is done by fixing the external lead terminals with brazing.

【0005】尚、前記方形環状のロウ材を加熱溶融させ
て外部リード端子をメタライズパッドにロウ付固着させ
る場合、溶融したロウ材は表面張力によって縮まろうと
する力が働くこと及び溶融ロウ材はメタライズパッドと
の濡れ性が良く、メタライズパッドに引っ張られる力が
作用すること等からメタライズパッドと外部リード端子
との間に選択的に移行し、外部リード端子をメタライズ
パッドに強固にロウ付固着することが可能となる。
When the rectangular annular brazing material is heated and melted to fix the external lead terminals to the metallized pad by brazing, the molten brazing material has a force to shrink due to surface tension and the molten brazing material is metalized. Since the wettability with the pad is good and the pulling force on the metallized pad acts, it is possible to selectively transfer between the metallized pad and the external lead terminal, and firmly fix the external lead terminal to the metallized pad with brazing. Is possible.

【0006】[0006]

【発明が解決しようとする課題】しかしながら、近時、
半導体素子収納用パッケージはその内部に収容する半導
体素子が高密度化、高集積化し、パッケージに使用され
る外部リード端子もその数が極めて多いものとなり、個
々の外部リード端子の間隔が狭くなるとともにメタライ
ズパッドの間隔も狭いものとなってきている。
However, recently,
In the package for storing semiconductor elements, the density of the semiconductor elements accommodated in the package is high and the integration is high, and the number of external lead terminals used in the package is extremely large, and the distance between the individual external lead terminals is narrowed. The space between metallized pads is becoming narrower.

【0007】そのため、絶縁基体のメタライズパッド上
に方形環状のロウ材を被着させるとともに該ロウ材を加
熱溶融させることによって各メタライズパッドに外部リ
ード端子をロウ付けする場合、各メタライズパッド間の
間隔が狭いため、各メタライズパッド間における溶融ロ
ウ材の表面張力による縮み力が弱いものとなり、その結
果、溶融ロウ材は各メタライズパッド間で分断されずつ
ながった状態で隣接するメタライズパッド間に接合し、
隣接するメタライズパッド間を電気的に短絡されてしま
うという欠点を有していた。
Therefore, when the external lead terminal is brazed to each metallized pad by depositing a square annular brazing material on the metallized pad of the insulating substrate and heating and melting the brazing material, the distance between the metallized pads is reduced. Since the metallized pads are narrow, the shrinkage force due to the surface tension of the molten brazing material between the metallized pads becomes weak, and as a result, the molten brazing material is not divided between the metallized pads and is joined between adjacent metallized pads in a connected state. ,
It has a drawback that adjacent metallized pads are electrically short-circuited.

【0008】[0008]

【発明の目的】本発明は上述の欠点に鑑み案出されたも
ので、その目的は絶縁基体に設けたメタライズパッドに
所定の外部リード端子をメタライズパッド間に短絡不良
を発生させることなく強固に、且つ確実に接合させるこ
とが可能な半導体素子収納用パッケージの製造方法を提
供することにある。
SUMMARY OF THE INVENTION The present invention has been devised in view of the above-mentioned drawbacks, and an object of the present invention is to firmly fix a predetermined external lead terminal to a metallized pad provided on an insulating substrate without causing a short circuit between the metallized pads. Another object of the present invention is to provide a method for manufacturing a package for housing a semiconductor element, which can ensure reliable bonding.

【0009】[0009]

【課題を解決するための手段】本発明の半導体素子収納
用パッケージの製造方法は、内部に半導体素子を収納す
るための空所を有する四角形状の絶縁容器の外表面に、
内部に収容する半導体素子の電極が電気的に接続されて
いる複数のメタライズパッドを周列状に被着させるとと
もに該メタライズパッドに外部リード端子をロウ材を介
しロウ付けして成る半導体素子収納用パッケージであっ
て、前記外部リード端子が下記(1)乃至(4)の工程
により絶縁容器に被着させたメタライズパッドにロウ付
けされることを特徴とするものである。
A method of manufacturing a package for accommodating a semiconductor element according to the present invention comprises a rectangular insulating container having a cavity for accommodating a semiconductor element inside,
A semiconductor element storage device in which a plurality of metallized pads to which electrodes of a semiconductor element to be housed inside are electrically connected are attached in a peripheral shape, and external lead terminals are brazed to the metallized pads via a brazing material. The package is characterized in that the external lead terminals are brazed to a metallized pad adhered to an insulating container by the following steps (1) to (4).

【0010】(1)絶縁容器の外表面に複数個のメタラ
イズパッドをその端部が交互に外側及び内側に突出する
ようにして周列状に被着させる工程、(2)前記外側に
端部が突出する各メタライズパッドを該突出領域に第1
の帯状ロウ材を接合させ共通に接続する工程、(3)前
記内側に端部が突出する各メタライズパッドを該突出領
域に第2の帯状ロウ材を接合させて共通に接続する工
程、(4)前記各メタライズパッド上に外部リード端子
の先端部を載置させるとともに前記第1及び第2の帯状
ロウ材を加熱溶融させ各メタライズパッド上に外部リー
ド端子を接合させる工程。
(1) A step of circumferentially depositing a plurality of metallized pads on the outer surface of the insulating container so that the ends of the metallized pads alternately project to the outside and the inside, and (2) the ends to the outside. The metallized pads protruding from the first
Joining the strip-shaped brazing filler metal of (1) and connecting them in common, (3) joining each metallized pad whose end protrudes inward to the protruding region and jointly connecting the second strip-shaped brazing filler metal, (4) ) A step of placing the tip portions of the external lead terminals on the metallized pads and heating and melting the first and second band-shaped brazing materials to bond the external lead terminals to the metallized pads.

【0011】[0011]

【実施例】次に本発明を添付の図面により詳細に説明す
る。図1、図2は本発明の製造方法が適用される半導体
素子収納用パッケージの一実施例を示し、1は絶縁基
体、2は蓋体であり、前記絶縁基体1及び蓋体2とで半
導体素子4を収容するための容器3を構成する。
The present invention will now be described in detail with reference to the accompanying drawings. 1 and 2 show an embodiment of a package for housing a semiconductor device to which the manufacturing method of the present invention is applied, 1 is an insulating base, 2 is a lid, and the insulating base 1 and the lid 2 are semiconductors. A container 3 for housing the element 4 is constructed.

【0012】前記絶縁基体1はアルミナセラミックス等
の電気絶縁材料からなり、その上面略中央部には半導体
素子4を収容する空所を形成するための凹部1aが形成
されており、該凹部1a底面には半導体素子4がガラ
ス、樹脂、半田等の接着剤を介して取着固定される。
The insulating base 1 is made of an electrically insulating material such as alumina ceramics, and a recess 1a for forming a space for accommodating the semiconductor element 4 is formed in a substantially central portion of the upper surface thereof, and the bottom of the recess 1a is formed. The semiconductor element 4 is attached and fixed to the semiconductor element 4 via an adhesive such as glass, resin, or solder.

【0013】また、前記絶縁基体1はその凹部1a周辺
から上面外周部にかけてタングステン、モリブデン等の
高融点金属粉末から成るメタライズ配線層5が被着形成
されている。
A metallized wiring layer 5 made of a refractory metal powder such as tungsten or molybdenum is deposited on the insulating substrate 1 from the periphery of the recess 1a to the outer peripheral portion of the upper surface.

【0014】前記メタライズ配線層5は内部に収容する
半導体素子4を外部と電気的に接続する作用を為し、該
メタライズ配線層5の凹部1a周辺部位には半導体素子
4の各電極がボンディングワイヤー6を介して電気的に
接続される。
The metallized wiring layer 5 serves to electrically connect the semiconductor element 4 housed inside to the outside, and each electrode of the semiconductor element 4 is bonded to a bonding wire around the recess 1a of the metallized wiring layer 5. It is electrically connected via 6.

【0015】尚、前記メタライズ配線層5はその露出す
る外表面にニッケル、金等の耐食性に優れ、且つ良導電
性の金属をメッキ法により1.0乃至20.0μmの厚
みに層着させておくとメタライズ配線層5が酸化腐食す
るのを防止するとともにメタライズ配線層5とボンディ
ングワイヤー6との接続を強固なものとなすことができ
る。従って、前記メタライズ配線層5が酸化腐食するの
を防止するとともにメタライズ配線層5とボンディング
ワイヤー6との接続を強固なものとなすためにはメタラ
イズ配線層5の露出する外表面にニッケル、金等の耐食
性に優れ、且つ良導電性の金属をメッキ法により1.0
乃至20.0μmの厚みに層着させておくことが好まし
い。
The metallized wiring layer 5 is formed by depositing a metal such as nickel or gold having a high corrosion resistance and good conductivity on the exposed outer surface by plating to a thickness of 1.0 to 20.0 μm. If so, the metallized wiring layer 5 can be prevented from being oxidized and corroded, and the connection between the metallized wiring layer 5 and the bonding wire 6 can be strengthened. Therefore, in order to prevent the metallized wiring layer 5 from being oxidized and corroded and to make the connection between the metallized wiring layer 5 and the bonding wire 6 strong, nickel, gold or the like must be provided on the exposed outer surface of the metallized wiring layer 5. Excellent corrosion resistance and good conductivity of metal by plating method
It is preferable to coat the layer to a thickness of 20.0 μm to 20.0 μm.

【0016】また、前記絶縁基体1の上面外周部にはメ
タライズ配線層5と電気的に接続されたタングステン、
モリブデン等の高融点金属粉末から成るメタライズパッ
ド7が被着形成されており、該メタライズパッド7には
外部リード端子8が銀ロウ等のロウ材9を介して接合さ
れている。
On the outer peripheral surface of the upper surface of the insulating substrate 1, tungsten electrically connected to the metallized wiring layer 5,
A metallized pad 7 made of a refractory metal powder such as molybdenum is adhered and formed, and an external lead terminal 8 is joined to the metallized pad 7 via a brazing material 9 such as silver solder.

【0017】前記メタライズパッド7は外部リード端子
8を絶縁基体1に接合させるための下地金属として作用
し、絶縁基体1外周端に沿って所定間隔で周列状に配置
されており、その一部を絶縁基体1の外側及び内側に交
互に突出させている。
The metallized pads 7 act as a base metal for joining the external lead terminals 8 to the insulating base 1, and are arranged in a row along the outer peripheral edge of the insulating base 1 at predetermined intervals. Are alternately projected to the outside and the inside of the insulating base 1.

【0018】尚、前記メタライズパッド7はその一部を
絶縁基体1の外側及び内側に交互に突出させているの
で、後述する製造方法において帯状のロウ材をメタライ
ズパッド7の一つおきに接触させることができ、ロウ材
が接触する部位においてメタライズパッド7間の間隔を
広いものとなすことができる。
Since a part of the metallized pad 7 is alternately projected to the outer side and the inner side of the insulating substrate 1, a strip-shaped brazing material is brought into contact with every other metallized pad 7 in the manufacturing method described later. Therefore, it is possible to widen the space between the metallized pads 7 at the portion where the brazing material contacts.

【0019】また、前記メタライズパッド7はその露出
する外表面にニッケル、金等の耐食性に優れ、且つ良導
電性の金属をメッキ法により1.0乃至20.0μmの
厚みに層着させておくとメタライズパッド7が酸化腐食
するのを防止するとともにメタライズパッド7と外部リ
ード端子8との接合を強固なものとなすことができる。
従って、前記メタライズパッド7が酸化腐食するのを防
止するとともにメタライズパッド7と外部リード端子8
との接合を強固なものとなすためにはメタライズパッド
7の露出する外表面にニッケル、金等の耐食性に優れ、
且つ良導電性の金属をメッキ法により1.0乃至20.
0μmの厚みに層着させておくことが好ましい。
The metallized pad 7 is formed by depositing a metal such as nickel or gold having excellent corrosion resistance and good conductivity on the exposed outer surface by plating to a thickness of 1.0 to 20.0 μm. Thus, the metallized pad 7 can be prevented from being oxidized and corroded, and the metallized pad 7 and the external lead terminal 8 can be joined firmly.
Therefore, the metallized pad 7 is prevented from being oxidized and corroded, and the metallized pad 7 and the external lead terminals 8 are prevented.
In order to form a strong bond with the metallized pad 7, the exposed outer surface of the metallized pad 7 has excellent corrosion resistance against nickel, gold, etc.,
In addition, a metal having good conductivity is used in an amount of 1.0 to 20.
It is preferable to apply a layer to a thickness of 0 μm.

【0020】また、前記メタライズパッド7に接合され
る外部リード端子8は42アロイ(Fe−Ni合金)、
コバール(Fe−Ni−Co合金)等の金属から成る棒
状体であり、内部に収容する半導体素子4を外部電気回
路に電気的に接続する作用を為す。
The external lead terminal 8 joined to the metallized pad 7 is 42 alloy (Fe-Ni alloy),
It is a rod-shaped body made of a metal such as Kovar (Fe-Ni-Co alloy) and has a function of electrically connecting the semiconductor element 4 housed inside to an external electric circuit.

【0021】また、前記外部リード端子8はその内端部
の0.1乃至1.0mmが下方に45乃至60゜の角度
に折曲げられており、これによって該先端部とメタライ
ズパッド7との間で多量のロウ材の溜りを形成できるよ
うになっている。
Further, 0.1 to 1.0 mm of the inner end portion of the external lead terminal 8 is bent downward at an angle of 45 to 60 °, whereby the tip portion and the metallized pad 7 are connected. A large amount of brazing material pool can be formed between them.

【0022】また、前記外部リード端子8はその露出す
る外表面にニッケル、金等の耐食性に優れ、且つ良導電
性の金属をメッキ法により1.0乃至20.0μmの厚
みに層着させておくと外部リード端子8が酸化腐食する
のを防止するとともに外部リード端子8と外部電気回路
との接続を強固なものとなすことができる。従って、前
記外部リード端子8が酸化腐食するのを防止するととも
に外部リード端子8と外部電気回路との接続を強固なも
のとなすためには外部リード端子8の露出する外表面に
ニッケル、金等の耐食性に優れ、且つ良導電性の金属を
メッキ法により1.0乃至20.0μmの厚みに層着さ
せておくことが好ましい。
The external lead terminal 8 is formed by depositing a metal having excellent corrosion resistance such as nickel and gold and having good conductivity on the exposed outer surface by plating to a thickness of 1.0 to 20.0 μm. If this is done, the external lead terminals 8 can be prevented from being oxidized and corroded, and the connection between the external lead terminals 8 and the external electric circuit can be made firm. Therefore, in order to prevent the external lead terminals 8 from being oxidized and corroded and to strengthen the connection between the external lead terminals 8 and the external electric circuit, nickel, gold or the like is formed on the exposed outer surface of the external lead terminals 8. It is preferable to deposit a metal having excellent corrosion resistance and good conductivity in a thickness of 1.0 to 20.0 μm by a plating method.

【0023】かくして本発明の半導体素子収納用パッケ
ージによれば、絶縁基体1の凹部1a底面に半導体素子
4をガラス、樹脂、半田等の接着剤を介して取着固定す
るとともに外半導体素子4の各電極をボンディングワイ
ヤー6を介してメタライズ配線層5に電気的に接続さ
せ、しかる後、前記絶縁基体1の上面に蓋体2をガラ
ス、樹脂、半田等の封止材を介して接合させ、絶縁基体
1と蓋体2とで構成される容器3内部に半導体素子4が
気密に封止されることとなる。
Thus, according to the package for accommodating the semiconductor element of the present invention, the semiconductor element 4 is attached and fixed to the bottom surface of the recess 1a of the insulating substrate 1 via an adhesive such as glass, resin, solder, and the like. Each electrode is electrically connected to the metallized wiring layer 5 via the bonding wire 6, and then the lid 2 is joined to the upper surface of the insulating substrate 1 via a sealing material such as glass, resin or solder, The semiconductor element 4 is hermetically sealed inside the container 3 composed of the insulating base 1 and the lid 2.

【0024】次に本発明の半導体素子収納用パッケージ
の製造方法について図3及び図4に基づき説明する。
Next, a method of manufacturing the semiconductor element housing package of the present invention will be described with reference to FIGS.

【0025】先ず、図3に示すように半導体素子を収容
する凹部を有する四角形状の絶縁基体1と外部リード端
子8とを準備する。
First, as shown in FIG. 3, a rectangular insulating substrate 1 having a recess for accommodating a semiconductor element and an external lead terminal 8 are prepared.

【0026】前記絶縁基体1はアルミナ(Al2 3
シリカ(SiO2 )、カルシア(CaO)、マグネシア
(MgO)等の原料粉末に適当なバインダー、有機溶媒
を添加混合して泥漿状となすとともにこれを従来周知の
ドクターブレード法を採用することによってセラミック
グリーンシート(セラミック生シート)を得、しかる
後、前記セラミックグリーンシートに適当な打ち抜き加
工を施すとともにこれを複数枚積層し、高温(約160
0℃)の温度で焼成することによって製作される。
The insulating substrate 1 is alumina (Al 2 O 3 )
Ceramics are prepared by adding and mixing an appropriate binder and an organic solvent to raw material powders such as silica (SiO 2 ), calcia (CaO) and magnesia (MgO) to form a sludge and adopting the conventionally known doctor blade method. A green sheet (ceramic green sheet) is obtained, and thereafter, the ceramic green sheet is subjected to appropriate punching processing, and a plurality of the green sheets are laminated to obtain a high temperature (about 160
It is manufactured by firing at a temperature of 0 ° C.

【0027】また、前記外部リード端子8は42アロイ
やコバール等の金属のインゴット(塊)を圧延加工、エ
ッチング加工、プレス加工等の金属加工法を採用するこ
とによって内端部が下方に折曲がった棒状で、且つ外端
部が連結部材10で所定間隔に連結された状態に成形さ
れる。
The outer lead terminal 8 is bent at its inner end downward by adopting a metal working method such as rolling, etching or pressing of an ingot (lump) of metal such as 42 alloy or Kovar. It is formed into a rod shape, and its outer ends are connected by the connecting member 10 at predetermined intervals.

【0028】尚、前記連結部材10は外部リード端子8
を所定間隔で保持する作用を為し、外部リード端子8を
絶縁基体1のメタライズパッド7に接続させた後切断除
去されるものである。
The connecting member 10 is an external lead terminal 8
Is held at a predetermined interval, and the external lead terminals 8 are connected to the metallized pads 7 of the insulating substrate 1 and then cut and removed.

【0029】前記絶縁基体1はまたその凹部周辺から外
周端にかけて導出する複数個のメタライズ配線層5と該
メタライズ配線層5に電気的に接続されるメタライズパ
ッド7とが被着形成されており、前記メタライズパッド
7はその端部が交互に外側及び内側に突出するように形
成されている。
The insulating substrate 1 is also formed with a plurality of metallized wiring layers 5 extending from the periphery of the recess to the outer peripheral edge and metallized pads 7 electrically connected to the metallized wiring layers 5. The metallized pad 7 is formed so that its ends alternately project outward and inward.

【0030】前記メタライズ配線層5及びメタライズパ
ッド7はタングステン(W)、モリブデン(Mo)、マ
ンガン(Mn)等の高融点金属粉末からなり、該タング
ステン等の金属粉末に適当な有機溶媒を添加混合して得
た金属ペーストを絶縁基体1となるセラミックグリーン
シートの表面に予め従来周知のスクリーン印刷法等の厚
膜手法を採用して印刷塗布しておくことによって絶縁基
体1に被着形成される。
The metallized wiring layer 5 and the metallized pad 7 are made of a refractory metal powder such as tungsten (W), molybdenum (Mo), and manganese (Mn), and a suitable organic solvent is added and mixed to the metal powder such as tungsten. The metal paste obtained by the above is applied to the surface of the ceramic green sheet to be the insulating substrate 1 in advance by printing and coating using a thick film method such as the well-known screen printing method, so that the insulating paste is formed on the insulating substrate 1. .

【0031】次に図4に示す如く、絶縁基体に被着形成
した各メタライズパッド7のうち、外側に端部が突出す
る各メタライズパッド7aを該突出領域に第1の帯状ロ
ウ材11aを接合させ共通に接続するとともに内側に端
部が突出する各メタライズパッド7bを該突出領域に第
2の帯状ロウ材11bを接合させて共通に接続する。前
記第1の帯状ロウ材11a及び第2の帯状ロウ材11b
は例えば銀72重量%、銅28重量%から成り、該ロウ
材粉末に適当なバインダー、溶剤を添加混合して得たロ
ウ材ペーストを従来周知のスクリーン印刷法を採用する
ことによって第1の帯状ロウ材11aは端部が外側に突
出する各メタライズパッド7aを、第2の帯状ロウ材1
1bは端部ガ内側に突出する各メタライズパッド7bを
各々、共通に接続するように絶縁基体1上に環状に配さ
れる。
Next, as shown in FIG. 4, among the metallized pads 7 formed on the insulating substrate, the metallized pads 7a whose ends project outward are joined to the projecting regions by the first band-shaped brazing material 11a. Then, the metallized pads 7b whose ends are protruded inward are connected to each other by connecting the second strip-shaped brazing material 11b to the protruding regions. The first strip-shaped brazing material 11a and the second strip-shaped brazing material 11b
Is, for example, 72% by weight of silver and 28% by weight of copper, and a brazing material paste obtained by adding and mixing an appropriate binder and solvent to the brazing material powder is used to form a first strip by applying a conventionally known screen printing method. The brazing material 11a is provided with the metallized pads 7a whose ends project outwardly,
1b is annularly arranged on the insulating base 1 so as to commonly connect the respective metallized pads 7b protruding inside the end portion.

【0032】次に前記各メタライズパッド上に外部リー
ド端子8の先端部を載置させるとともに前記第1及び第
2の帯状ロウ材11a、11bを約900℃の温度で加
熱溶融し、該溶融した各ロウ材11a、11bを各メタ
ライズパッドと外部リード端子8の間に移行させること
によって外部リード端子8はメタライズパッドにロウ付
けされ製品としての半導体素子収納用パッケージが完成
する。
Next, the tip of the external lead terminal 8 is placed on each of the metallized pads, and the first and second band-shaped brazing materials 11a and 11b are heated and melted at a temperature of about 900.degree. By transferring the brazing materials 11a and 11b between the metallized pads and the external lead terminals 8, the external lead terminals 8 are brazed to the metallized pads to complete a semiconductor element housing package as a product.

【0033】尚、この場合、第1及び第2の帯状ロウ材
11a、11bは加熱溶融させると、該溶融した各ロウ
材11a、11bは表面張力によって縮まろうとする力
が働と同時に溶融ロウ材11a、11bとメタライズパ
ッド7a、7bとの濡れ性が良いことに起因して、メタ
ライズパッド7a、7b上に選択的に移行し、外部リー
ド端子8とメタライズパッド7a、7bとを強固にロウ
付する。
In this case, when the first and second band-shaped brazing materials 11a and 11b are heated and melted, the molten brazing materials 11a and 11b are contracted by the surface tension, and at the same time, the molten brazing materials act. Due to the good wettability between the metallized pads 11a, 11b and the metallized pads 7a, 7b, they are selectively transferred onto the metallized pads 7a, 7b, and the external lead terminals 8 and the metallized pads 7a, 7b are firmly brazed. To do.

【0034】また前記帯状ロウ材11a、11bは隣接
するメタライズパッド7a、7a間にメタライズパッド
7bが、また隣接するメタライズパッド7b、7b間に
メタライズパッド7aが各々、介在しているため、メタ
ライズパッド7a、7a間及びメタライズパッド7b、
7b間の距離が長くなり、その結果、各ロウ材11a、
11bを加熱溶融させてメタライズパッド7に外部リー
ド端子8をロウ付けする際、各メタライズパッド間にお
ける溶融ロウ材の表面張力による縮み力が強いものとな
って、各溶融ロウ材は各メタライズパッド間で確実に分
断され、隣接するメタライズパッド間が電気的に短絡す
ることは皆無となる。
The strip-shaped brazing material 11a, 11b has the metallized pad 7b between the adjacent metallized pads 7a, 7a and the metallized pad 7a between the adjacent metallized pads 7b, 7b. 7a, between 7a and metallized pad 7b,
The distance between 7b becomes long, and as a result, each brazing material 11a,
When the external lead terminals 8 are brazed to the metallized pads 7 by heating and melting 11b, the shrinkage force due to the surface tension of the molten brazing material between the metallized pads becomes strong, and each molten brazing material is separated between the metallized pads. The metallization pads are surely separated by, and no electrical short circuit occurs between the adjacent metallized pads.

【0035】尚、本発明は上述の実施例に限定されるも
のではなく、本発明の要旨を逸脱しない範囲であれば種
々の変更は可能であり、例えば上述の実施例では帯状ロ
ウ材11a、11bとしてペースト状のロウ材を用いた
が、板状或いは棒状のロウ材を用いても良い。
The present invention is not limited to the above-mentioned embodiments, and various modifications can be made without departing from the scope of the present invention. For example, in the above-mentioned embodiments, the band-shaped brazing material 11a, Although the paste-like brazing material is used as 11b, a plate-like or rod-like brazing material may be used.

【0036】また、上述の実施例では前記帯状ロウ材1
1a、11bとして銀ロウを用いたが、半田やその他の
ロウ材を使用しても良い。
Further, in the above-mentioned embodiment, the band-shaped brazing material 1 is used.
Although silver solder is used as 1a and 11b, solder or other brazing material may be used.

【0037】更に、上述実施例ではメタライズパッド7
から絶縁基体1外側及び絶縁基体1内側に突出した部位
の幅はメタライズパッド7の中央部の幅と同じ幅で形成
されていたが、該突出した部位の幅はメタライズパッド
7の中央部の幅より約1.0乃至1.5倍程度幅広に形
成されても良い。
Further, in the above embodiment, the metallized pad 7
The width of the portion protruding from the insulating base 1 to the outside and the inside of the insulating base 1 was formed to be the same as the width of the central portion of the metallized pad 7. However, the width of the protruding portion is the width of the central portion of the metallized pad 7. It may be formed to be about 1.0 to 1.5 times wider.

【0038】[0038]

【発明の効果】本発明の半導体素子収納用パッケージの
製造方法によれば、絶縁容器の外表面に複数個のメタラ
イズパッドをその端部が交互に外側及び内側に突出する
ようにして周列状に被着させるとともに外側に端部が突
出する各メタライズパッドは該突出領域に第1の帯状ロ
ウ材を接合させることによって共通に接続し、内側に端
部が突出する各メタライズパッドは該突出領域に第2の
帯状ロウ材を接合させることによって共通に接続したこ
とから各帯状ロウ材が接続されるメタライズパッドの間
隔は広いものとなり、その結果、各帯状ロウ材を加熱溶
融させてメタライズパッドに外部リード端子をロウ付け
する場合、各溶融ロウ材はその表面張力による縮み力が
大きくなって確実に分断され、隣接するメタライズパッ
ド間に短絡を発生することはなく、所定のメタライズパ
ッドに外部リード端子を強固、確実にロウ付けすること
が可能となる。
According to the method for manufacturing a package for accommodating semiconductor elements of the present invention, a plurality of metallized pads are arranged in a peripheral shape on the outer surface of the insulating container so that their ends alternately project outward and inward. The metallized pads that are attached to the outer surface of the metallized pad and have their ends protruding outward are commonly connected by bonding a first band-shaped brazing material to the protruding region, and the metallized pads whose end portions protrude inward are Since the second band-shaped brazing material is commonly connected by joining the band-shaped brazing material to each other, the interval between the metallized pads to which the respective band-shaped brazing materials are connected becomes wide. When brazing the external lead terminals, each molten brazing material has a large shrinkage force due to its surface tension and is reliably divided, causing a short circuit between adjacent metallized pads. Not Rukoto, robust external lead terminals to a predetermined metallization pad, it is possible to reliably brazed.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明の製造方法によって製作される半導体素
子収納用パッケージの一実施例を示す断面図である。
FIG. 1 is a cross-sectional view showing an embodiment of a semiconductor element housing package manufactured by a manufacturing method of the present invention.

【図2】図1に示すパッケージの絶縁基体の平面図であ
る。
FIG. 2 is a plan view of an insulating base of the package shown in FIG.

【図3】本発明の半導体素子収納用パッケージの製造方
法を説明するための分解斜視図である。
FIG. 3 is an exploded perspective view for explaining the method for manufacturing the semiconductor element housing package of the present invention.

【図4】図3の要部拡大平面図である。FIG. 4 is an enlarged plan view of a main part of FIG. 3;

【符号の説明】[Explanation of symbols]

1・・・・絶縁基体 2・・・・蓋体 3・・・・容器 4・・・・半導体素子 5・・・・メタライズ配線層 7・・・・メタライズパッド 8・・・・外部リード端子 11a・・・第1の帯状ロウ材 11b・・・第2の帯状ロウ材 1 ... Insulating substrate 2 ... Lid 3 ... Container 4 ... Semiconductor element 5 ... Metallized wiring layer 7 ... Metallized pad 8 ... External lead terminal 11a ... 1st strip brazing material 11b ... 2nd strip brazing material

Claims (1)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】内部に半導体素子を収納するための空所を
有する四角形状の絶縁容器の外表面に、内部に収容する
半導体素子の電極が電気的に接続されている複数のメタ
ライズパッドを周列状に被着させるとともに該メタライ
ズパッドに外部リード端子をロウ材を介しロウ付けして
成る半導体素子収納用パッケージであって、前記外部リ
ード端子が下記(1)乃至(4)の工程により絶縁容器
に被着させたメタライズパッドにロウ付けされることを
特徴とする半導体素子収納用パッケージの製造方法。 (1)絶縁容器の外表面に複数個のメタライズパッドを
その端部が交互に外側及び内側に突出するようにして周
列状に被着させる工程、 (2)前記外側に端部が突出する各メタライズパッドを
該突出領域に第1の帯状ロウ材を接合させて共通に接続
する工程、 (3)前記内側に端部が突出する各メタライズパッドを
該突出領域に第2の帯状ロウ材を接合させて共通に接続
する工程、 (4)前記各メタライズパッド上に外部リード端子の先
端部を載置させるとともに前記第1及び第2の帯状ロウ
材を加熱溶融させ各メタライズパッド上に外部リード端
子を接合させる工程。
1. A plurality of metallized pads, to which electrodes of a semiconductor element to be housed inside are electrically connected, are formed on an outer surface of a rectangular insulating container having a space for housing a semiconductor element therein. A semiconductor element housing package, which is formed by depositing in rows and brazing external lead terminals to the metallized pads via a brazing material, wherein the external lead terminals are insulated by the following steps (1) to (4). A method of manufacturing a package for accommodating a semiconductor device, comprising brazing to a metallized pad adhered to a container. (1) A step of circumferentially depositing a plurality of metallized pads on the outer surface of the insulating container so that the ends thereof alternately project outward and inward, (2) the ends project outward. A step of joining the metallized pads to the projecting regions by connecting them to a first strip-shaped brazing material, and (3) connecting the metallized pads whose ends project inwardly to the projecting regions with a second strip-shaped brazing material. (4) External leads are placed on each metallized pad by placing the tips of the external lead terminals on each of the metallized pads and heating and melting the first and second band-shaped brazing materials. Step of joining terminals.
JP23351492A 1992-09-01 1992-09-01 Manufacturing method of semiconductor device storage package Expired - Fee Related JP2690666B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP23351492A JP2690666B2 (en) 1992-09-01 1992-09-01 Manufacturing method of semiconductor device storage package

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP23351492A JP2690666B2 (en) 1992-09-01 1992-09-01 Manufacturing method of semiconductor device storage package

Publications (2)

Publication Number Publication Date
JPH0685137A JPH0685137A (en) 1994-03-25
JP2690666B2 true JP2690666B2 (en) 1997-12-10

Family

ID=16956227

Family Applications (1)

Application Number Title Priority Date Filing Date
JP23351492A Expired - Fee Related JP2690666B2 (en) 1992-09-01 1992-09-01 Manufacturing method of semiconductor device storage package

Country Status (1)

Country Link
JP (1) JP2690666B2 (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2179975B (en) * 1985-01-23 1988-09-01 Ohbayashi Corp Openable dome-shaped roof structure and a method of constructing the same
JP2005317602A (en) * 2004-04-27 2005-11-10 Kyocera Corp Wiring board and manufacturing method therefor

Also Published As

Publication number Publication date
JPH0685137A (en) 1994-03-25

Similar Documents

Publication Publication Date Title
JP2690666B2 (en) Manufacturing method of semiconductor device storage package
JPH0741162Y2 (en) Package for storing semiconductor devices
JP3181013B2 (en) Package for storing semiconductor elements
JP4355097B2 (en) Wiring board manufacturing method
JP3406710B2 (en) Package for storing semiconductor elements
JP3464138B2 (en) Electronic component storage package
JP2514094Y2 (en) Package for storing semiconductor devices
JPH05160284A (en) Semiconductor device containing package
JP3297577B2 (en) Package for storing semiconductor elements
JP3464136B2 (en) Electronic component storage package
JP3176267B2 (en) Package for storing semiconductor elements
JP3323010B2 (en) Package for storing semiconductor elements
JP2912779B2 (en) Manufacturing method of semiconductor device storage package
JP2543236Y2 (en) Package for storing semiconductor elements
JP2550488Y2 (en) Plug-in type semiconductor element storage package
JP3181011B2 (en) Package for storing semiconductor elements
JPH05275608A (en) Semiconductor element housing package
JP3441170B2 (en) Wiring board
JP2543149Y2 (en) Package for storing semiconductor elements
JP2670208B2 (en) Package for storing semiconductor elements
JPH1074856A (en) Package for semiconductor element
JP2728593B2 (en) Package for storing semiconductor elements
JPH0713229Y2 (en) Package for storing semiconductor devices
JPH08115990A (en) Semiconductor device package
JPH08125049A (en) Package for containing semiconductor chip

Legal Events

Date Code Title Description
LAPS Cancellation because of no payment of annual fees