JP3181011B2 - Package for storing semiconductor elements - Google Patents

Package for storing semiconductor elements

Info

Publication number
JP3181011B2
JP3181011B2 JP17476095A JP17476095A JP3181011B2 JP 3181011 B2 JP3181011 B2 JP 3181011B2 JP 17476095 A JP17476095 A JP 17476095A JP 17476095 A JP17476095 A JP 17476095A JP 3181011 B2 JP3181011 B2 JP 3181011B2
Authority
JP
Japan
Prior art keywords
external lead
lead terminals
container
connecting member
lead terminal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP17476095A
Other languages
Japanese (ja)
Other versions
JPH0927581A (en
Inventor
美津夫 柳沢
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Kyocera Corp
Original Assignee
Kyocera Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kyocera Corp filed Critical Kyocera Corp
Priority to JP17476095A priority Critical patent/JP3181011B2/en
Publication of JPH0927581A publication Critical patent/JPH0927581A/en
Application granted granted Critical
Publication of JP3181011B2 publication Critical patent/JP3181011B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched

Landscapes

  • Lead Frames For Integrated Circuits (AREA)

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【産業上の利用分野】本発明は内部に半導体素子を収容
するための半導体素子収納用パッケージに関するもので
ある。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device housing package for housing a semiconductor device therein.

【0002】[0002]

【従来の技術】従来、半導体素子、特にLSI等の半導
体集積回路素子を収容するための半導体素子収納用パッ
ケージは一般に図3及び図4に示すように酸化アルミニ
ウム質焼結体等の電気絶縁材料から成り、その上面の略
中央部に半導体集積回路素子15を収容するための空所
を形成する凹部11aを有し、且つ該凹部11a周辺か
ら外周縁にかけて導出されたタングステン、モリブデ
ン、マンガン等の高融点金属粉末から成る複数個のメタ
ライズ配線層12を有する絶縁基体11と、半導体集積
回路素子15の各電極を外部電気回路に電気的に接続す
るために一端が前記メタライズ配線層12にロウ付けさ
れた鉄−ニッケル−コバルト合金や鉄−ニッケル合金等
から成る外部リード端子13と、蓋体14とから構成さ
れており、絶縁基体11の凹部11a底面に半導体集積
回路素子15をガラス、樹脂、ロウ材等の接着剤を介し
て接着固定するとともに該半導体集積回路素子15の各
電極をボンディングワイヤ16を介してメタライズ配線
層12に接続し、しかる後、絶縁基体11上面に蓋体1
4をガラス、樹脂、ロウ材等から成る封止材を介して接
合させ、絶縁基体11と蓋体14とから成る容器内部に
半導体集積回路素子15を気密に収容することによって
半導体装置となる。
2. Description of the Related Art Conventionally, semiconductor device housing packages for housing semiconductor devices, particularly semiconductor integrated circuit devices such as LSIs, are generally made of an electrically insulating material such as an aluminum oxide sintered body as shown in FIGS. And a recess 11a forming a space for accommodating the semiconductor integrated circuit element 15 at a substantially central portion of the upper surface thereof, and tungsten, molybdenum, manganese, or the like drawn out from the periphery of the recess 11a to the outer peripheral edge. One end is brazed to the metallized wiring layer 12 to electrically connect each electrode of the semiconductor integrated circuit element 15 to an external electric circuit, and an insulating substrate 11 having a plurality of metallized wiring layers 12 made of a high melting point metal powder. And an external lead terminal 13 made of an iron-nickel-cobalt alloy or an iron-nickel alloy, and a cover 14. The semiconductor integrated circuit element 15 is bonded and fixed to the bottom surface of the concave portion 11a via an adhesive such as glass, resin, brazing material or the like, and each electrode of the semiconductor integrated circuit element 15 is connected to the metallized wiring layer 12 via a bonding wire 16. After connection, the lid 1 is placed on the upper surface of the insulating base 11.
4 are joined via a sealing material made of glass, resin, brazing material, or the like, and the semiconductor integrated circuit element 15 is hermetically accommodated in a container formed of the insulating base 11 and the lid 14 to form a semiconductor device.

【0003】かかる半導体装置は外部リード端子13の
他端側、即ち、外部リード端子13のうち絶縁基体11
と蓋体14とから成る容器の側面より外側に突出してい
る領域が外部の電気回路基板の配線導体に半田等を介し
て接続されるようになっており、これによって容器の内
部に気密に収容されている半導体集積回路素子15はそ
の各電極がボンディングワイヤ16、メタライズ配線層
12及び外部リード端子13を介して外部電気回路に電
気的に接続されることとなる。
Such a semiconductor device is provided on the other end side of the external lead terminal 13, that is, the insulating base 11 of the external lead terminal 13.
A region projecting outward from the side surface of the container, which is composed of the container and the lid 14, is connected to a wiring conductor of an external electric circuit board via solder or the like, whereby the container is hermetically housed inside the container. Each of the electrodes of the semiconductor integrated circuit element 15 is electrically connected to an external electric circuit via the bonding wire 16, the metallized wiring layer 12, and the external lead terminal 13.

【0004】[0004]

【発明が解決しようとする課題】しかしながら、近時、
半導体集積回路素子の高密度化、高集積化が急激に進
み、電極数が大幅に増大してきており、これに伴って半
導体集積回路素子の各電極を外部電気回路に接続する外
部リード端子も線幅が0.5mm以下と細く、隣接する
外部リード端子間の間隔も極めて狭いものとなってき
た。そのためこの従来の半導体素子収納用パッケージを
使用した半導体装置は外部リード端子に例えば、外部リ
ード端子を外部の電気回路基板の配線導体に接続させる
際等において外力が印加されると該外力によって外部リ
ード端子が容易に、且つ大きく変形し、その結果、隣接
する外部リード端子間に接触による短絡を発生して半導
体装置としての機能に支障を来すという欠点を有してい
た。
However, recently,
With the rapid increase in the density and integration of semiconductor integrated circuit devices, the number of electrodes has increased significantly, and external lead terminals for connecting each electrode of the semiconductor integrated circuit device to an external electric circuit have also been connected. The width is as thin as 0.5 mm or less, and the interval between adjacent external lead terminals has become extremely narrow. For this reason, a semiconductor device using this conventional package for housing a semiconductor element has a disadvantage that when an external force is applied to an external lead terminal, for example, when the external lead terminal is connected to a wiring conductor of an external electric circuit board, the external force is applied to the external lead terminal. The terminal is easily and largely deformed, and as a result, there is a disadvantage that a short circuit occurs due to contact between adjacent external lead terminals, thereby impairing the function as a semiconductor device.

【0005】そこで上記欠点を解消するために容器の側
面より外側に突出する外部リード端子の各々をセラミッ
ク、ガラス等の電気絶縁材料より成る連結部材に取着さ
せた半導体素子収納用パッケージが提案されている。
In order to solve the above-mentioned drawbacks, there has been proposed a semiconductor element housing package in which each of the external lead terminals projecting outward from the side surface of the container is attached to a connecting member made of an electrically insulating material such as ceramic or glass. ing.

【0006】かかる半導体素子収納用パッケージによれ
ば、外部リード端子の各々が連結部材に取着されている
ため、隣接する外部リード端子間の間隔が維持され、同
時に外部リード端子に外力が印加されても該外力印加に
よる大きな変形が有効に防止される。
According to such a package for accommodating a semiconductor element, since each of the external lead terminals is attached to the connecting member, a space between adjacent external lead terminals is maintained, and at the same time, an external force is applied to the external lead terminals. However, large deformation due to the application of the external force is effectively prevented.

【0007】しかしながら、この半導体素子収納用パッ
ケージにおいては連結部材は絶縁基体に形成したメタラ
イズ配線層と外部リード端子のロウ付けに全く関与して
いないこと、外部リード端子の線幅が0.5mm以下と
細く、外部リード端子のメタライズ配線層に対するロウ
付け強度が低いこと等から外部リード端子に連結部材を
介して引っ張り応力が作用すると外部リード端子がメタ
ライズ配線層より外れ、その結果、容器内部に収容する
半導体集積回路素子の各電極を外部リード端子を介して
外部電気回路に強固に電気的接続させることができない
という欠点を残存していた。
However, in this semiconductor device housing package, the connecting member does not participate in the brazing of the metallized wiring layer formed on the insulating base and the external lead terminals at all, and the line width of the external lead terminals is 0.5 mm or less. The external lead terminals are detached from the metallized wiring layer when tensile stress is applied to the external lead terminals via the connecting member because the brazing strength of the external lead terminals to the metallized wiring layer is low. However, the disadvantage remains that the electrodes of the semiconductor integrated circuit device cannot be firmly electrically connected to an external electric circuit via external lead terminals.

【0008】[0008]

【発明の目的】本発明は上記欠点に鑑み案出されたもの
で、その目的は半導体素子を収容する容器に外部リード
端子の一端を強固に固定するとともに隣接する外部リー
ド端子間の電気的絶縁を維持し、内部に収容する半導体
集積回路素子の各電極を所定の外部電気回路に確実に電
気的接続することが可能な半導体素子収納用パッケージ
を提供することにある。
SUMMARY OF THE INVENTION The present invention has been made in view of the above-mentioned drawbacks, and has as its object to firmly fix one end of an external lead terminal to a container for accommodating a semiconductor element and to provide electrical insulation between adjacent external lead terminals. An object of the present invention is to provide a package for housing a semiconductor element capable of maintaining the above conditions and reliably connecting each electrode of the semiconductor integrated circuit element housed therein to a predetermined external electric circuit.

【0009】[0009]

【課題を解決するための手段】本発明は内部に半導体素
子を収容するための空所を有する容器に外部リード端子
の一端を固定するとともに複数の前記外部リード端子の
他端を所定間隔で容器の側面より外側に突出させて成る
半導体素子収納用パッケージであって、前記外部リード
端子の各々の他端側を電気絶縁性の連結部材に取着させ
るとともに、該連結部材を、前記外部リード端子よりも
幅が広くかつ隣接する前記外部リード端子との間隔が前
記所定間隔よりも広くなるように前記複数の外部リード
端子の両側に配設された補強部材を介して容器に固定さ
せたことを特徴とするものである。
According to the present invention, one end of an external lead terminal is fixed to a container having a space for accommodating a semiconductor element therein, and the other end of the plurality of external lead terminals is connected at a predetermined interval to the container. A semiconductor device housing package protruding outward from a side surface of the external lead terminal, wherein the other end of each of the external lead terminals is attached to an electrically insulating connecting member, and the connecting member is connected to the external lead terminal. The external lead terminals having a greater width than the adjacent external lead terminals are fixed to the container via reinforcing members disposed on both sides of the plurality of external lead terminals so as to be wider than the predetermined interval. It is a feature.

【0010】[0010]

【作用】本発明の半導体素子収納用パッケージによれ
ば、容器の側面より突出する外部リード端子の各々を電
気絶縁性の連結部材に取着させたことから隣接する外部
リード端子間の間隔が連結部材によって維持されるとと
もに外力印加による大きな変形が有効に防止されて隣接
する外部リード端子間に電気的短絡を発生することはな
く、その結果、容器内部に収容する半導体集積回路素子
の各電極を外部リード端子を介して所定の外部電気回路
に正確に電気的接続し、半導体集積回路素子を長期間に
わたり正常に作動させることができる。
According to the semiconductor device housing package of the present invention, since each of the external lead terminals protruding from the side surface of the container is attached to the electrically insulating connecting member, the interval between the adjacent external lead terminals is reduced. Maintained by the member, large deformation due to the application of external force is effectively prevented, and no electrical short circuit occurs between adjacent external lead terminals. As a result, each electrode of the semiconductor integrated circuit element housed inside the container is removed. The semiconductor integrated circuit element can be normally operated for a long period of time by accurately and electrically connecting to a predetermined external electric circuit via the external lead terminal.

【0011】また本発明の半導体素子収納用パッケージ
によれば、連結部材が補強部材を介して容器に固定され
ていることから各外部リード端子に連結部材を介して引
っ張り力が作用しようとしてもその引っ張り力は前記補
強部材によって各外部リード端子に伝わるのが有効に阻
止され、その結果、外部リード端子が容器より外れるこ
とはなく容器の内部に収容する半導体集積回路素子の各
電極を所定の外部リード端子に強固に電気的接続するこ
とが可能となる。
Further, according to the package for housing a semiconductor element of the present invention, since the connecting member is fixed to the container via the reinforcing member, even if a pulling force is applied to each external lead terminal via the connecting member, the external lead terminal is not affected. The tensile force is effectively prevented from being transmitted to each external lead terminal by the reinforcing member. As a result, each electrode of the semiconductor integrated circuit element housed inside the container without the external lead terminal coming off from the container is fixed to a predetermined external position. It is possible to make a strong electrical connection to the lead terminals.

【0012】[0012]

【実施例】次に本発明を添付図面に基づき詳細に説明す
る。図1及び図2は本発明の半導体素子収納用パッケー
ジの一実施例を示し、1は電気絶縁材料より成る絶縁基
体、2は蓋体である。この絶縁基体1と蓋体2とで半導
体集積回路素子3を収容するための容器4が構成され
る。
BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 and 2 show an embodiment of a package for housing a semiconductor element according to the present invention, wherein 1 is an insulating base made of an electrically insulating material, and 2 is a lid. The insulating base 1 and the lid 2 constitute a container 4 for housing the semiconductor integrated circuit element 3.

【0013】前記絶縁基体1は酸化アルミニウム質焼結
体、ムライト質焼結体、窒化アルミニウム質焼結体等の
電気絶縁材料から成り、その上面の略中央部に半導体集
積回路素子3を収容する空所を形成するための凹部1a
が設けてあり、該凹部1a底面には半導体集積回路素子
3がロウ材、ガラス、樹脂等の接着剤を介して接着固定
される。
The insulating substrate 1 is made of an electrically insulating material such as an aluminum oxide sintered body, a mullite sintered body, an aluminum nitride sintered body, etc., and houses the semiconductor integrated circuit element 3 in a substantially central portion of its upper surface. Recess 1a for forming a void
The semiconductor integrated circuit element 3 is bonded and fixed to the bottom surface of the concave portion 1a via an adhesive such as brazing material, glass, resin, or the like.

【0014】前記絶縁基体1は例えば酸化アルミニウム
質焼結体で形成されている場合、酸化アルミニウム、酸
化珪素、酸化マグネシウム、酸化カルシウム等の原料粉
末に適当な有機バインダー、溶剤等を添加混合して泥漿
物を作るとともに該泥漿物をドクターブレード法やカレ
ンダーロール法等によりシート状に成形してセラミック
グリーンシート(セラミック生シート)を得、しかる
後、前記セラミックグリーンシートに適当な打ち抜き加
工を施すとともにこれを複数枚積層し、約1600℃の
高温で焼成することによって製作される。
When the insulating substrate 1 is formed of, for example, an aluminum oxide sintered body, an appropriate organic binder, a solvent, and the like are added to a raw material powder such as aluminum oxide, silicon oxide, magnesium oxide, and calcium oxide. The slurry is formed, and the slurry is formed into a sheet by a doctor blade method, a calender roll method, or the like to obtain a ceramic green sheet (ceramic green sheet). Thereafter, the ceramic green sheet is subjected to an appropriate punching process. It is manufactured by laminating a plurality of these and firing at a high temperature of about 1600 ° C.

【0015】また前記絶縁基体1の凹部1a周辺から外
周縁にかけて複数個のメタライズ配線層5が被着形成さ
れており、該メタライズ配線層5のうち凹部1a周辺部
に位置する領域には半導体集積回路素子3の各電極がボ
ンディングワイヤ6を介して電気的に接続され、また絶
縁基体1の外周縁に導出された部位には外部リード端子
7の一端がロウ材を介してロウ付け取着されている。
A plurality of metallized wiring layers 5 are formed from the periphery of the concave portion 1a of the insulating substrate 1 to the outer peripheral edge thereof. Each electrode of the circuit element 3 is electrically connected via a bonding wire 6, and one end of an external lead terminal 7 is soldered and attached to a portion led out to the outer peripheral edge of the insulating base 1 via a brazing material. ing.

【0016】前記絶縁基体1に設けたメタライズ配線層
5はタングステン、モリブデン、マンガン等の高融点金
属粉末から成り、該メタライズ配線層5は外部電気回路
に接続される外部リード端子7に半導体集積回路素子3
の各電極を電気的に接続させる作用を為す。
The metallized wiring layer 5 provided on the insulating base 1 is made of a high melting point metal powder such as tungsten, molybdenum, manganese, etc. The metallized wiring layer 5 is connected to an external lead terminal 7 connected to an external electric circuit by a semiconductor integrated circuit. Element 3
To electrically connect the respective electrodes.

【0017】尚、前記メタライズ配線層5は例えば、タ
ングステン等の高融点金属粉末に適当な有機溶剤、溶媒
を添加混合して得た金属ペーストを従来周知のスクリー
ン印刷法等の厚膜手法を採用し、絶縁基体1となるセラ
ミックグリーンシートに予め印刷塗布しておくことによ
って絶縁基体1の凹部1a周辺から外周縁にかけて被着
形成される。
For the metallized wiring layer 5, a metal paste obtained by adding a suitable organic solvent and a solvent to a high melting point metal powder such as tungsten is mixed by a conventionally known thick film method such as a screen printing method. The ceramic green sheet serving as the insulating base 1 is printed and applied in advance, so that the ceramic green sheet is adhered and formed from the periphery of the concave portion 1a to the outer peripheral edge of the insulating base 1.

【0018】また前記メタライズ配線層5はその露出す
る表面にニッケル、金等の耐蝕性に優れ、且つロウ材と
濡れ性の良い金属をメッキ法により1μm乃至20μm
の厚みに層着させておくと、メタライズ配線層5の酸化
腐食を有効に防止することができるとともにメタライズ
配線層5とボンディングワイヤ6及び外部リード端子7
とのロウ付け接合を強固なものとなすことができる。従
って、前記メタライズ配線層5はその露出する表面にニ
ッケル、金等の耐蝕性に優れ、且つロウ材と濡れ性の良
い金属をメッキ法より1μm乃至20μmの厚みに層着
させておくことが好ましい。
On the exposed surface of the metallized wiring layer 5, a metal having excellent corrosion resistance, such as nickel or gold, and a good wettability with a brazing material is applied by plating to a thickness of 1 to 20 μm.
In this case, the metallized wiring layer 5 can be effectively prevented from being oxidized and corroded, and the metallized wiring layer 5 and the bonding wires 6 and the external lead terminals 7 can be effectively prevented.
Can be made firmly. Therefore, it is preferable that the metallized wiring layer 5 is coated with a metal having excellent corrosion resistance such as nickel and gold and a good wettability with a brazing material to a thickness of 1 μm to 20 μm by plating on the exposed surface. .

【0019】更に前記絶縁基体1に被着させたメタライ
ズ配線層5には外部リード端子7の一端が銀ロウ等のロ
ウ材を介して取着されており、該外部リード端子7は半
導体集積回路素子3の各電極を所定の外部電気回路に電
気的に接続する作用を為す。
Further, one end of an external lead terminal 7 is attached to the metallized wiring layer 5 attached to the insulating base 1 via a brazing material such as silver brazing, and the external lead terminal 7 is a semiconductor integrated circuit. It serves to electrically connect each electrode of the element 3 to a predetermined external electric circuit.

【0020】前記外部リード端子7は鉄−ニッケル−コ
バルト合金や鉄−ニッケル合金等の金属材料から成り、
例えば鉄−ニッケル−コバルト合金等のインゴット
(塊)を従来周知の金属圧延加工法及び打ち抜き加工法
等を採用することによって所定の板状に形成される。
The external lead terminal 7 is made of a metal material such as an iron-nickel-cobalt alloy or an iron-nickel alloy.
For example, an ingot (lump) such as an iron-nickel-cobalt alloy is formed into a predetermined plate shape by employing a conventionally known metal rolling method and a punching method.

【0021】前記外部リード端子7はその表面にニッケ
ル、金等から成る良導電性で、且つ耐蝕性に優れた金属
をメッキ法により1乃至20μmの厚みに層着させてお
くと、外部リード端子7の酸化腐食を有効に防止するこ
とができるとともに外部リード端子7と外部電気回路と
の電気的接続を良好となすことができる。そのため前記
外部リード端子7はその表面にニッケル、金等をメッキ
法により1乃至20μmの厚みに層着させておくことが
好ましい。
The external lead terminal 7 may be formed by plating a metal having good conductivity and excellent corrosion resistance made of nickel, gold or the like on the surface thereof to a thickness of 1 to 20 μm by plating. 7 can be effectively prevented, and the electrical connection between the external lead terminal 7 and the external electric circuit can be made good. Therefore, it is preferable that nickel, gold, or the like is layered on the surface of the external lead terminal 7 to a thickness of 1 to 20 μm by plating.

【0022】また前記外部リード端子7のうち容器4の
側面から外側に突出している他端側には電気絶縁材料よ
り成る連結部材8が取着されており、該連結部材8によ
って各外部リード端子7は隣接するそれぞれの外部リー
ド端子7間に所定の間隔が維持されるとともに外力印加
による大きな変形が有効に防止し得るようになってい
る。従って、外部リード端子7を外部電気回路基板の配
線導体に半田等を介して接続する際、外部リード端子7
に外力が印加されても該外力によって外部リード端子7
が大きく変形し、これによって隣接する外部リード端子
7間に電気的短絡を発生することはなく、その結果、容
器4の内部に収容する半導体集積回路素子3の各電極を
外部リード端子7を介して所定の外部電気回路に正確に
電気的接続することが可能となり、半導体集積回路素子
3を長期間にわたり正常に作動させることができる。
A connecting member 8 made of an electrically insulating material is attached to the other end of the external lead terminal 7 projecting outward from the side surface of the container 4. Reference numeral 7 is such that a predetermined interval is maintained between adjacent external lead terminals 7 and large deformation due to application of an external force can be effectively prevented. Therefore, when connecting the external lead terminal 7 to the wiring conductor of the external electric circuit board via solder or the like, the external lead terminal 7
Even when an external force is applied to the external lead terminals 7
Does not cause an electrical short circuit between the adjacent external lead terminals 7. As a result, each electrode of the semiconductor integrated circuit element 3 housed in the container 4 is connected to the external lead terminal 7 via the external lead terminal 7. As a result, it is possible to accurately and electrically connect to a predetermined external electric circuit, and the semiconductor integrated circuit element 3 can be normally operated for a long time.

【0023】更に前記外部リード端子7が取着される連
結部材8は電気絶縁材料で形成されていることから該連
結部材8によって各外部リード端子7間が電気的に短絡
することもない。
Further, since the connecting member 8 to which the external lead terminals 7 are attached is formed of an electrically insulating material, the connecting members 8 do not cause an electrical short between the external lead terminals 7.

【0024】前記電気絶縁材料から成る連結部材8は酸
化アルミニウム質焼結体等のセラミックスやガラス、樹
脂で形成されており、例えば酸化アルミニウム質焼結体
から成る場合は、前述の絶縁基体1と同様の方法、具体
的には酸化アルミニウム、酸化珪素、酸化マグネシウ
ム、酸化カルシウム等の原料粉末に適当な有機バインダ
ー、溶剤等を添加混合して泥漿物を作るとともに該泥漿
物をドクターブレード法やカレンダーロール法等により
シート状に成形してセラミックグリーンシート(セラミ
ック生シート)を得、しかる後、前記セラミックグリー
ンシートに適当な打ち抜き加工を施し、所定の棒状とな
すとともにこれを約1600℃の高温で焼成することに
よって製作される。
The connecting member 8 made of the electrically insulating material is formed of ceramics such as an aluminum oxide sintered body, glass, or a resin. A similar method, specifically, adding an appropriate organic binder, a solvent, and the like to raw material powders such as aluminum oxide, silicon oxide, magnesium oxide, and calcium oxide to form a muddy substance and subjecting the muddy substance to a doctor blade method or calendering A ceramic green sheet (ceramic green sheet) is obtained by forming into a sheet shape by a roll method or the like. Thereafter, the ceramic green sheet is subjected to an appropriate punching process to form a predetermined rod shape, and this is pressed at a high temperature of about 1600 ° C. It is manufactured by firing.

【0025】また前記連結部材8を酸化アルミニウム質
焼結体で形成した場合、連結部材8への外部リード端子
7の取着は、前述のメタライズ配線層5と同様の方法に
よって連結部材8に予め複数個のメタライズ金属層を被
着させておき、該メタライズ金属層の各々に外部リード
端子7を個々にロウ材を介しロウ付けすることによって
行われる。
When the connecting member 8 is formed of a sintered body of aluminum oxide, the external lead terminals 7 are attached to the connecting member 8 in advance by the same method as the metallized wiring layer 5 described above. This is performed by depositing a plurality of metallized metal layers and brazing the external lead terminals 7 individually to each of the metallized metal layers via a brazing material.

【0026】更に前記連結部材8は補強部材9を介して
絶縁基体1に固定されている。前記補強部材9は絶縁基
体1に形成したメタライズ配線層5と外部リード端子7
とのロウ付け部に連結部材8を介して引っ張り力が作用
するのを有効に防止する作用を為し、これによって各外
部リード端子7に連結部材8を介して引っ張り力が作用
しようとしてもその引っ張り力は前記補強部材9によっ
て各外部リード端子7に伝わるのが有効に阻止され、そ
の結果、外部リード端子7がメタライズ配線層5より外
れることはなく容器4の内部に収容する半導体集積回路
素子3の各電極を所定の外部リード端子7に強固に電気
的接続することが可能となる。
Further, the connecting member 8 is fixed to the insulating base 1 via a reinforcing member 9. The reinforcing member 9 includes the metallized wiring layer 5 formed on the insulating base 1 and the external lead terminals 7.
This effectively prevents the pulling force from acting on the brazing portion via the connecting member 8 so that even if the pulling force acts on the external lead terminals 7 via the connecting member 8, the external lead terminals 7 are not affected. The tensile force is effectively prevented from being transmitted to each external lead terminal 7 by the reinforcing member 9, and as a result, the semiconductor integrated circuit element accommodated in the container 4 without the external lead terminal 7 being detached from the metallized wiring layer 5. 3 can be firmly electrically connected to predetermined external lead terminals 7.

【0027】前記補強部材9は例えば、鉄−ニッケル−
コバルト合金や鉄−ニッケル合金等の材料より成り、絶
縁基体1及び連結部材8に前述のメタライズ配線層5と
同様の方法によって予めメタライズ金属層を被着させて
おくとともに絶縁基体1及び連結部材8に被着させたメ
タライズ金属層の各々に両端をロウ材を介しロウ付けす
ることによって連結部材8と絶縁基体1との間に取着さ
れ、同時に連結部材8を絶縁基体1に固定する。
The reinforcing member 9 is made of, for example, iron-nickel-
The insulating base 1 and the connecting member 8 are made of a material such as a cobalt alloy or an iron-nickel alloy, and a metallized metal layer is previously applied to the insulating base 1 and the connecting member 8 in the same manner as the above-described metallized wiring layer 5. Each of the metallized metal layers is brazed at both ends via a brazing material to be attached between the connecting member 8 and the insulating base 1, and at the same time, the connecting member 8 is fixed to the insulating base 1.

【0028】前記補強部材9は絶縁基体1に形成したメ
タライズ配線層5と外部リード端子7とのロウ付け部に
引っ張り力が作用するのを有効に防止するため容易に変
形を発生しない機械的強度の強いものから成り、補強部
材9が例えば、鉄−ニッケル−コバルト合金から成る場
合には、断面積が1mm2程度の棒状体が使用される。
The reinforcing member 9 has a mechanical strength that does not easily cause deformation in order to effectively prevent a tensile force from acting on a brazing portion between the metallized wiring layer 5 formed on the insulating base 1 and the external lead terminal 7. When the reinforcing member 9 is made of, for example, an iron-nickel-cobalt alloy, a rod having a cross-sectional area of about 1 mm 2 is used.

【0029】かくして本発明の半導体素子収納用パッケ
ージによれば、絶縁基体1の凹部1a底面に半導体集積
回路素子3をロウ材、ガラス、樹脂等から成る接着剤を
介して接着固定するとともに半導体集積回路素子3の各
電極をボンディングワイヤ6を介してメタライズ配線層
5に接続し、しかる後、絶縁基体1の上面に蓋体2をガ
ラス、樹脂、ロウ材等から成る封止材を介して接合さ
せ、絶縁基体1と蓋体2とから成る容器4内部に半導体
集積回路素子3を気密に収容することによって最終製品
としての半導体装置となる。
Thus, according to the package for accommodating a semiconductor element of the present invention, the semiconductor integrated circuit element 3 is bonded and fixed to the bottom surface of the concave portion 1a of the insulating base 1 with an adhesive made of brazing material, glass, resin or the like. Each electrode of the circuit element 3 is connected to the metallized wiring layer 5 via a bonding wire 6, and thereafter, the lid 2 is joined to the upper surface of the insulating base 1 via a sealing material made of glass, resin, brazing material or the like. Then, the semiconductor integrated circuit element 3 is hermetically accommodated in a container 4 including the insulating base 1 and the lid 2, thereby obtaining a semiconductor device as a final product.

【0030】尚、本発明は上述の実施例に限定されるも
のではなく、本発明の要旨を逸脱しない範囲であれば種
々の変更は可能であり、例えば、上述の実施例では半導
体集積回路素子3を収容する容器4を酸化アルミニウム
質焼結体から成る絶縁基体1と蓋体2とで形成したが、
これを銅や鉄−ニッケル−コバルト合金等の金属材料を
所定形状に加工したもので形成してもよい。この場合、
半導体集積回路素子3の各電極を所定の外部リード端子
7に電気的絶縁をもって接続するために金属製容器には
半導体集積回路素子3の各電極が接続され、且つ外部リ
ード端子がロウ付けされるメタライズ配線層を有する絶
縁体を別途準備するとともにこれを金属製容器に配設す
る必要がある。
It should be noted that the present invention is not limited to the above-described embodiment, and various modifications can be made without departing from the scope of the present invention. The container 4 containing 3 is formed of the insulating base 1 made of an aluminum oxide sintered body and the lid 2,
This may be formed by processing a metal material such as copper or an iron-nickel-cobalt alloy into a predetermined shape. in this case,
In order to connect each electrode of the semiconductor integrated circuit element 3 to a predetermined external lead terminal 7 with electrical insulation, each electrode of the semiconductor integrated circuit element 3 is connected to a metal container and the external lead terminal is brazed. It is necessary to separately prepare an insulator having a metallized wiring layer and to dispose this in a metal container.

【0031】また前述の実施例においては連結部材8を
酸化アルミニウム質焼結体で形成するとともに該連結部
材8への外部リード端子7の取着をロウ付けにより行っ
たが、これに限定されるものではなく、連結部材8をガ
ラスやエポキシ樹脂等の電気絶縁材料で形成し、連結部
材8への外部リード端子7の取着をガラスや樹脂等から
成る接着材で行ってもよい。
In the above-described embodiment, the connecting member 8 is formed of an aluminum oxide sintered body and the external lead terminals 7 are attached to the connecting member 8 by brazing. However, the present invention is not limited to this. Instead, the connecting member 8 may be formed of an electrically insulating material such as glass or epoxy resin, and the external lead terminals 7 may be attached to the connecting member 8 with an adhesive made of glass, resin, or the like.

【0032】更に前述の実施例においては補強部材9を
鉄ーニッケルーコバルト合金等の金属材料で形成し、絶
縁基体1と連結部材8にロウ付けにより取着させたが、
これもこれに限定されるものではなく、補強部材9を機
械的強度の強いセラミックスや樹脂で形成してもよく、
また絶縁基体1や連結部材8に機械的な接合方法やガラ
ス、樹脂等の接着材を用い取着してもよい。
Further, in the above-described embodiment, the reinforcing member 9 is formed of a metal material such as an iron-nickel-cobalt alloy, and is attached to the insulating base 1 and the connecting member 8 by brazing.
This is not limited to this, and the reinforcing member 9 may be formed of ceramics or resin having high mechanical strength.
Further, it may be attached to the insulating base 1 or the connecting member 8 using a mechanical joining method or an adhesive such as glass or resin.

【0033】[0033]

【発明の効果】本発明の半導体素子収納用パッケージに
よれば、容器の側面より突出する外部リード端子の各々
を電気絶縁性の連結部材に取着させたことから隣接する
外部リード端子間の間隔が連結部材によって維持される
とともに外力印加による大きな変形が有効に防止されて
隣接する外部リード端子間に電気的短絡を発生すること
はなく、その結果、容器内部に収容する半導体集積回路
素子の各電極を外部リード端子を介して所定の外部電気
回路に正確に電気的接続し、半導体集積回路素子を長期
間にわたり正常に作動させることができる。
According to the semiconductor device housing package of the present invention, since each of the external lead terminals protruding from the side surface of the container is attached to the electrically insulating connecting member, the distance between the adjacent external lead terminals can be improved. Is maintained by the connecting member, and large deformation due to the application of external force is effectively prevented, so that an electric short circuit does not occur between adjacent external lead terminals. As a result, each of the semiconductor integrated circuit elements housed inside the container is The electrodes can be accurately and electrically connected to a predetermined external electric circuit via the external lead terminals, and the semiconductor integrated circuit device can operate normally for a long period of time.

【0034】また本発明の半導体素子収納用パッケージ
によれば、連結部材が補強部材を介して容器に固定され
ていることから各外部リード端子に連結部材を介して引
っ張り力が作用しようとしてもその引っ張り力は前記補
強部材によって各外部リード端子に伝わるのが有効に阻
止され、その結果、外部リード端子が容器より外れるこ
とはなく容器の内部に収容する半導体集積回路素子の各
電極を所定の外部リード端子に強固に電気的接続するこ
とが可能となる。
Further, according to the semiconductor element housing package of the present invention, since the connecting member is fixed to the container via the reinforcing member, even if a pulling force is applied to each external lead terminal via the connecting member, the force is not affected. The tensile force is effectively prevented from being transmitted to each external lead terminal by the reinforcing member. As a result, each electrode of the semiconductor integrated circuit element housed inside the container without the external lead terminal coming off from the container is fixed to a predetermined external position. It is possible to make a strong electrical connection to the lead terminals.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明の半導体素子収納用パッケージの一実施
例を示す断面図である。
FIG. 1 is a cross-sectional view showing one embodiment of a semiconductor element storage package according to the present invention.

【図2】図1に示す半導体素子収納用パッケージに使用
される絶縁基体の平面図である。
FIG. 2 is a plan view of an insulating base used in the semiconductor device housing package shown in FIG. 1;

【図3】従来の半導体素子収納用パッケージの断面図で
ある。
FIG. 3 is a cross-sectional view of a conventional semiconductor element storage package.

【図4】図3に示す半導体素子収納用パッケージに使用
される絶縁基体の平面図である。
FIG. 4 is a plan view of an insulating base used in the package for housing a semiconductor element shown in FIG. 3;

【符号の説明】[Explanation of symbols]

1・・・・・・絶縁基体 1a・・・・・凹部 2・・・・・・蓋体 3・・・・・・半導体集積回路素子 4・・・・・・容器 5・・・・・・メタライズ配線層 7・・・・・・外部リード端子 8・・・・・・連結部材 9・・・・・・補強部材 DESCRIPTION OF SYMBOLS 1 ... Insulating base 1a ... Depression 2 ... Lid 3 ... Semiconductor integrated circuit element 4 ... Container 5 ... · Metallized wiring layer 7 ············································································· Reinforcement

Claims (1)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】内部に半導体素子を収容するための空所を
有する容器に外部リード端子の一端を固定するとともに
複数の前記外部リード端子の他端を所定間隔で容器の側
面より外側に突出させて成る半導体素子収納用パッケー
ジであって、前記外部リード端子の各々の他端側を電気
絶縁性の連結部材に取着させるとともに該連結部材
、前記外部リード端子よりも幅が広くかつ隣接する前
記外部リード端子との間隔が前記所定間隔よりも広くな
るように前記複数の外部リード端子の両側に配設された
補強部材を介して容器に固定させたことを特徴とする半
導体素子収納用パッケージ。
An external lead terminal is fixed to a container having a space for accommodating a semiconductor element therein.
A package for housing a semiconductor element, wherein the other ends of the plurality of external lead terminals are projected outward from a side surface of a container at predetermined intervals , wherein the other end of each of the external lead terminals is connected to an electrically insulating connecting member. causes attached, the connecting member, before the wider and adjacent than the external lead terminals
The distance between the external lead terminals is wider than the predetermined distance.
A semiconductor element storage package, which is fixed to a container via reinforcing members disposed on both sides of the plurality of external lead terminals as described above .
JP17476095A 1995-07-11 1995-07-11 Package for storing semiconductor elements Expired - Fee Related JP3181011B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP17476095A JP3181011B2 (en) 1995-07-11 1995-07-11 Package for storing semiconductor elements

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP17476095A JP3181011B2 (en) 1995-07-11 1995-07-11 Package for storing semiconductor elements

Publications (2)

Publication Number Publication Date
JPH0927581A JPH0927581A (en) 1997-01-28
JP3181011B2 true JP3181011B2 (en) 2001-07-03

Family

ID=15984200

Family Applications (1)

Application Number Title Priority Date Filing Date
JP17476095A Expired - Fee Related JP3181011B2 (en) 1995-07-11 1995-07-11 Package for storing semiconductor elements

Country Status (1)

Country Link
JP (1) JP3181011B2 (en)

Also Published As

Publication number Publication date
JPH0927581A (en) 1997-01-28

Similar Documents

Publication Publication Date Title
JP2763446B2 (en) Package for storing semiconductor elements
JP3210835B2 (en) Package for storing semiconductor elements
JP3181011B2 (en) Package for storing semiconductor elements
JP3181013B2 (en) Package for storing semiconductor elements
JP2514094Y2 (en) Package for storing semiconductor devices
JP2801449B2 (en) Package for storing semiconductor elements
JP3176267B2 (en) Package for storing semiconductor elements
JP3464138B2 (en) Electronic component storage package
JP3426741B2 (en) Package for storing semiconductor elements
JP3309045B2 (en) Electronic components with leads
JP3176268B2 (en) Package for storing semiconductor elements
JP3464136B2 (en) Electronic component storage package
JP2746813B2 (en) Package for storing semiconductor elements
JP2670208B2 (en) Package for storing semiconductor elements
JP3323010B2 (en) Package for storing semiconductor elements
JPH0745962Y2 (en) Package for storing semiconductor devices
JP3464143B2 (en) Electronic component storage package
JP2003224222A (en) Package for containing semiconductor element
JP2543236Y2 (en) Package for storing semiconductor elements
JP2543149Y2 (en) Package for storing semiconductor elements
JP2728584B2 (en) Method for manufacturing semiconductor device
JP3176246B2 (en) Package for storing semiconductor elements
JPH0936145A (en) Semiconductor device
JP2001035959A (en) Package for housing semiconductor element
JPH0922957A (en) Package for housing semiconductor element

Legal Events

Date Code Title Description
FPAY Renewal fee payment (prs date is renewal date of database)

Free format text: PAYMENT UNTIL: 20080420

Year of fee payment: 7

FPAY Renewal fee payment (prs date is renewal date of database)

Free format text: PAYMENT UNTIL: 20090420

Year of fee payment: 8

FPAY Renewal fee payment (prs date is renewal date of database)

Free format text: PAYMENT UNTIL: 20090420

Year of fee payment: 8

FPAY Renewal fee payment (prs date is renewal date of database)

Free format text: PAYMENT UNTIL: 20100420

Year of fee payment: 9

FPAY Renewal fee payment (prs date is renewal date of database)

Free format text: PAYMENT UNTIL: 20110420

Year of fee payment: 10

FPAY Renewal fee payment (prs date is renewal date of database)

Free format text: PAYMENT UNTIL: 20110420

Year of fee payment: 10

FPAY Renewal fee payment (prs date is renewal date of database)

Free format text: PAYMENT UNTIL: 20120420

Year of fee payment: 11

FPAY Renewal fee payment (prs date is renewal date of database)

Free format text: PAYMENT UNTIL: 20120420

Year of fee payment: 11

FPAY Renewal fee payment (prs date is renewal date of database)

Free format text: PAYMENT UNTIL: 20130420

Year of fee payment: 12

FPAY Renewal fee payment (prs date is renewal date of database)

Free format text: PAYMENT UNTIL: 20140420

Year of fee payment: 13

LAPS Cancellation because of no payment of annual fees