JPH0741162Y2 - Package for storing semiconductor devices - Google Patents
Package for storing semiconductor devicesInfo
- Publication number
- JPH0741162Y2 JPH0741162Y2 JP1989125456U JP12545689U JPH0741162Y2 JP H0741162 Y2 JPH0741162 Y2 JP H0741162Y2 JP 1989125456 U JP1989125456 U JP 1989125456U JP 12545689 U JP12545689 U JP 12545689U JP H0741162 Y2 JPH0741162 Y2 JP H0741162Y2
- Authority
- JP
- Japan
- Prior art keywords
- external connection
- semiconductor element
- package
- connection terminal
- electric circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Description
【考案の詳細な説明】 （産業上の利用分野） 本考案は半導体素子を収容するための半導体素子収納用
パッケージの改良に関するものである。DETAILED DESCRIPTION OF THE INVENTION (Industrial field of application) The present invention relates to an improvement of a semiconductor element housing package for housing a semiconductor element.
（従来の技術） 従来、半導体素子、特に半導体集積回路素子を収容する
ための半導体素子収納用パッケージは第３図及び第４図
に示すように、セラミックス等の電気絶縁材料から成
り、その上面の略中央部に半導体素子を収容するための
空所を形成する凹部11a及び該凹部11a周辺から底面にか
けて導出されたタングステン（Ｗ）、モリブデン（Mo）
等の金属粉末から成る多数のメタライズリード12を有す
る絶縁基体11と蓋体13とから構成されており、絶縁基体
11と蓋体13とから成る絶縁容器内部に半導体素子14が収
容され、半導体素子14の各電極とメタライズリード12と
がボンディングワイヤ15を介し接続されるとともに気密
封止されて半導体装置となる。(Prior Art) Conventionally, a semiconductor element housing package for housing a semiconductor element, particularly a semiconductor integrated circuit element, is made of an electrically insulating material such as ceramics as shown in FIGS. A recess 11a forming a space for accommodating a semiconductor element in a substantially central portion, and tungsten (W) and molybdenum (Mo) led out from the periphery of the recess 11a to the bottom surface.
Is composed of an insulating base 11 having a large number of metallized leads 12 made of metal powder such as
A semiconductor element 14 is housed inside an insulating container composed of 11 and a lid 13. Each electrode of the semiconductor element 14 and the metallized lead 12 are connected via a bonding wire 15 and hermetically sealed to form a semiconductor device.
この従来の半導体素子収納用パッケージは各メタライズ
リード12の絶縁基体底面に導出された部位が外部接続端
子12aを形成しており、半導体素子収納用パッケージの
内部に半導体素子14を気密に収容した後、前記外部接続
端子12aを外部電気回路基板16の配線導体部16aに半田等
のロウ材を介し接合することによって内部に収容された
半導体素子14は外部の電気回路に接続されることとな
る。In this conventional semiconductor element housing package, the portion led to the bottom surface of the insulating base of each metallized lead 12 forms the external connection terminal 12a, and after the semiconductor element 14 is hermetically housed inside the semiconductor element housing package. By connecting the external connection terminal 12a to the wiring conductor portion 16a of the external electric circuit board 16 via a brazing material such as solder, the semiconductor element 14 housed inside is connected to an external electric circuit.
（考案が解決しようとする課題） しかし乍ら、この従来の半導体素子収納用パッケージは
絶縁基体の底面に形成した外部接続端子の各々が１〜４
mm2程度の小面積であり、該外部接続端子は半導体素子
収納用パッケージの熱を外部電気回路基板に良好に伝達
することができない。そのため半導体素子収納用パッケ
ージの内部に収容される半導体素子が高密度、高集積化
され、作動時に発する熱が多くなった場合、半導体素子
の発する熱は半導体素子収納用パッケージの外部接続端
子を介して外部電気回路基板に完全に伝達させることか
できず半導体素子収納用パッケージ中に蓄積されてしま
い、その結果、半導体素子収納用パッケージを高温とし
て内部に収容する半導体素子を熱破壊させたり、特性に
熱劣化を生じさせたりするという欠点を有していた。(Problems to be solved by the invention) However, in this conventional package for accommodating semiconductor elements, each of the external connection terminals formed on the bottom surface of the insulating substrate has 1 to 4 pieces.
The area is as small as about mm 2 , and the external connection terminals cannot satisfactorily transfer the heat of the semiconductor element housing package to the external electric circuit board. Therefore, when the semiconductor elements housed inside the semiconductor element housing package are highly dense and highly integrated, and the heat generated during operation increases, the heat generated by the semiconductor element is transmitted through the external connection terminals of the semiconductor element housing package. Cannot be completely transmitted to the external electric circuit board and is accumulated in the semiconductor element housing package, resulting in thermal destruction of the semiconductor element housed inside the semiconductor element housing package due to high temperature, It has a drawback that it causes thermal deterioration.
（考案の目的） 本考案は上記欠点に鑑み案出されたもので、その目的は
内部に収容する半導体素子の発する熱を外部電気回路基
板に良好に伝達し、半導体素子が熱破壊を起こしたり、
特性に熱劣化を生じたりするのを皆無となすことができ
る半導体素子収納用パッケージを提供することにある。(Purpose of the Invention) The present invention has been devised in view of the above-mentioned drawbacks, and the purpose thereof is to satisfactorily transfer the heat generated by the semiconductor element housed inside to the external electric circuit board, causing the semiconductor element to be thermally destroyed. ,
It is an object of the present invention to provide a package for accommodating a semiconductor element, which can prevent the characteristics from being thermally deteriorated.
（課題を解決するための手段） 本考案は内部に半導体素子を収容するための空所を有す
る絶縁容器の底面に多数の外部接続端子を形成して成る
半導体素子収納用パッケージにおいて、前記絶縁容器の
内部空所を下方に形成された外部接続端子の面積を他の
部位に形成された外部接続端子の面積より大きくしたこ
とを特徴とするものである。(Means for Solving the Problems) The present invention provides a package for storing a semiconductor device, wherein a plurality of external connection terminals are formed on a bottom surface of an insulating container having a cavity for housing a semiconductor device therein. The area of the external connection terminal formed below the internal void is larger than the area of the external connection terminal formed at another portion.
（実施例） 次ぎに本考案を添付図面に基づき詳細に説明する。(Embodiment) Next, the present invention will be described in detail with reference to the accompanying drawings.
第１図及び第２図は本考案の半導体素子収納用パッケー
ジの一実施例を示し、１はアルミナセラミックス等の電
気絶縁材料から成る絶縁基体、２は同じく電気絶縁材料
より成る蓋体である。この絶縁基体１と蓋体２とで内部
に半導体素子を収容する絶縁容器３が構成される。1 and 2 show an embodiment of a package for housing a semiconductor device of the present invention, 1 is an insulating base made of an electrically insulating material such as alumina ceramics, and 2 is a lid made of the same electrically insulating material. The insulating base body 1 and the lid body 2 constitute an insulating container 3 which accommodates a semiconductor element therein.
前記絶縁基体１はその上面中央部に半導体素子を収容す
るための空所を形成する段状の凹部1aを有しており、該
凹部1a底面には半導体素子４が接着材を介し取着され
る。The insulating substrate 1 has a stepped recess 1a at the center of its upper surface, which forms a space for accommodating a semiconductor device. The semiconductor device 4 is attached to the bottom of the recess 1a with an adhesive. It
前記絶縁基体１はアルミナ（Al2O3）、シリカ（Si
O2）、マグネシア（MgO）、カルシア（CaO）等のセラミ
ック原料粉末に適当な有機溶剤、溶媒を添加混合して泥
漿状となすことともにこれをドリターブレード法を採用
することによってグリーンシート（セラミック生シー
ト）を形成し、しかる後、前記グリーンシートに適当な
打ち抜き加工を施すとともに複数枚積層し、高温（1400
〜1800℃）で焼成することによって製作される。The insulating substrate 1 is made of alumina (Al 2 O 3 ), silica (Si
O 2 ), magnesia (MgO), calcia (CaO), and other ceramic raw material powders are mixed with an appropriate organic solvent and solvent to form a slurry, and the green sheet Ceramic green sheet) is formed, and then the green sheet is punched appropriately and a plurality of sheets are laminated at high temperature (1400
It is produced by firing at ~ 1800 ° C.
また前記絶縁基体１には凹部1a周辺より底面にかけて導
出するメタライズリード５が設けてあり、該メタライズ
リード５の凹部1a周辺部には半導体素子４の各電極がボ
ンディングワイヤ６を介し電気的に接続され、また絶縁
基体１底面に導出される部位は外部接続端子5a、5bを形
成する。Further, the insulating base 1 is provided with a metallized lead 5 extending from the periphery of the recess 1a to the bottom surface, and the electrodes of the semiconductor element 4 are electrically connected to the periphery of the recess 1a of the metallized lead 5 via bonding wires 6. The external connection terminals 5a and 5b are formed on the bottom surface of the insulating base 1.
前記外部接続端子5a、5bは内部に収容する半導体素子４
を外部の電気回路に接続する作用をなし、外部接続端子
5a、5bを外部電気回路基板の配線導体部に半田等のロウ
材を介し取着することによって内部に収容する半導体素
子４はメタライズリード５及び外部接続端子5a、5bを介
して外部電気回路に接続されることとなる。The external connection terminals 5a and 5b are semiconductor elements 4 housed inside.
The external connection terminal.
The semiconductor element 4 housed inside by attaching 5a, 5b to the wiring conductor portion of the external electric circuit board via a brazing material such as solder is connected to the external electric circuit via the metallized lead 5 and the external connection terminals 5a, 5b. Will be connected.
なお、前記メタライズリード５及び外部接続端子5a、5b
はタングステン（Ｗ）、モリブデン（Mo）、マンガン
（Mn）等の高融点金属粉末から成り、従来周知のスクリ
ーン印刷法等の厚膜手法を採用することによって絶縁基
体１に被着形成される。In addition, the metallized leads 5 and the external connection terminals 5a and 5b
Is made of a refractory metal powder such as tungsten (W), molybdenum (Mo), manganese (Mn), etc., and is deposited and formed on the insulating substrate 1 by using a conventionally known thick film technique such as screen printing.
また前記メタライズリード５及び外部接続端子5a、5bは
その露出する外表面にニッケル（Ni）、金（Au）等の耐
蝕性に優れ、かつ良導電性である金属をメッキにより被
着しておくとメタライズリード５及び外部接続素子5a、
5bの酸化腐食を有効に防止することができ、同時に外部
接続端子5a、5bを外部電気回路基板の配線導体部に半田
等のロウ材を介し接合する際、その接合を強固となすこ
とができるためメタライズリード５及び外部接続端子5
a、5bはその露出する外表面にニッケル（Ni）、金（A
u）等の金属を被着させておくことが好ましい。The metallized leads 5 and the external connection terminals 5a and 5b are plated on their exposed outer surfaces with a metal such as nickel (Ni), gold (Au), which has excellent corrosion resistance and good conductivity, by plating. And metallized lead 5 and external connection element 5a,
It is possible to effectively prevent oxidative corrosion of 5b, and at the same time, when the external connection terminals 5a and 5b are joined to the wiring conductor portion of the external electric circuit board through a brazing material such as solder, the joint can be made firm. For metallized lead 5 and external connection terminal 5
a and 5b have nickel (Ni) and gold (A
It is preferable to deposit a metal such as u).
かくして、前記絶縁基体１の凹部1a底面に半導体素子４
を接着材を介し取着するとともに半導体素子４の各電極
をメタライズリード５にボンディングワイヤ６を介して
電気的に接続させ、しかる後、絶縁基体１の上面に蓋体
２をガラス、樹脂等の封止部材により取着し、絶縁容器
３の内部を気密に封止することによって最終製品である
半導体装置となる。この半導体装置は、表面に予め半田
が取着されている電気回路基板７の配線導体部7a上に、
外部接続端子5a、5bが当接するように載置され、配線導
体部7aと外部接続端子5a、5bとを半田接合することによ
って外部電気回路基板７上に取着される。Thus, the semiconductor element 4 is formed on the bottom surface of the recess 1a of the insulating substrate 1.
And the electrodes of the semiconductor element 4 are electrically connected to the metallized leads 5 via the bonding wires 6, and then the lid 2 is made of glass, resin or the like on the upper surface of the insulating base 1. The semiconductor device as a final product is obtained by attaching the insulating container 3 with a sealing member and hermetically sealing the inside of the insulating container 3. This semiconductor device has a wiring conductor portion 7a of the electric circuit board 7 on the surface of which solder is previously attached,
The external connection terminals 5a and 5b are placed so as to be in contact with each other, and the wiring conductor portion 7a and the external connection terminals 5a and 5b are soldered and attached to the external electric circuit board 7.
本考案の半導体素子収納用パッケージにおいては半導体
素子を収容する絶縁容器の底面に形成した多数の外部接
続端子のうち絶縁容器の内部空所の下方に形成された外
部接続端子の面積を他の部位に形成された外部接続端子
の面積よりも大きくしておくことが重要である。そのた
め第１図及び第２図に示す実施例では絶縁基体１の半導
体素子を収容するための空所となる凹部1aの下方に形成
される外部接続端子5aの面積がメタライズリード５の一
端を絶縁基体１の底面において大きく拡張させることに
より他の部位に位置する外部接続端子5bよりも大きな面
積となっている。このように絶縁基体１の凹部1a下方に
形成された外部接続端子5aの面積を他の部位に形成され
た外部接続端子5bよりも大きな面積となすと絶縁基体１
の凹部1a内に半導体素子４を取着収容し、該半導体素子
４が熱を発した場合、その熱は半導体素子４の下方に形
成された面積が大の外部接続端子5aを介して外部電気回
路基板に効率良く伝達されることとなり、その結果、半
導体素子収納用パッケージを低温として内部に収容する
半導体素子４に熱破壊を起こさせたり、特性に熱劣化を
生じさせたりすることが皆無となる。In the package for housing a semiconductor device according to the present invention, the area of the external connection terminal formed below the inner space of the insulating container out of a large number of external connection terminals formed on the bottom surface of the insulating container housing the semiconductor device can be reduced to other parts. It is important to make the area larger than the area of the external connection terminal formed on the. Therefore, in the embodiment shown in FIGS. 1 and 2, the area of the external connection terminal 5a formed below the concave portion 1a, which is a space for accommodating the semiconductor element of the insulating substrate 1, insulates one end of the metallized lead 5. The area of the bottom surface of the base 1 is greatly expanded so that it has a larger area than the external connection terminals 5b located at other portions. If the area of the external connection terminal 5a formed below the recessed portion 1a of the insulating base 1 is set to be larger than the area of the external connection terminal 5b formed at another portion in this manner, the insulating base 1
When the semiconductor element 4 is attached and housed in the concave portion 1a of the semiconductor device and the semiconductor element 4 emits heat, the heat is generated through the external connection terminal 5a formed under the semiconductor element 4 and having a large area. It is efficiently transmitted to the circuit board, and as a result, there is no possibility of causing the semiconductor element 4 housed inside the semiconductor element housing package at low temperature to cause thermal breakdown or thermal deterioration of characteristics. Become.
なお、前記絶縁基体１の凹部1a下方に形成される外部接
続端子5aはその面積を８mm2以上の大きなものとなすと
半導体素子４の発する熱を外部電気回路基板を極めて良
好に伝達させ、半導体素子収納用パッケージの温度を低
温となすことができる。従って、絶縁基体１の凹部1a下
方に形成される外部接続端子5aはその面積を８mm2以上
とすることが好ましい。If the area of the external connection terminal 5a formed below the recess 1a of the insulating substrate 1 is set to a large area of 8 mm 2 or more, the heat generated by the semiconductor element 4 can be transferred extremely well to the external electric circuit board, and The temperature of the device housing package can be low. Therefore, it is preferable that the area of the external connection terminal 5a formed below the concave portion 1a of the insulating base 1 is 8 mm 2 or more.
また本考案は上述の実施例に限定されるものではなく、
本考案の要旨を逸脱しない範囲であれば種々の変更は可
能であり、例えば絶縁容器の底面にメタライズリードの
一端を導出させることによって外部接続端子を形成する
のに代えて絶縁基体の底面に別に熱伝導率が高い銅（C
u）、銀（Al）等を被着させ外部接続端子としてもよ
い。この場合、外部接続端子が熱伝導率の高い金属より
成ることから該外部接続端子が半導体素子の発する熱を
より効率的に外部回路基板に伝達することが可能とな
る。The present invention is not limited to the above embodiment,
Various modifications can be made without departing from the scope of the present invention. For example, instead of forming the external connection terminal by leading out one end of the metallized lead to the bottom surface of the insulating container, separately from the bottom surface of the insulating substrate. Copper with high thermal conductivity (C
u), silver (Al), or the like may be attached to serve as an external connection terminal. In this case, since the external connection terminal is made of metal having high thermal conductivity, the external connection terminal can more efficiently transfer the heat generated by the semiconductor element to the external circuit board.
（考案の効果） 本考案によれば内部に半導体素子を収容するための空所
を有する絶縁容器の底面に多数の外部接続端子を形成し
て成る半導体素子収納用パッケージにおいて、前記絶縁
容器の内部空所の下方に形成された外部接続端子の面積
を他の部位に形成された外部接続端子の面積より大きく
したことから内部に収容する半導体素子の発する熱は外
部接続端子を介して外部電気回路基板に効率よく伝達す
ることかでき、その結果、半導体素子収納用パッケージ
を低温として内部に収容する半導体素子に熱破壊を起こ
させたり、特性に熱劣化を生じさせたりすることが皆無
となる。(Effects of the Invention) According to the present invention, in a package for accommodating a semiconductor device, wherein a plurality of external connection terminals are formed on a bottom surface of an insulating container having a space for accommodating a semiconductor device therein, Since the area of the external connection terminal formed below the void is made larger than the area of the external connection terminal formed in the other portion, the heat generated by the semiconductor element accommodated inside the external electric circuit is transmitted via the external connection terminal. It can be efficiently transmitted to the substrate, and as a result, there is no possibility of causing a semiconductor element housed inside the semiconductor element housing package at a low temperature to cause thermal destruction or thermal deterioration of characteristics.
第１図は本考案の半導体素子収納用パッケージの一実施
例を示す断面図、第２図は第１図に示す半導体素子収納
用パッケージの絶縁容器の底面図、第３図は従来の半導
体素子収納用パッケージの断面図、第４図は第３図に示
す半導体素子収納用パッケージの絶縁容器の底面図であ
る。 １…絶縁基体、1a…凹部 ２…蓋体、３…絶縁容器 ５…メタライズリード 5a,5b…外部接続端子FIG. 1 is a sectional view showing an embodiment of a semiconductor device housing package of the present invention, FIG. 2 is a bottom view of an insulating container of the semiconductor device housing package shown in FIG. 1, and FIG. 3 is a conventional semiconductor device. FIG. 4 is a sectional view of the storage package, and FIG. 4 is a bottom view of the insulating container of the semiconductor element storage package shown in FIG. DESCRIPTION OF SYMBOLS 1 ... Insulating substrate, 1a ... Recessed portion 2 ... Lid body, 3 ... Insulating container 5 ... Metallized leads 5a, 5b ... External connection terminals
Claims (1)
有する絶縁容器の裏面全域にわたって外部電気回路基板
の配線導体に接続される多数の外部接続端子を配して成
る半導体素子収納用パッケージにおいて、前記絶縁容器
の内部空所の下方に位置する外部接続端子の外部電気回
路基板の配線導体に対する接触面積を他の部位に形成さ
れている外部接続端子の接触面積より広くしたことを特
徴とする半導体素子収納用パッケージ。1. A package for accommodating a semiconductor element, wherein a large number of external connection terminals connected to wiring conductors of an external electric circuit board are arranged over the entire back surface of an insulating container having a cavity for accommodating a semiconductor element therein. In the above, the contact area of the external connection terminal located below the internal space of the insulating container with respect to the wiring conductor of the external electric circuit board is made wider than the contact area of the external connection terminal formed in another portion. Package for semiconductor device storage.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1989125456U JPH0741162Y2 (en) | 1989-10-26 | 1989-10-26 | Package for storing semiconductor devices |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1989125456U JPH0741162Y2 (en) | 1989-10-26 | 1989-10-26 | Package for storing semiconductor devices |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH0363943U JPH0363943U (en) | 1991-06-21 |
| JPH0741162Y2 true JPH0741162Y2 (en) | 1995-09-20 |
Family
ID=31673326
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1989125456U Expired - Lifetime JPH0741162Y2 (en) | 1989-10-26 | 1989-10-26 | Package for storing semiconductor devices |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0741162Y2 (en) |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR0156622B1 (en) * | 1995-04-27 | 1998-10-15 | 문정환 | Semiconductor leadframe and the manufacturing method |
| JP6878562B2 (en) * | 2017-02-21 | 2021-05-26 | 京セラ株式会社 | Wiring boards, electronics and electronic modules |
| JP6826185B2 (en) * | 2017-02-22 | 2021-02-03 | 京セラ株式会社 | Wiring boards, electronics and electronic modules |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS55176571U (en) * | 1979-06-05 | 1980-12-18 | ||
| JPS59151443A (en) * | 1983-02-17 | 1984-08-29 | Fujitsu Ltd | Semiconductor device |
-
1989
- 1989-10-26 JP JP1989125456U patent/JPH0741162Y2/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0363943U (en) | 1991-06-21 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| EXPY | Cancellation because of completion of term |