JPH0385019A - Phase locked loop type frequency synthesizer - Google Patents

Abstract

PURPOSE:To attain high resolution without deteriorating the phase noise characteristic by subtracting an imaginary output of a voltage controlled oscillator at a prescribed frequency from an output of an A/D converter at each clock at a correction computing element. CONSTITUTION:Part of the output of a voltage controlled oscillator VCO 1 is inputted to an A/D converter 6, sampled with timing of the clock generated at a reference signal generator OSC 14 and converted into a digital value. The digital value is subject to correction calculation at a correction computing element 7, inputted to a D/A converter 8, converted into an analog value and inputted to the VCO 1 through a loop filter 5. The operation of the A/D converter 6, the correction computing element 7 and the D/A converter 8 is implemented synchronously with the output of the OSC 14. A prescribed frequency output is obtained by subtracting an imaginary output of the voltage controlled oscillator 1 at a prescribed frequency from the output of the A/D converter 6 at each clock in the correction computing element 7 in the phase locked loop type frequency synthesizer.

Description

DETAILED DESCRIPTION OF THE INVENTION <Industrial Application Field> The present invention relates to increasing the resolution of a phase synchronized frequency synthesizer.

<Prior Art> Indirectly controlled frequency synthesizers using phase synchronization technology have been put into practical use. FIG. 4 is a block diagram of a conventional frequency synthesizer of this type. The conventional frequency synthesizer branches the output signal of the voltage controlled oscillation wi1 into two, one of which is used as the device output, and the other is frequency-stepped by a coefficient value N by a programmable frequency divider 2, and the frequency phase comparator 3
to one input of the The output of the reference signal generator 4 is given to this other input, the frequency and phase of both are compared, and the obtained error signal is passed through the loop filter 5 which determines the loop characteristics to the frequency of the voltage controlled oscillator 1. Negative feedback is provided to the control terminal to stably control the output frequency of the voltage controlled oscillator 1. In such a circuit, the output frequency f is determined by f□=N-fa-(1), where fR is the output frequency of the reference signal generator 4, and N is the count value of the programmable frequency divider 2. (N is an integer).

<Problems to be Solved by the Invention> As described above, the conventional frequency synthesizer changes the output frequency fR in the minimum variable step by controlling the coefficient value of the programmable frequency divider from the outside. If the output frequency of the reference signal generator is made smaller in accordance with the step, there is a problem in that the phase noise characteristics deteriorate.

The present invention has been made to solve the above-mentioned problems, and an object of the present invention is to realize a phase-locked frequency synthesizer that can achieve high resolution without deteriorating phase noise characteristics.

Means for Solving the Problems> A phase-locked frequency synthesizer according to the present invention includes a voltage controlled oscillator and an A/D inputting the output of the voltage controlled oscillator.
a correction calculator that inputs the output of the A/D converter, a D/A converter that inputs the output of the correction calculator, and an output of the D/A converter that inputs the output of the D/A converter to the voltage controlled oscillator. a loop filter that feeds back to the A/D converter, the D/A
A converter and a reference signal generator that provides a clock to the correction calculator, and the correction calculator calculates the difference between the virtual output value of the voltage controlled oscillator at a predetermined frequency and the output value of the A/D converter for each clock in the correction calculator. The present invention is characterized in that the output of the predetermined frequency is obtained by pulling the frequency.

Function> By subtracting the virtual output value of the voltage controlled oscillator at a predetermined frequency from the output value of the A/D converter for each clock in the correction calculator, it is possible to lock the phase locked circuit at the predetermined frequency. can. The predetermined frequency can be chosen to be any fractional number fΔ of the reference frequency.

<Example> Hereinafter, the present invention will be explained in detail using the drawings.

FIG. 1 is a block diagram showing an embodiment of a phase synchronized frequency synthesizer according to the present invention.

The same parts as in FIG. 4 are given the same symbols. Voltage control m
A part of the output of the oscillator (VCO) 1 is input to the analog input section of the A/D converter 6, and the output is input to the reference signal generator (O3C) 1.
After being sampled at the timing of the clock generated by No. 4, it is converted into a digital value. The digital value is corrected by the correction calculator 7 and then inputted to the D/A converter 8.
It is converted to an analog value and passed through the loop filter 5 to the VC
It is input to the frequency control terminal of Ol. A/D converter 6,
All operations of the correction calculator 7 and the D/A converter 8 are 030.
This is done in synchronization with the output of 14.

The operation of the apparatus configured as described above will be explained using the time charts shown in FIGS. 2 and 3.

FIG. 2 shows a time chart when no correction calculation is performed, and the output frequency of the VCOI is synchronized with the output of 03CI4. In FIG. 2, which shows the state of fR:fo/2 (2), no correction calculation is performed, so the output (C) of the A/D converter 6 and the output (C) of the correction calculation unit 7 are D) are equal; as the frequency fo of the VCOI output (A) increases, the output (E) of the D/A converter 8 becomes smaller;
The VCOI is controlled to lower the output frequency f. When the output frequency f0 decreases, (E) increases, and the VCOI is controlled to increase the output frequency fo. As a result, the output frequency of vcoi is locked to 2fR. Therefore, in general, in the configuration shown in Fig. 1, even without an N frequency divider,
The output frequency r&f o of the VCOl can be locked to N·fRl, that is, the integer fΔ of the reference frequency.

Figure 3 is a time chart showing the operation when correction calculation is performed, in which the output frequency fo of the VCOI is set to N-fR+Δf.
, that is, the output of vcoi is Es i n (2x (N-f
R+Δf)t)...(3) If the phase difference between fR and fo is 0 in the initial state,
The output of the A/D converter 6 after the Mth sampling is expressed by the following equation.

Es i n <2yr (N-fg+Δf)・M/f
i)=Es i n (2πN −M+2′rΔf−M
/fR)=Es i n (2π(Δf/fb)・M>
(4) The correction calculator 7 uses the virtual output value obtained from equation (4) and calculates the following equation for each sample.

(Output data of A/D converter 6) −Esin, (2yr(Δfo/fR)−M)...
(5) Here, M is determined by the number of samples.
Increase by increments. When the calculation result of formula (5) is set in the D/A converter 8, f,=N −fR+Δf o ”・(6)
At this time, the output of the D/A converter 8 becomes 0 and lock is applied. The resolution in this case is determined by the calculation accuracy of equation (5), and if this is set to Ol・1%... From (7), Δf o = f R/ 1000...
- (8), and a resolution of 1/1000 of the reference frequency can be obtained.

In Figure 3, Δf o / f R = 1 / 4
... In the case of (9), the output frequency of vcot is fo = 2 fR + fR/4 - (10)
This shows the case where it is locked. In the correction calculator 7, (10
) By subtracting the virtual output value of the VCOI at the frequency of the equation, the values of (D) and (B) become 0, and it is possible to lock at the above frequency.

According to the phase synchronized frequency synthesizer having such a configuration, the resolution is determined only by the calculation accuracy, so it is greatly improved compared to the conventional example.

Furthermore, even if the resolution is increased, the reference frequency remains the same as before, so phase noise does not deteriorate; that is, it is possible to obtain resolution at a frequency lower than the reference signal frequency.

In the above embodiment, the case where the output waveform of CO is a sine wave is shown, but the present invention is not limited to this, and other waveforms such as a square wave can be handled by changing the correction calculation formula.

<Effects of the Invention> As described above, according to the present invention, a phase-locked frequency synthesizer that can achieve high resolution without deteriorating phase noise characteristics can be realized with a simple configuration.

[Brief explanation of drawings]

FIG. 1 is a configuration circuit diagram showing an embodiment of a phase-locked frequency synthesizer according to the present invention, and FIGS.
FIG. 4 is a block diagram showing a conventional indirect control frequency synthesizer. 1... Voltage controlled oscillator, 5... Loop filter, 6
...A/D converter, 7...correction calculator, 8...D
Figure 2 (B) 05ε4den (E) fJA Deba θ

Claims (1)

[Claims] A voltage controlled oscillator, an A/D converter that inputs the output of this voltage controlled oscillator, a correction calculator that inputs the output of this A/D converter, and a D/A that inputs the output of this correction calculator.
a converter, a loop filter that feeds back the output of the D/A converter to the voltage controlled oscillator, and a reference signal generator that provides clocks to the A/D converter, the D/A converter, and the correction calculator. and the correction calculator is configured to obtain an output at the predetermined frequency by subtracting a virtual output value of the voltage controlled oscillator at a predetermined frequency from the output value of the A/D converter for each clock. Features: Phase-locked frequency synthesizer.