JP2000004121A - Oscillation modulating circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide the oscillation modulating circuit which can impose modulation at an accurate frequency with simple constitution. SOLUTION: A PLL circuit consisting of a VCO circuit 2, a frequency dividing circuit 3, a reference frequency circuit 1, a phase comparing circuit 4, and a loop filter circuit 5 is used and an adder circuit 7 inputs a modulating signal to the VCO circuit 2. Here, the modulating signal is inputted to the VCO circuit 2 not directly, but through a converting circuit 6 which shifts the frequency band of the modulating signal to a frequency range higher than the cutoff frequency of a loop filter circuit 5.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a modulation circuit used for, for example, a data or voice communication device, and more particularly to an oscillation modulation circuit for performing modulation by applying a modulation signal to an output signal of a voltage control circuit. It belongs to

[0002]

2. Description of the Related Art Conventionally, in a communication apparatus that handles data, voice, and the like, a process of modulating a carrier signal with a modulation signal based on data or voice has been performed. In general, a carrier signal is generated by a voltage control circuit (hereinafter referred to as a VCO (Voltag).
e Control Oscillator circuit), a reference frequency oscillation circuit, a phase comparison circuit, and a phase locked loop circuit (hereinafter, PLL (Phase
Locked Loop) circuit is used. Although there are various types of modulation, generally, a method of applying the modulation signal to a VCO circuit to perform the modulation is adopted.

However, if such a modulation method is adopted in the PLL circuit, the signal band of the modulation signal and the frequency band in which the PLL circuit operates overlap, so that the modulation operation is not performed correctly due to the operation of the PLL circuit. was there.

Therefore, in order to solve this problem, the operation of the PLL circuit is stopped during the period in which modulation is being performed, or Japanese Patent Application No. 57-97465 (Japanese Unexamined Patent Application Publication No.
As in the invention disclosed in U.S. Pat. No. 2,215,104), there has been proposed a method of performing modulation by separating a modulated signal into two frequency components.

[0005]

SUMMARY OF THE INVENTION However, PLL
The method of stopping the operation of the circuit has a problem that the frequency changes together with the stop of the operation of the PLL circuit, and it is impossible to continuously perform modulation for a long time.

Further, the technique of separating the modulated signal into two frequency components has a problem that the configuration is complicated and adjustment is troublesome.

[0007] In particular, in a device such as a digital cordless telephone which needs to be miniaturized and inexpensive and is used for a relatively long time, this is an important problem.

The present invention has been made to solve the above-described problem, and has as its object to provide an oscillation modulation circuit capable of performing modulation at an accurate frequency with a simple configuration.

[0009]

According to a first aspect of the present invention, there is provided an oscillation modulation circuit, comprising: a voltage-controlled oscillation circuit for outputting a signal of a predetermined frequency in accordance with an input voltage; A reference frequency oscillation circuit that outputs a reference frequency signal, the reference frequency signal and the comparison target signal are input, a phase comparison circuit that outputs a signal corresponding to a phase difference between these signals, and an output signal of the phase comparison circuit Entered,
A loop filter circuit that passes a signal in a frequency band equal to or lower than a cutoff frequency, a signal based on an output signal from the voltage controlled oscillation circuit is input as the comparison target signal, and the loop filter circuit is connected to the voltage controlled oscillation circuit. A phase-locked loop circuit that correlates a signal that has passed through the circuit, an addition circuit that adds a modulation signal to a signal that is input to the voltage-controlled oscillation circuit, and a phase band that modulates the frequency band of the modulation signal. A conversion circuit for converting the frequency outside the frequency band in which the locked loop circuit operates.

According to the oscillation modulating circuit of the first aspect,
When a predetermined input voltage is supplied to a voltage controlled oscillation circuit constituting a phase locked loop circuit, a signal of a predetermined frequency corresponding to the input voltage is output from the voltage controlled oscillation circuit. Is supplied to the phase comparison circuit as a comparison target signal. On the other hand, a reference frequency signal is supplied to this phase comparison circuit from a reference frequency oscillation circuit, and the phase comparison circuit compares the phase of the comparison target signal with the reference frequency signal. As a result of the comparison, when a phase difference occurs between these signals, a signal having a voltage value in a direction to eliminate the phase difference is output from the phase comparison circuit and supplied to the loop filter circuit. In the loop filter circuit, a signal in a frequency band equal to or lower than the cutoff frequency is passed. Therefore, when the rate of change in the output signal of the phase comparison circuit is equal to or lower than the cutoff frequency, the change in the output signal is smoothed. , To the voltage oscillation circuit. And the voltage oscillation circuit includes:
The oscillation frequency is changed according to this signal. By repeating such processing, the output signal of the voltage oscillation circuit becomes a signal whose phase is synchronized with the reference frequency signal.

On the other hand, the addition circuit adds the modulation signal to the output signal from the loop filter circuit and inputs the added signal to the voltage oscillation circuit. Therefore, only the output signal from the loop filter circuit is output from the voltage oscillation circuit. Instead, the frequency of the output signal is changed according to the modulation signal. Therefore, if the rate of change of the frequency based on the modulation signal is within the frequency band in which the phase locked loop circuit operates, the phase locked loop circuit controls the input voltage to the voltage oscillation circuit so as to prevent the change. Will be adjusted. However, since the frequency band of the modulation signal has been converted to outside the frequency band in which the phase-locked loop circuit operates, the frequency fluctuation based on the modulation signal as described above affects the operation of the phase-locked loop circuit. Never give. Therefore, a normal modulation operation is performed while maintaining a stable operation of the phase locked loop circuit.

According to a second aspect of the present invention, there is provided an oscillation modulation circuit according to the first aspect, wherein the conversion circuit changes the phase of the modulation signal by π / 2.
A phase shift circuit that outputs a phase shift modulation signal delayed by radians,
A conversion frequency oscillation circuit that outputs a first oscillation signal that oscillates at the conversion frequency and a second oscillation signal whose phase is delayed by π / 2 radians from the first oscillation signal; A first multiplication circuit that multiplies the oscillating signal by the first and second oscillation circuits; a second multiplication circuit that multiplies the modulation signal by the second oscillating signal; And an addition circuit for adding signals.

According to the oscillation modulating circuit of the second aspect,
A phase shift modulation signal delayed by π / 2 radians from the phase of the modulation signal is output by the phase shift circuit, and the phase shift modulation signal and the first oscillation signal output from the conversion frequency oscillation circuit are:
The multiplication is performed by the first multiplication circuit. Therefore, the modulation signal
If the first oscillation signal is represented by sin (2πft) and the first oscillation signal is represented by sin (2πfct), the phase shift modulation signal becomes -cos (2πft), and the multiplication result becomes -cos (2πft) sin (2πfct). Become. Also,
The second oscillation signal output from the conversion oscillation circuit and having a phase delayed by π / 2 radians from the first oscillation signal is (−cos (2πfc
t)), and the modulated signal sin (2πf
multiplied by t). Therefore, the multiplication result is sin (2πft) (-co
s (2πfct)). Then, when these multiplication results are added by the addition circuit, -cos (2πft) sin (2πfct) + sin (2
πft) (-cos (2πfct)), which is expressed as -sin (2π (f + fc) t) according to the trigonometric function formula. In this way, the finally obtained signal is compared with the modulated signal sin (2πft).
The frequency f is shifted by the conversion frequency fc, and is a signal in a frequency band that does not affect the operation of the phase locked loop circuit. Therefore, a normal modulation operation is performed while maintaining a stable operation of the phase locked loop circuit.

According to a third aspect of the present invention, there is provided an oscillation modulation circuit according to the first aspect, wherein the conversion circuit outputs a conversion frequency signal, A multiplication circuit that performs multiplication of the modulation signal and the conversion frequency signal, and a high-pass filter circuit that extracts a signal component obtained by adding the frequency of the modulation signal and the frequency of the conversion frequency signal from the signal multiplied by the multiplication circuit, It is characterized by having.

According to the oscillation modulating circuit of the third aspect,
The multiplication circuit multiplies the modulation signal by the converted frequency signal. Therefore, assuming that the modulation signal is represented by sin (2πft) and the converted frequency signal is represented by (−cos (2πfct)), the multiplication result is −sin (2πft) cos (2πfct). This is from the trigonometric formula, -sin (2π (f + fc) t) / 2-sin (2π (f−f
c) can be expressed as t) / 2, and a signal component -sin (2π (f) obtained by adding the frequency of the modulation signal and the frequency of the conversion frequency signal.
+ fc) t) and a signal component -sin (2π (f−fc) t) obtained by subtracting the frequency of the converted frequency signal from the frequency of the modulation signal. And by the high pass filter circuit,
-Sin (2π (f + fc) t) which is a signal component obtained by adding the frequency of the modulation signal and the frequency of the conversion frequency signal is extracted. Thus, the finally obtained signal is the modulated signal si
Compared with n (2πft), the frequency f is shifted by the conversion frequency fc, and is a signal in a frequency band that does not affect the operation of the phase locked loop circuit.
Therefore, a normal modulation operation is performed while maintaining a stable operation of the phase locked loop circuit.

According to a fourth aspect of the present invention, there is provided an oscillation modulation circuit according to the first aspect, wherein the conversion circuit detects a logical value of a modulation signal; When the logical value detected by the detecting means is the same value and continues for a predetermined number of times, a logical value inverting means for inverting the logical value at a predetermined ratio is provided.

According to the oscillation modulating circuit of the fourth aspect,
The logic value of the modulation signal is detected by the detection means constituting the conversion circuit, and if the logic value detected by the detection means is the same value and continues for a predetermined number of times, the logic value inversion means constituting the conversion circuit , The logical value is inverted at a predetermined ratio. Therefore, if the same logical value continues more than a predetermined number of times, the frequency may be lower than the cutoff frequency.However, such a conversion circuit converts the same logical value so that it does not continue more than a predetermined number of times. Therefore, the frequency does not become lower than the cutoff frequency, and a normal modulation operation is performed while maintaining a stable operation of the phase locked loop circuit.

[0018]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS One embodiment of the present invention will be described below with reference to the drawings.

FIG. 1 is a block diagram showing a schematic configuration of the oscillation modulation circuit according to the present embodiment. As shown in FIG. 1, the oscillation modulation circuit of the present embodiment includes a reference frequency circuit 1
And a VCO (Voltage Control Oscillator) circuit 2,
It comprises a frequency dividing circuit 3, a phase comparing circuit 4, a loop filter circuit 5, a converting circuit 6, and an adding circuit 7.

The reference frequency circuit 1 uses a crystal oscillator having a high frequency accuracy to accurately set a reference frequency Fref.
The oscillation circuit outputs the reference signal Sr.

The VCO circuit 2 is an oscillating circuit with an oscillating frequency variable, utilizing the fact that the capacitance is changed by a reverse voltage input from a control circuit input CTRL and applied to a variable capacitance diode (not shown). This is a circuit that changes the oscillation frequency within a predetermined range. Note that the VCO circuit 2 may be configured using an element other than the variable capacitance diode, for example, a variable reactance element.

The frequency dividing circuit 3 is composed of a flip-flop or the like, and divides an input signal by a preset frequency dividing ratio N and outputs it. The dividing ratio N of the dividing circuit 3
Can be changed by a CPU (not shown) or the like.

The phase comparison circuit 4 is composed of a flip-flop or the like, compares the phase of the signal divided by the frequency division circuit 3 with the two input signals of the reference signal Sr, and outputs a signal corresponding to the phase difference. This is the output circuit.

The loop filter circuit 5 is a low-pass filter circuit having a cutoff frequency f1 composed of a resistor and a capacitor.

In the present embodiment, a phase locked loop (Phase Locked Loop,
The circuit is hereinafter referred to as a PLL.

The conversion circuit 6 converts the frequency band of the modulated signal into
This is a circuit for shifting out of the operating frequency band of the PLL circuit, and the detailed configuration of the conversion circuit 6 will be described later.

The adder 7 is composed of a resistor, adds the output signal of the conversion circuit 6 to the output signal of the loop filter circuit, and supplies the result to the VCO circuit 2.

Next, the operation of the oscillation modulation circuit of this embodiment will be described.

First, the control input CTRL of the VCO circuit 2
When a signal having a predetermined voltage value is input to the
A signal So having a frequency corresponding to this signal is output from the circuit 2, and this output signal So is input to the frequency dividing circuit 3 and frequency-divided by N, and output from the frequency dividing circuit 3 as a signal Sd. For example, if the frequency of the signal So is F0, the frequency of the output signal Sd from the frequency divider 3 is F0 / N. In the phase comparison circuit 4, this frequency F0 / N
Is compared with the reference signal Sr of the frequency Fref output from the reference frequency circuit 1.

If these signals have the same phase and F0
Assuming that the relationship of = N × Fref holds, the reference voltage is output from the phase comparison circuit 4 and the frequency of the output signal So from the VCO circuit 2 is maintained at F0. On the other hand, if the frequency of the output signal So of the VCO circuit 2 fluctuates and becomes higher than F0 due to drift or the like, that is, if the phase advances with respect to the frequency Fref of the reference signal Sr, the phase A voltage lower than the reference voltage is output from the comparison circuit 4 in accordance with the phase difference.
Is brought closer to F0. Conversely, the frequency of the output signal So of the VCO circuit 2 fluctuates, and F
0, that is, the frequency F of the reference signal Sr
When the phase is delayed with respect to ref, the phase comparison circuit 4
, A voltage higher than the reference voltage is output according to the phase difference, and the frequency of the output signal So of the VCO circuit 2 approaches F0.

As described above, the phase comparison circuit 4 maintains the frequency of the output signal So of the VCO circuit 2 at the value of F0 having a value N times the frequency Fref of the reference signal Sr of the reference frequency circuit 1. As described above, the output voltage is changed.

The low-pass filter circuit 5 converts the changing output voltage of the phase comparison circuit 4 to a cutoff frequency f1.
To generate a signal Sc from which frequency components and noise higher than the cutoff frequency f1 have been removed. And
This signal Sc is input to the control input CTRL of the VCO circuit 2, and the PLL circuit operates stably.

As described above, according to the PLL circuit of the present embodiment, the frequency of the output signal So of the VCO circuit 2 is set to N × F
ref and the frequency dividing ratio N of the frequency dividing circuit 3
Is set appropriately, the frequency of the output signal So of the VCO circuit 2 can be made variable.

In the present embodiment, the modulation signal Sconv is input to the control input CTRL of the VCO circuit 2 together with the output signal Sc of the low-pass filter circuit 5 so that the output signal So of the VCO circuit 2 is modulated. It is configured to perform modulation by Sconv. As a modulation method, an appropriate method such as a frequency modulation method or a phase modulation method can be used. In the present embodiment, a frequency modulation method is used as an example, and a voltage corresponding to the modulation signal Scov is added to the signal Sc by the adder 7, and V
It is input to the control input CTRL of the CO circuit 2. The modulation signal Sconv is a signal converted into pulse data so that digital data is transferred at a constant transfer rate. When the data is "1", the maximum value Va and the data are centered on the output voltage V0 of the loop filter circuit 5. It is applied to the control input CTRL of the VCO circuit 2 so as to take the minimum value Vb when it is "0". For example, the VCO circuit 2 exhibits characteristics as shown in FIG. 2, and the frequency of the output signal So of the VCO circuit 2 is set to F0.
Is assumed to be V0, the data is “1010
When "10 ..." is repeated, as shown in FIG.
The input of the control input CTRL of the CO circuit 2 is varied between Va and Vb, and the frequency of the output signal So of the VCO circuit 2 is
Switch to Fa and Fb.

Here, the reference signal Sr of the reference frequency circuit 1
Is 10 MHz, the frequency dividing ratio N of the frequency dividing circuit 3
Is 10, and the frequency F0 of the output signal So of the VCO circuit 2 is 1
00 MHz, the cut-off frequency f1 of the low-pass filter circuit 5 is 10 kHz, and the transfer rate of the modulated signal is 1
Consider the case of Mbps. In this case, the frequency of the modulated signal is such that the transfer data is "101010 ..." as shown in FIG.
Is repeated, and becomes 500 kHz. At this time, the output signal So of the VCO circuit 2 is switched between Fa and Fb at a frequency of 500 kHz, and the phase difference of these frequencies with respect to the frequency F0 is detected by the phase comparison circuit 4, and the output of the phase comparison circuit 4 Voltage is also 500
It will change at a rate of kHz. However, since the frequency of this change exceeds the cutoff frequency f1 set to 10 kHz, it is removed by the low-pass filter circuit 5 and is not input to the control input CTRL of the VCO circuit 2. That is, when the frequency band of the modulation signal exceeds the cutoff frequency f1, the VCO circuit 2
Of the output signal So does not affect the operation of the PLL circuit.

However, when the transfer data is "1111"
When the same value is continuous data such as “1...” And “000000...”, The frequency band of the modulated signal is lower than the cut-off frequency f1. The voltage of the phase comparison circuit 4 that is output to cancel the frequency fluctuation of the output signal So passes through the low-pass filter circuit 5 and passes through the VCO circuit 2
Is input to the control input CTRL of the VCO circuit 2
Operates so as to cancel out frequency fluctuations due to modulation. Therefore, a normal modulation operation is not performed.

Therefore, in the present embodiment, the modulation signal is not directly added to the output signal Sc of the loop filter circuit 5, but the frequency band of the modulation signal is changed by the conversion circuit 6 from the cutoff frequency f1 as shown in FIG. Are shifted to a higher frequency region and then added.

FIG. 3 is a block diagram showing a schematic configuration of the conversion circuit 6 in the present embodiment. As shown in FIG.
The conversion circuit 6 includes a phase shift circuit 10 that delays the phase of the modulation signal by π / 2 radians, a first oscillation signal that oscillates at a conversion frequency that is the frequency corresponding to the frequency band shift, and a phase that is π more than the first oscillation signal. A conversion frequency oscillation circuit 11 for outputting a second oscillation signal delayed by ２ radian, a first multiplication circuit 12 for multiplying the first oscillation signal by a signal having a phase delayed by π / 2 radians from a modulation signal, A second multiplying circuit 13 for multiplying the modulation signal by the second oscillation signal, and a first multiplying circuit 12
And an adding circuit 14 for adding the signals multiplied by the second multiplying circuit 13.

For ease of understanding, each signal is sin
To explain as a wave or a cos wave, first, assuming that a modulation signal is represented by a sine wave signal sin (2πft) having a frequency f,
The phase shift circuit 10 delays the phase of the modulation signal by π / 2 radians to generate a phase shift modulation signal of -cos (2πft). Then, this signal is multiplied by the first oscillation signal sin (2πfct) of the conversion frequency fc by the first multiplier circuit 12 to generate a signal of −cos (2πft) sin (2πfct). On the other hand, in the second multiplication circuit 13, the modulation signal sin
(2πft), a second oscillation signal having a conversion frequency fc and a phase delayed by π / 2 radians from the first oscillation signal (−co
s (2πfct)). As a result, the first multiplication circuit 1
Similar to the result of multiplication by 2, sin (2πft) (-cos (2πfct))
Is generated. Then, in the adding circuit 14, the results of the multiplication by the first and second multiplying circuits 12 and 13 are added, and -cos (2πft) sin (2πfct) + sin
A signal (2πft) (-cos (2πfct)) is generated. This signal can be expressed as -sin (2π (f + fc) t) according to the trigonometric formula, and compared with the modulation signal sin (2πft), the frequency f
Is a signal shifted by the conversion frequency fc and having a phase delayed by π radians.

As described above, according to the conversion circuit 6 of this embodiment, when the transfer rate is set to dbps, FIG.
As shown in FIG. 4B, the frequency band of the modulation signal represented by 0 Hz to d / 2 Hz is changed to fcHz as shown in FIG.
Since the frequency can be shifted from (conversion frequency) to fc + fdHz and the frequency band can be set higher than the cutoff frequency f1, the modulation operation can be performed well while performing the appropriate PLL operation.

For example, when the transfer rate is 1 Mbps, the frequency of the modulation signal is 0 to 500 kHz. If the conversion frequency fc is set to 20 kHz, the frequency of the modulation signal is shifted from 20 kHz to 520 kHz by the conversion circuit 6. Will do. Therefore, the data is "11111"
.. ", The frequency is always converted to a frequency of 20 kHz or more, which is higher than the cutoff frequency f1, so that the operation of the PLL circuit is not affected.

As a result, there is no need to temporarily stop the operation of the PLL circuit to perform the modulation operation as in the related art, and continuous modulation can be performed for a long time. In addition, since it can be realized with a simple configuration, cost reduction can be achieved.

Next, another embodiment of the conversion circuit according to the present invention will be described with reference to FIGS. The conversion circuit according to the present invention is not limited to the configuration shown in FIG. 3, but may have the configuration shown in FIG.

The conversion circuit shown in FIG. 5 performs modulation signal sin (2πf
a converted frequency oscillating circuit 2 which outputs an oscillation signal -cos (2πfct) having a converted frequency fc, the phase of which is delayed by π / 2 radians from that of t)
0, a multiplication circuit 21 for multiplying the modulation signal sin (2πft) and the oscillation signal -cos (2πfct), and -sin
And a high-pass filter circuit 22 for extracting a signal component of (2π (f + fc) t).

With such a multiplying circuit 21, the modulated signal
When sin (2πft) and the oscillation signal -cos (2πfct) are multiplied, -s
A signal called in (2πft) cos (2πfct) is generated, and this signal is obtained from the trigonometric formula according to -sin (2π (f + fc) t) / 2-sin
(2π (f-fc) t) / 2. From this signal, the high-pass filter circuit 22 outputs -sin (2π (f
By extracting the signal component of (+ fc) t), a modulated signal shifted by the conversion frequency fc can be obtained as in the example described above.

Further, the conversion circuit according to the present invention comprises a CPU
The logic value of the modulation signal may be detected by using, for example, and the logic value may be inverted at a predetermined ratio when the logic value continues for a predetermined number of times. For example, if the modulation signal is
In the case where the signal corresponding to “1” as shown in FIG. 6A corresponds to continuous data, the frequency band of the modulated signal may be lower than the cutoff frequency as described above. Therefore, when the CPU or the like detects that the data is such that the same value continues for a predetermined number of times, the data value is inverted at a predetermined ratio as shown in FIG. The frequency band of the signal may be higher than the cutoff frequency. However, when the oscillation modulation circuit having such a configuration is employed in the transmission device, a process of restoring the data in the reception device is required.

As described above, according to the oscillation modulation circuit of the present invention, the frequency band of the modulation signal can be changed with a simple configuration.
Since the frequency is shifted to a frequency band other than the cut-off frequency of the PLL circuit, a normal modulation operation can be performed while properly operating the PLL circuit. Therefore, continuous long-time modulation can be performed. .

Therefore, the oscillation modulation circuit of the present invention can be used for a digital cordless phone, a wireless radio, a cable TV,
Alternatively, it can be suitably used for an apparatus that handles a large amount of data such as image data.

[0049]

According to the oscillation modulation circuit of the first aspect, the modulation signal is added to the input signal of the voltage controlled oscillation circuit of the phase locked loop circuit, and the frequency band of the modulation signal is adjusted by the phase locked loop circuit. Since the frequency is converted outside the operating frequency band, even if the frequency fluctuates based on the modulation signal, the operation of the phase locked loop circuit is not affected and the stable operation of the phase locked loop circuit is maintained. In addition, a normal modulation operation can be performed. Further, since the modulation operation can be performed while operating the phase-locked loop circuit, continuous modulation can be performed for a long time, and an oscillation modulation circuit suitable for a communication device or the like can be provided. Furthermore, since it can be realized with a simple configuration, cost reduction can be achieved.

According to the oscillation modulating circuit of the second aspect,
A phase shift circuit that outputs a phase-shifted modulation signal in which the phase of the modulation signal is delayed by π / 2 radians, a first oscillation signal that oscillates at the conversion frequency, and a phase shifter that is delayed by π / 2 radians from the first oscillation signal. 2, a conversion frequency oscillation circuit that outputs a second oscillation signal, a first multiplication circuit that multiplies the phase shift modulation signal by the first oscillation signal, and a second multiplication circuit that multiplies the modulation signal by the second oscillation signal. Since the conversion circuit is configured by the multiplication circuit and the addition circuit that adds the respective signals multiplied by the first and second multiplication circuits, the stable operation of the phase locked loop circuit can be maintained with a simple configuration. , A normal modulation operation can be performed.

According to the oscillation modulating circuit of the third aspect,
A conversion frequency oscillation circuit that outputs a conversion frequency signal, a multiplication circuit that multiplies the modulation signal by the conversion frequency signal, and a signal component obtained by adding the frequency of the modulation signal and the frequency of the conversion frequency signal from the signal multiplied by the multiplication circuit And a high-pass filter circuit to extract the
With a simple configuration, a normal modulation operation can be performed while maintaining a stable operation of the phase locked loop circuit.

According to the oscillation modulating circuit of the fourth aspect,
When the logic value of the modulation signal is detected and the logic value is the same value and continues for a predetermined number of times, the logic value is inverted at a predetermined ratio, so that a frequency component lower than the cutoff frequency is included in the modulation signal. Without being included, while maintaining stable operation of the phase locked loop circuit with a simple configuration,
A normal modulation operation can be performed.

[Brief description of the drawings]

FIG. 1 is a block diagram illustrating a schematic configuration of an oscillation modulation circuit according to an embodiment of the present invention.

FIG. 2 is a diagram illustrating characteristics of a voltage controlled oscillation circuit used in the oscillation modulation circuit of FIG. 1 and an example of modulation.

FIG. 3 is a block diagram illustrating a schematic configuration of a conversion circuit used in the oscillation modulation circuit of FIG. 1;

4A is a diagram illustrating a frequency band of a modulation signal having a transfer rate of dbps, and FIG. 4B is a diagram illustrating a frequency band in which a PLL circuit operates in the oscillation modulation circuit of FIG. 1 and a modulation signal processed by a conversion circuit; FIG.

FIG. 5 is a block diagram showing a schematic configuration of another embodiment of the conversion circuit used in the oscillation modulation circuit of FIG. 1;

6A and 6B are diagrams for explaining a data processing method in another embodiment of the conversion circuit used in the oscillation modulation circuit of FIG. 1; FIG. 6A is a diagram showing data before conversion and a pulse waveform corresponding thereto; (B) is a diagram showing a pulse waveform obtained by inverting data at a predetermined ratio by the conversion circuit.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 ... Reference frequency circuit 2 ... VCO circuit 3 ... Division circuit 4 ... Phase comparison circuit 5 ... Loop filter circuit 6 ... Conversion circuit 7 ... Addition circuit 10 ... Phase shift circuit 11 ... Conversion frequency oscillation circuit 12, 13 ... Multiplication circuit 14 ... Addition circuit 20 ... Conversion frequency oscillation circuit 21 ... Multiplication circuit 22 ... High pass filter circuit

Claims (4)

[Claims] 1. A voltage-controlled oscillation circuit that outputs a signal of a predetermined frequency according to an input voltage, a reference frequency oscillation circuit that outputs a predetermined reference frequency signal, and the reference frequency signal and a signal to be compared. A phase comparison circuit that outputs a signal corresponding to a phase difference between these signals, and a loop filter circuit that receives an output signal of the phase comparison circuit and passes a signal in a frequency band equal to or lower than a cutoff frequency. A signal based on an output signal from the voltage-controlled oscillation circuit is input as a target signal, and a phase-locked loop circuit correlated with the voltage-controlled oscillation circuit so that a signal that has passed through the loop filter circuit is input. An addition circuit for adding a modulation signal to a signal input to the voltage-controlled oscillation circuit; Oscillator modulation circuit, characterized in that over-locked loop circuit comprises a conversion circuit which converts outside the frequency band of operation. 2. The conversion circuit according to claim 1, wherein the conversion circuit outputs a phase-shift modulation signal in which the phase of the modulation signal is delayed by π / 2 radians, a first oscillation signal that oscillates at a conversion frequency, A conversion frequency oscillating circuit that outputs a second oscillation signal delayed by π / 2 radians from the oscillation signal of (i), a first multiplication circuit that multiplies the phase shift modulation signal by the first oscillation signal, and A second multiplication circuit for multiplying a signal by the second oscillation signal, and an addition circuit for adding the respective signals multiplied by the first and second multiplication circuits. Item 2. The oscillation modulation circuit according to Item 1. 3. The conversion circuit includes: a conversion frequency oscillation circuit that outputs a conversion frequency signal; a multiplication circuit that multiplies the modulation signal by the conversion frequency signal; The oscillation modulation circuit according to claim 1, further comprising: a high-pass filter circuit that extracts a signal component obtained by adding a frequency of the signal and a frequency of the converted frequency signal. 4. The conversion circuit according to claim 1, wherein said detecting means detects a logical value of the modulation signal, and said logical value detected by said detecting means is the same value and continues for a predetermined number of times. 2. The oscillation modulation circuit according to claim 1, further comprising: a logic value inverting unit for inverting the logic value.